TS3L500RHURG4

  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 D 49 GND 50 VCC 51 2LED2 52 2LED1 53 GND 54 LED2 55 GND 56 VCC 48 0B1 A0 A1 2 47 1B1 3 46 0B2 VCC NC 4 45 1B2 5 44 GND GND 6 43 2B1 A2 A3 7 42 3B1 8 41 2B2 GND 9 40 3B2 VCC 10 A4 11 39 GND A5 12 GND 13 37 4B1 A6 14 A7 15 35 4B2 38 VCC 36 5B1 34 5B2 GND 16 33 GND SEL 17 32 6B1 VCC 18 LED0 19 LED1 20 31 7B1 30 6B2 29 7B2 description/ordering information The TS3L500 is a 16-bit to 8-bit multiplexer/ demultiplexer LAN switch with a single select (SEL) input. SEL controls the data path of the multiplexer/demultiplexer. The device provides additional I/Os for switching status indicating LED signals. VCC 27 GND 28 D 1 GND 24 D D GND 0LED2 25 1LED2 26 D TQFN PACKAGE (TOP VIEW) GND 21 D Wide Bandwidth (BW > 1100 MHz Typ) Low Crosstalk (XTALK = −37 dB Typ) Low Bit-to-Bit Skew (tsk(o) = 100 ps Max) Low and Flat ON-State Resistance (ron = 4
Typ, ron(flat) = 0.5
Typ) Low Input/Output Capacitance (CON = 8 pF Typ) Rail-to-Rail Switching on Data I/O Ports (0 to 5 V) VCC Operating Range From 3 V to 3.6 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 − 2000-V Human-Body Model (A114-B, Class II) − 1000-V Charged-Device Model (C101) Applications − 10/100/1000 Base-T Signal Switching − Differential (LVDS, LVPECL) Signal Switching − Audio/Video Switching − Hub and Router Signal Switching 0LED1 22 1LED1 23 D D D D The device provides a low and flat ON-state resistance (ron) and an excellent ON-state resistance match. Low input/output capacitance, high bandwidth, low skew, and low crosstalk among channels make this device suitable for various LAN applications, such as 10/100/1000 Base-T. This device can be used to replace mechanical relays in LAN applications. It also can be used to route signals from a 10/100 Base-T ethernet transceiver to the RJ-45 LAN connectors in laptops or in docking stations. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 85°C TQFN Tape and reel TS3L500RHUR TK500 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright  2006, Texas Instruments Incorporated 
 
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 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 FUNCTION TABLE INPUT SEL INPUT/OUTPUT An FUNCTION L nB1 nB2 An = nB1, LEDx = XLED1 An = nB2, LEDx = XLED2 H PIN DESCRIPTION DESCRIPTION NAME An nBm SEL LEDx XLEDm 2 Data I/O Data I/O Select input LED I/O port LED I/O port POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 logic diagram (positive logic) 2 48 3 47 0B1 A0 1B1 A1 46 0B2 45 1B2 7 43 8 42 2B1 A2 3B1 A3 41 2B2 40 3B2 11 37 12 36 4B1 A4 5B1 A5 35 4B2 34 5B2 14 32 15 31 6B1 A6 7B1 A7 30 6B2 29 7B2 19 22 LED0 25 LED1 20 23 26 LED2 52 54 51 SEL 0LED1 0LED2 1LED1 1LED2 2LED1 2LED2 17 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Control input voltage range, VIN (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Switch I/O voltage range, VI/O (see Notes 1, 2, and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V Control input clamp current, IIK (VIN < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA I/O port clamp current, II/OK (VI/O < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA ON-state switch current, II/O (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±128 mA Continuous current through VCC or GND terminals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.8°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to ground, unless otherwise specified. 2. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 3. VI and VO are used to denote specific conditions for VI/O. 4. II and IO are used to denote specific conditions for II/O. 5. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 6) MIN MAX VCC VIH Supply voltage 3 3.6 UNIT V High-level control input voltage (SEL) 2 5.5 V VIL VI/O Low-level control input voltage (SEL) 0 0.8 V Input/output voltage 0 5.5 V TA Operating free-air temperature −40 85 °C NOTE 6: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 electrical characteristics for 1000 Base-T ethernet switching over recommended operating free-air temperature range, VCC = 3.3 V + 0.3 V (unless otherwise noted)† PARAMETER VIK IIH SEL IIL ICC SEL CIN COFF TEST CONDITIONS MIN VCC = 3.6 V, VCC = 3.6 V, IIN = −18 mA VIN = VCC VCC = 3.6 V, VCC = 3.6 V, VIN = GND II/O = 0, Switch ON or OFF SEL f = 1 MHz, B port VI = 0, VIN = 0 f = 1 MHz, Outputs open, Switch OFF CON VI = 0, f = 1 MHz, Outputs open, Switch ON ron VCC = 3 V, 1.5 V ≤ VI ≤ VCC, ron(flat)§ VCC = 3 V, VI = 1.5 V and VCC, SEL TYP‡ MAX UNIT −0.7 −1.2 V ±1 µA ±1 µA 250 500 µA 2 2.5 pF 2.5 4 pF 8 9 pF IO = −40 mA 4 6 Ω IO = −40 mA 0.5 VCC = 3 V, 1.5 V ≤ VI ≤ VCC, IO = −40 mA ∆ron¶ † VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs. ‡ All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. § ron(flat) is the difference of ron in a given channel at specified voltages. ¶ ∆ron is the difference of ron from center (A4, A5) ports to any other port. 0.4 Ω 1 Ω electrical characteristics for 10/100 Base-T ethernet switching over recommended operating free-air temperature range, VCC = 3.3 V + 0.3 V (unless otherwise noted)† PARAMETER VIK IIH SEL IIL ICC SEL CIN COFF TEST CONDITIONS VCC = 3.6 V, VCC = 3.6 V, IIN = −18 mA VIN = VCC VCC = 3.6 V, VCC = 3.6 V, VIN = GND II/O = 0, SEL f = 1 MHz, B port SEL MIN Switch ON or OFF TYP‡ MAX −0.7 −1.2 V ±1 µA ±1 µA 250 500 µA 2 2.5 pF 2.5 4 pF VI = 0, VIN = 0 f = 1 MHz, Outputs open, Switch OFF CON VI = 0, f = 1 MHz, Outputs open, Switch ON ron VCC = 3 V, 1.25 V ≤ VI ≤ VCC, IO = −10 mA to −30 mA 4 ron(flat)§ VCC = 3 V, VI = 1.25 V and VCC, IO = −10 mA to −30 mA 0.5 VCC = 3 V, 1.25 V ≤ VI ≤ VCC, IO = −10 mA to −30 mA † VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs. ‡ All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. § ron(flat) is the difference of ron in a given channel at specified voltages. ¶ ∆ron is the difference of ron from center (A4, A5) ports to any other port. 0.4 ∆ron¶ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT 8 pF 6 Ω Ω 1 Ω 5 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V + 0.3 V, RL = 200 Ω, CL = 10 pF (unless otherwise noted) (see Figures 4 and 5) FROM (INPUT) TO (OUTPUT) A or B B or A tPZH, tPZL SEL A or B 0.5 15 ns tPHZ, tPLZ tsk(o)§ SEL A or B 0.9 9 ns A or B B or A 50 100 ps 50 150 ps PARAMETER tpd‡ tsk(p)¶ MIN TYP† MAX 0.25 UNIT ns † All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. ‡ The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load capacitance when driven by an ideal voltage source (zero output impedance). § Output skew between center port (A4 to A5) to any other port ¶ Skew between opposite transitions of the same output in a given device |tPHL − tPLH| dynamic characteristics over recommended operating free-air temperature range, VCC = 3.3 V + 0.3 V (unless otherwise noted) TEST CONDITIONS TYP† XTALK OIRR RL = 100 Ω, f = 250 MHz, See Figure 8 −37 RL = 100 Ω, f = 250 MHz, See Figure 9 BW RL = 100 Ω, See Figure 7 PARAMETER † All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT dB −37 dB 1100 MHz 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 OPERATING CHARACTERISTICS 0 0 −2 −20 Attenuation (dB) Gain (dB) −4 −6 −8 −10 −12 0.1 1 10 100 1000 −40 −60 −80 −100 0.1 10,000 1 Frequency (MHz) Figure 1. Gain vs Frequency 1000 10,000 Figure 2. OFF Isolation vs Frequency 0 6 5 −20 4 ron (
) Attenuation (dB) 10 100 Frequency (MHz) −40 −60 3 2 −80 −100 0.1 1 0 1 10 100 Frequency (MHz) 1000 10,000 0 1 2 3 4 5 6 VCOM (V) Figure 3. Crosstalk vs Frequency POST OFFICE BOX 655303 Figure 4. ron (
) vs Vcom (V) • DALLAS, TEXAS 75265 7 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 PARAMETER MEASUREMENT INFORMATION Enable and Disable Times VCC Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT Input Generator VI S1 RL VO CL (see Note A) 50 Ω RL TEST VCC S1 RL Vin CL V∆ tPLZ/tPZL 3.3 V ± 0.3 V 2 × VCC 200 Ω GND 10 pF 0.3 V tPHZ/tPZH 3.3 V ± 0.3 V GND 200 Ω VCC 10 pF 0.3 V VO 2.5 V Output Control (VIN) Output Waveform 1 S1 at 2 y VCC (see Note B) 1.25 V 1.25 V 0V tPZL tPLZ VOH VCC/2 tPZH VO Open GND 50 Ω VG2 VI 2 × VCC Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ VCC/2 VOH − 0.3 V VOH VOL VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. Figure 5. Test Circuit and Voltage Waveforms 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 PARAMETER MEASUREMENT INFORMATION Skew VCC Input Generator VIN 50 Ω 50 Ω VG1 TEST CIRCUIT DUT Input Generator Open RL TEST VCC S1 RL Vin CL tsk(o) 3.3 V ± 0.3 V Open 200 Ω VCC or GND 10 pF tsk(p) 3.3 V ± 0.3 V Open 200 Ω VCC or GND 10 pF 3.5 V 2.5 V 1.5 V Data In at Ax or Ay tPHLx VOH (VOH + VOL)/2 VOL Data Out at XB1 or XB2 tsk(o) VO CL (see Note A) 50 Ω tPLHx VO 2 × VCC S1 GND 50 Ω VG2 VI RL VO VI 3.5 V 2.5 V 1.5 V Input tsk(o) VOH (VOH + VOL)/2 VOL Data Out at YB1 or YB2 tPLHy tPHLy tPLH Output tsk(o) = tPLHy − tPLHx or tPHLy − tPHLx VOLTAGE WAVEFORMS OUTPUT SKEW (tsk(o)) tPHL VOH (VOH + VOL)/2 VOL tsk(p) = tPHL − tPLH VOLTAGE WAVEFORMS PULSE SKEW [tsk(p)] NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. Figure 6. Test Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 PARAMETER MEASUREMENT INFORMATION EXT TRIGGER BIAS Network Analyzer (HP8753ES) VBIAS P1 P2 VCC A0 SEL 0B1 CL = 10 pF (see Note A) DUT VSEL NOTE A: CL includes probe and jig capacitance. Figure 7. Test Circuit for Frequency Response (BW) Frequency response is measured at the output of the ON channel. For example, when VSEL = 0 and A0 is the input, the output is measured at 0B1. All unused analog I/O ports are left open. HP8753ES setup Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 PARAMETER MEASUREMENT INFORMATION EXT TRIGGER BIAS VBIAS Network Analyzer (HP8753ES) P1 P2 VCC 0B1 A0 RL = 100 Ω A1 1B1 0B2 DUT A2 1B2 2B1 RL = 100 Ω A3 3B1 2B2 3B2 SEL VSEL NOTES: A. CL includes probe and jig capacitance. B. A 50-Ω termination resistor is needed to match the loading of the network analyzer. Figure 8. Test Circuit for Crosstalk (XTALK) Crosstalk is measured at the output of the nonadjacent ON channel. For example, when VSEL = 0 and A0 is the input, the output is measured at 1B1. All unused analog input (A) ports are connected to GND, and output (B) ports are connected to GND through 50-Ω pulldown resistors. HP8753ES setup Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 
  

 

 
 
 
  
 SCDS212B − SEPTEMBER 2005 − REVISED APRIL 2006 PARAMETER MEASUREMENT INFORMATION EXT TRIGGER BIAS VBIAS Network Analyzer (HP8753ES) P1 P2 VCC A0 0B1 RL = 100 Ω A1 1B1 DUT 0B2 1B2 SEL VSEL NOTES: A. CL includes probe and jig capacitance. B. A 50-Ω termination resistor is needed to match the loading of the network analyzer. Figure 9. Test Circuit for OFF Isolation (OIRR) OFF isolation is measured at the output of the OFF channel. For example, when VSEL = VCC and A0 is the input, the output is measured at 0B2. All unused analog input (A) ports are left open, and output (B) ports are connected to GND through 50-Ω pulldown resistors. HP8753ES setup Average = 4 RBW = 3 kHz VBIAS = 0.35 V ST = 2 s P1 = 0 dBM 12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TS3L500RHUR ACTIVE WQFN RHU 56 2000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 TK500 TS3L500RHURG4 ACTIVE WQFN RHU 56 2000 RoHS & Green NIPDAUAG Level-1-260C-UNLIM -40 to 85 TK500 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of