TS3USB221AQRSERQ1

Order Now Product Folder Support & Community Tools & Software Technical Documents TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 TS3USB221A-Q1 ESD Protected, High-Speed USB 2.0 (480 Mbps) 1:2 Multiplexer/Demultiplexer Switch With Single Enable 1 Features 2 Applications • • • • • 1 • • • • • • • • • • • Qualified for Automotive Applications AEC-Q100 Qualified With the Following Results: – Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range – Device HBM ESD Classification Level H2 – Device CDM ESD Classification Level C5 VCC Operation at 2.5 V to 3.3 V VI/O Accepts Signals Up to 5.5 V 1.8-V Compatible Control-Pin Inputs Low-Power Mode When OE Is Disabled (1 µA) rON = 16 Ω Maximum ΔrON = 0.2 Ω Typical Cio(on) = 6 pF Typical Low Power Consumption (30 µA Maximum) High Bandwidth (900 MHz Typical) ESD Performance Tested Per JESD 22 – 7000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) ESD Performance I/O to GND Per JESD 22 – 12-kV Human-Body Model Routing High Speed USB Signals Automotive USB Hubs Phone-Controlled Automotive Infotainment 3 Description The TS3USB221A-Q1 is a high-bandwidth switch specially designed for the switching of high-speed USB 2.0 signals in automotive USB hubs or controllers with limited USB I/Os. The wide bandwidth (900 MHz) of this switch allows signals to pass with minimum edge and phase distortion. The device multiplexes differential outputs from a USB host device to one of two corresponding outputs. The switch is bidirectional and offers little or no attenuation of the high-speed signals at the outputs. It is designed for low bit-to-bit skew and high channelto-channel noise isolation, and is compatible with various standards, such as high-speed USB 2.0 (480 Mbps). The TS3USB221A-Q1 integrates ESD protection cells on all pins, is available in a tiny UQFN package (2 mm × 1.5 mm) and is characterized over the free air temperature range from –40°C to 125°C. Device Information(1) PART NUMBER PACKAGE TS3USB221A-Q1 UQFN (10) BODY SIZE (NOM) 1.50 mm × 2.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Block Diagram D+ 1D+ Dí 1Dí 2D+ 2Dí S OE Copyright © 2016, Texas Instruments Incorporated 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com Table of Contents 1 2 3 4 5 6 7 8 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 3 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 3 4 4 4 5 5 6 6 6 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Dynamic Electrical Characteristics: VCC = 3.3 V....... Dynamic Electrical Characteristics: VCC = 2.5 V....... Switching Characteristics: VCC = 3.3 V..................... Switching Characteristics: VCC = 2.5 V..................... Typical Characteristics ............................................ Parameter Measurement Information .................. 8 Detailed Description ............................................ 12 8.1 8.2 8.3 8.4 9 Overview ................................................................. Functional Block Diagram ....................................... Feature Description................................................. Device Functional Modes........................................ 12 12 12 13 Application and Implementation ........................ 14 9.1 Application Information............................................ 14 9.2 Typical Application ................................................. 14 10 Power Supply Recommendations ..................... 16 11 Layout................................................................... 16 11.1 Layout Guidelines ................................................. 16 11.2 Layout Example .................................................... 17 12 Device and Documentation Support ................. 18 12.1 12.2 12.3 12.4 12.5 Receiving Notification of Documentation Updates Community Resource............................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 18 18 18 18 18 13 Mechanical, Packaging, and Orderable Information ........................................................... 18 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision D (August 2016) to Revision E • Page Changed CDM spec to align with AEC Q100-011 ................................................................................................................ 4 Changes from Revision C (October 2012) to Revision D Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section ................................................................................................. 1 • Deleted the Ordering Information table; see the POA at the end of the data sheet .............................................................. 1 • Updated Applications section ................................................................................................................................................. 1 • Changed "in handset and consumer applications, such as cell phones, digital cameras, and notebooks with hubs or controllers with limited USB I/Os" to "in automotive USB hubs or controllers with limited USB I/Os" in Description section 1 • Changed the RθJA and RθJC(top) values in theThermal Information table, and added more thermal values ............................ 4 Changes from Revision B (July 2011) to Revision C Page • Added AEC-Q100 info to Features......................................................................................................................................... 1 • Added "Per JESD 22" to ESD Performance I/O to GND in Features. ................................................................................... 1 • Added ESD ratings to Abs Max table. .................................................................................................................................... 4 2 Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 www.ti.com SCDS300E – JULY 2010 – REVISED JUNE 2020 5 Pin Configuration and Functions RSE Package 10-Pin UQFN Top View RSE Package 10-Pin UQFN Bottom View VCC 1D+ 1 1D– VCC 10 9 2 8 2D+ 3 7 2D– 4 6 5 S 10 1 1D+ 8 2 1D– D– 7 3 2D+ OE 6 4 2D– S 9 D+ D+ D– OE 5 GND GND Pin Functions PIN NO. I/O NAME 1 1D+ I/O 2 1D– I/O 3 2D+ I/O 4 2D– I/O 5 GND — 6 OE I 8 D+ I/O 7 D– I/O 9 S I 10 VCC — DESCRIPTION USB port 1 USB port 2 Ground Bus-switch enable Common USB port Select input Supply voltage 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VCC Supply voltage VIN Control input voltage (2) (3) (2) (3) (4) MIN MAX UNIT –0.5 4.6 V –0.5 7 V VI/O Switch I/O voltage 7 V IIK Control input clamp current VIN < 0 –50 mA II/OK I/O port clamp current VI/O < 0 –50 mA ±120 mA ±100 mA 150 °C II/O ON-state switch current –0.5 (5) Continuous current through VCC or GND Tstg (1) (2) (3) (4) (5) Storage temperature –65 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to ground, unless otherwise specified. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. VI and VO are used to denote specific conditions for VI/O. II and IO are used to denote specific conditions for II/O. Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 3 TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com 6.2 ESD Ratings VALUE Human-body model (HBM), per AEC Q100-002 Classification Level H2 (1) V(ESD) (1) Electrostatic discharge Charged-device model (CDM), per AEC Q100-011 Classification C5 UNIT ±2000 ±750 for corner pins ±500 for all other pins V AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions VCC Supply voltage VIH High-level control input voltage VIL Low-level control input voltage VI/O Data input/output voltage TA Operating free-air temperature MIN MAX 2.3 3.6 VCC = 2.3 V to 2.7 V 0.46 × VCC VCC = 2.7 V to 3.6 V 0.46 × VCC UNIT V V VCC = 2.3 V to 2.7 V 0.25 × VCC VCC = 2.7 V to 3.6 V 0.25 × VCC V 0 5.5 V –40 125 °C 6.4 Thermal Information TS3USB221A-Q1 THERMAL METRIC (1) RSE (UQFN) UNIT 10 PINS RθJA Junction-to-ambient thermal resistance 179.9 °C/W RθJC(top) Junction-to-case (top) thermal resistance 107.9 °C/W RθJB Junction-to-board thermal resistance 100.7 °C/W ψJT Junction-to-top characterization parameter 7.1 °C/W ψJB Junction-to-board characterization parameter 100 °C/W (1) 4 For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report. Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 www.ti.com SCDS300E – JULY 2010 – REVISED JUNE 2020 6.5 Electrical Characteristics over operating free-air temperature range (unless otherwise noted) (1) PARAMETER MIN TYP (2) TEST CONDITIONS MAX UNIT –1.8 V VIK Input-source clamp voltage IIN Input leakage current, VCC = 3.6 V, 2.7 V, 0 V, VIN = 0 V to 3.6 V control inputs ±1 µA Off-state leakage current VCC = 3.6 V, 2.7 V, VO = 0 V to 5.25 V, VI = 0 V, VIN = VCC or GND, Switch OFF ±1 µA I(OFF) Power-off leakage current VCC = 0 V ICC Supply current VCC = 3.6 V, 2.7 V, VIN = VCC or GND, II/O = 0 V, Switch ON or OFF 30 µA ICC Supply current (low power mode) VCC = 3.6 V, 2.7 V, VIN = VCC or GND, Switch disabled, OE in high state 1 µA IOZ (3) VCC = 3.6 V, 2.7 V, II = –18 mA VI/O = 0 V to 5.25 V ±2 VI/O = 0 V to 3.6 V ±2 VI/O = 0 V to 2.7 V ΔICC (4) One input at 1.8 V, Supply-current Other inputs at VCC or change, control inputs GND µA ±1 VCC = 3.6 V 20 VCC = 2.7 V 0.5 µA Cin Input capacitance, control inputs VCC = 3.3 V, 2.5 V, VIN = VCC or 0 V 1.5 2.5 pF Cio(OFF) OFF capacitance VCC = 3.3 V, 2.5 V, VI/O = VCC or 0 V, Switch OFF 3.5 5 pF Cio(ON) ON capacitance VCC = 3.3 V, 2.5 V, VI/O = VCC or 0 V, Switch ON 6 7.5 pF 3 6 3.4 6 6 10 10 16 VI = 0 V, IO = 30 mA (5) RON ON-state resistance VCC = 3 V, 2.3 V VI = 2.4 V, IO = –15 mA VI = 0 V, IO = 30 mA VI = 2.4 V, IO = –15 mA ΔRON ON-state resistance match between channels VCC = 3 V, 2.3 V rON(flat) ON-state resistance flatness VCC = 3 V, 2.3 V (1) (2) (3) (4) (5) TA = 25°C TA = 125°C VI = 0 V, IO = 30 mA 0.2 VI = 1.7, IO = –15 mA 0.2 VI = 0 V, IO = 30 mA 1 VI = 1.7, IO = –15 mA 1 Ω Ω Ω VIN and IIN refer to control inputs. VI, VO, II, and IO refer to data pins. All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C. For I/O ports, the parameter IOZ includes the input leakage current. This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is determined by the lower of the voltages of the two (A or B) terminals. 6.6 Dynamic Electrical Characteristics: VCC = 3.3 V over operating range, TA = –40°C to 125°C, VCC = 3.3 V ±10%, GND = 0 V TYP UNIT XTALK Crosstalk PARAMETER RL = 50 , f = 250 MHz TEST CONDITIONS –40 dB OIRR OFF isolation RL = 50 , f = 250 MHz –41 dB BW Bandwidth (–3 dB) RL = 50 0.9 GHz Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 5 TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com 6.7 Dynamic Electrical Characteristics: VCC = 2.5 V over operating range, TA = –40°C to 125°C, VCC = 2.5 V ±10%, GND = 0 V PARAMETER TEST CONDITIONS TYP UNIT dB XTALK Crosstalk RL = 50 , f = 250 MHz –39 OIRR OFF isolation RL = 50 , f = 250 MHz –40 dB BW Bandwidth (3 dB) RL = 50 0.9 GHz 6.8 Switching Characteristics: VCC = 3.3 V over operating range, TA = –40°C to 125°C, VCC = 3.3 V ±10%, GND = 0 V PARAMETER tpd Propagation delay MIN (2) (3) Line enable time tOFF Line disable time tSK(O) Output skew between center port to any other port (2) (1) (2) (3) MAX 0.25 tON tSK(P) TYP (1) ns S to D, nD 30 OE to D, nD 17 S to D, nD 12 OE to D, nD 10 Skew between opposite transitions of the same output (tPHL– tPLH) (2) UNIT ns ns 0.1 0.2 ns 0.1 0.2 ns For Max or Min conditions, use the appropriate value specified under Dynamic Electrical Characteristics: VCC = 3.3 V for the applicable device type. Specified by design The bus switch contributes no propagational delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25 ns for 10-pF load. Since this time constant is much smaller than the rise and fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side. 6.9 Switching Characteristics: VCC = 2.5 V over operating range, TA = –40°C to 125°C, VCC = 2.5 V ±10%, GND = 0 V PARAMETER tpd Propagation delay MIN (2) (3) TYP (1) MAX 0.25 UNIT ns S to D, nD 50 OE to D, nD 32 S to D, nD 23 OE to D, nD 12 tON Line enable time tOFF Line disable time tSK(O) Output skew between center port to any other port (2) 0.1 0.2 ns tSK(P) Skew between opposite transitions of the same output (tPHL– tPLH) (2) 0.1 0.2 ns (1) (2) (3) 6 ns ns For Max or Min conditions, use the appropriate value specified under Dynamic Electrical Characteristics: VCC = 2.5 V for the applicable device type. Specified by design The bus switch contributes no propagational delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25 ns for 10-pF load. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch, when used in a system, is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side. Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 www.ti.com SCDS300E – JULY 2010 – REVISED JUNE 2020 6.10 Typical Characteristics 0 0 –1 –20 Attenuation (dB) Gain (dB) –2 –3 –4 –40 –60 –80 –5 –100 –6 –120 –7 100.0E+3 100.0E+3 1.0E+6 10.0E+6 100.0E+6 1.0E+9 1.0E+6 10.0E+6 1.0E+9 10.0E+9 Frequency (Hz) Frequency (Hz) Figure 2. OFF Isolation vs Frequency Figure 1. Gain vs Frequency 0 3.5 –20 3.4 3.3 –40 VCC = 3 V ron (Ω) Attenuation (dB) 100.0E+6 10.0E+9 –60 3.2 VCC = 2.3 V 3.1 –80 3.0 –100 2.9 –120 100.0E+3 2.8 1.0E+6 10.0E+6 100.0E+6 1.0E+9 10.0E+9 0.0 0.5 1.0 1.5 3.0 3.5 Submit Documentation Feedback 7 Frequency (Hz) 2.0 2.5 VIN (V) Figure 3. Crosstalk vs Frequency Figure 4. ron vs VIN (IOUT = –15 mA) 3.5 3.4 3.3 ron (Ω) VCC = 3 V 3.2 VCC = 2.3 V 3.1 3.0 2.9 2.8 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VIN (V) Figure 5. rON vs VIN (IOUT = 30 mA) Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com 7 Parameter Measurement Information VCC TEST VOUT1 or VOUT2 1D or 2D RL CL VCOM t ON 500 50 pF V+ t OFF 500 50 pF V+ D VIN CL 1D or 2D RL S VCTRL CL Logic Input 1.8 V Logic Input (VI) RL GND 50% 50% 0 t ON Switch Output (VOUT1 or VOUT2) t OFF 90% 90% VOH VOL Figure 6. Turn-On (tON) and Turn-Off Time (tOFF) V CC Network Analyzer 50 Channel OFF: 1D to D VCTRL = VCC or GND V OUT1 1D V IN D Source Signal 50 2D Network Analyzer Setup V CTRL S 50 Source Power = 0 dBm (632-mV P-P at 50- load) + GND DC Bias = 350 mV Figure 7. OFF Isolation (OISO) V CC Network Analyzer Channel ON: 1D to D 50 Source S ig n al VOUT1 1D Channel OFF: 2D to D V IN VCTRL = VCC to GND 50 Network Analyzer Setup VOUT2 2D V CTRL 50 + S GND Source Power= 0 dBm (632-mV P-P at 50- load) DC Bias= 350 mV Figure 8. Crosstalk (XTALK) 8 Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 www.ti.com SCDS300E – JULY 2010 – REVISED JUNE 2020 Parameter Measurement Information (continued) V CC Network Analyzer 50 VOUT1 Channel ON: 1D to D 1D Source Signal VCTRL=VCC or GND V IN D 2D Network Analyzer Setup V CTRL 50 Source Power= 0 d Bm (632-mV P-P at 50- load) S + GND DC Bias= 350 mV Figure 9. Bandwidth (BW) 800 mV Input 50% 50% 400 mV tPLH tPLH VOH Output 50% 50% VOL Figure 10. Propagation Delay Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 9 TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com Parameter Measurement Information (continued) 800 mV 50% 50% Input 400 mV tPLH tPHL VOH 50% Output VOL tSK(P) = | tPHL – tPLH | PULSE SKEW tSK(P) 800 mV 50% 50% Input 400 mV tPLH1 tPHL1 VOH 50% 50% Output 1 VOL tSK(O) tSK(O) VOH 50% 50% Output 2 tPLH2 VOL tPHL2 tSK(O) = | tPLH1 – tPLH2 | or | tPHL1 – tPHL2 | OUTPUT SKEW tSK(P) Figure 11. Skew Test V CC VOUT1 1D D + VOUT2 VCTRL V IN Channel ON VIN VOUT2 or VOUT1 rON : IIN 2D I IN S VCTRL VIH or VIL + GND Figure 12. ON-State Resistance (ron) 10 Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 www.ti.com SCDS300E – JULY 2010 – REVISED JUNE 2020 Parameter Measurement Information (continued) VCC VOUT1 1D VOUT2 2D V IN D + + OFF- State Leakage Current Channel OFF VCTRL VCTRL=VIH or VIL S + GND Figure 13. OFF-State Leakage Current V CC VOUT1 1D Capacitance Meter V BIAS VBIAS= VCC or GND VOUT1 2D VIN VCTRL= VCC or GND Capacitance is measured at 1D, 2D, D, and S inputs during ON and of OFF conditions. D VCTRL S GND Figure 14. Capacitance Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 11 TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com 8 Detailed Description 8.1 Overview The TS3USB221A-Q1 device is a 2-channel SPDT switch specially designed for the switching of high-speed USB 2.0 signals in automotive applications, such as USB hubs. The wide bandwidth (900 MHz) of this switch allows signals to pass with minimum edge and phase distortion. The device multiplexes differential outputs from a USB host device to one of two corresponding outputs. The switch is bidirectional and offers little or no attenuation of the high-speed signals at the outputs. The device also has a low power mode that will reduce the power consumption to 1 µA for portable applications with a battery or limited power budget. The device is designed for low bit-to-bit skew and high channel-to-channel noise isolation, and is compatible with various standards, such as high-speed USB 2.0 (480 Mbps). The TS3USB221A-Q1 device integrates ESD protection cells on all pins, is available in a tiny UQFN package (2 mm × 1.5 mm) and is characterized over the free air temperature range from –40°C to 125°C. 8.2 Functional Block Diagram D+ 1D+ Dí 1Dí 2D+ 2Dí S OE Copyright © 2016, Texas Instruments Incorporated Figure 15. Block Diagram A B V CC Charge Pump EN Copyright © 2016, Texas Instruments Incorporated EN is the internal enable signal applied to the switch. Figure 16. Simplified Schematic of Each FET Switch (SW) 8.3 Feature Description 8.3.1 Low Power Mode The TS3USB221A-Q1 has a low power mode that reduces the power consumption to 1 µA while the devices is not in use. To put the device in low power mode and disable the switch, the bus-switch enable pin OE must be supplied with a logic High signal. 12 Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 www.ti.com SCDS300E – JULY 2010 – REVISED JUNE 2020 8.4 Device Functional Modes Table 1 lists the functions of this device. Table 1. Truth Table S OE FUNCTION X H Disconnect L L D = 1D H L D = 2D Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 13 TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information There are many USB applications in which the USB hubs or controllers have a limited number of USB I/Os. The TS3USB221A-Q1 solution can effectively expand the limited USB I/Os by switching between multiple USB buses to interface them to a single USB hub or controller. 9.2 Typical Application 3.3 V 0.1 F 0.1 F VCC System Controller TS3USB221A-Q1 2-channel Switch Control Logic S OE 1D+ 1D- USB Port 1 D+ USB Controller D2D+ 2D- USB Port 2 GND Copyright © 2016, Texas Instruments Incorporated Figure 17. Application Schematic 9.2.1 Design Requirements Design requirements of the USB 1.0,1.1, and 2.0 standards should be followed. TI recommends pulling the digital control pins S and OE up to VCC or down to GND to avoid undesired switch positions that could result from the floating pin. 9.2.2 Detailed Design Procedure The TS3USB221A-Q1 can be properly operated without any external components. However, TI recommends connecting unused pins to ground through a 50-Ω resistor to prevent signal reflections back into the device. 14 Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 www.ti.com SCDS300E – JULY 2010 – REVISED JUNE 2020 Typical Application (continued) 0.5 0.5 0.4 0.4 0.3 0.3 Differential Signal (V) Differential Signal (V) 9.2.3 Application Curves 0.2 0.1 0.0 –0.1 –0.2 0.2 0.1 0.0 –0.1 –0.2 –0.3 –0.3 –0.4 –0.4 –0.5 –0.5 0.0 0.2 0.4 0.5 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.0 0.2 0.4 0.5 –9 0.8 1.0 1.2 1.4 1.6 1.8 2.0 –9 Time (X 10 ) (s) Time (X 10 ) (s) Figure 18. Eye Pattern: 480-Mbps USB Signal With No Switch (Through Path) Figure 19. Eye Pattern: 480-Mbps USB Signal With Switch NC Path 0.5 0.4 Differential Signal (V) 0.3 0.2 0.1 0.0 –0.1 –0.2 –0.3 –0.4 –0.5 0.0 0.2 0.4 0.5 0.8 1.0 1.2 1.4 1.6 1.8 2.0 –9 Time (X 10 ) (s) Figure 20. Eye Pattern: 480-Mbps USB Signal With Switch NO Path Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 15 TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com 10 Power Supply Recommendations Power to the device is supplied through the VCC pin and should follow the USB 1.0, 1.1, and 2.0 standards. TI recommends placing a bypass capacitor as close to the supply pin VCC to help smooth out lower frequency noise to provide better load regulation across the frequency spectrum. 11 Layout 11.1 Layout Guidelines Place supply bypass capacitors as close to VCC pin as possible, and avoid placing the bypass capacitors near the D+/D- traces. The high speed D+/D- traces should always be matched lengths and must be no more than 4 inches; otherwise, the eye diagram performance may be degraded. A high-speed USB connection is made through a shielded, twisted pair cable with a differential characteristic impedance. In layout, the impedance of D+ and D- traces should match the cable characteristic differential impedance for optimal performance. Route the high-speed USB signals using a minimum of vias and corners which will reduce signal reflections and impedance changes. When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points on twisted pair lines; through-hole pins are not recommended. When it becomes necessary to turn 90°, use two 45° turns or an arc instead of making a single 90° turn. This reduces reflections on the signal traces by minimizing impedance discontinuities. Do not route USB traces under or near crystals, oscillators, clock signal generators, switching regulators, mounting holes, magnetic devices or IC’s that use or duplicate clock signals. Avoid stubs on the high-speed USB signals because they cause signal reflections. If a stub is unavoidable, then the stub should be less than 200 mm. Route all high-speed USB signal traces over continuous planes (VCC or GND), with no interruptions. Avoid crossing over anti-etch, commonly found with plane splits. Due to high frequencies associated with the USB, TI recommends a printed-circuit board with at least four layers; two signal layers separated by a ground and power layer as shown in Figure 21. Signal 1 GND Plane Power Plane Signal 2 Figure 21. Four-Layer Board Stack-Up The majority of signal traces should run on a single layer, preferably Signal 1. Immediately next to this layer should be the GND plane, which is solid with no cuts. Avoid running signal traces across a split in the ground or power plane. When running across split planes is unavoidable, sufficient decoupling must be used. Minimizing the number of signal vias reduces EMI by reducing inductance at high frequencies. 16 Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 TS3USB221A-Q1 www.ti.com SCDS300E – JULY 2010 – REVISED JUNE 2020 11.2 Layout Example LEGEND VIA to Power Plane Polygonal Copper Pour VIA to GND Plane Bypass Capacitor V+ To Microcontroller 10 1 1D+ VCC S 9 2 1D- D+ 8 3 2D+ D- 7 USB Port 1 To USB Host USB Port 2 4 2D- OE 6 GND 5 To Microcontroller Figure 22. Package Layout Diagram Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 17 TS3USB221A-Q1 SCDS300E – JULY 2010 – REVISED JUNE 2020 www.ti.com 12 Device and Documentation Support 12.1 Receiving Notification of Documentation Updates To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. 12.2 Community Resource TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. 12.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 18 Submit Documentation Feedback Copyright © 2010–2020, Texas Instruments Incorporated Product Folder Links: TS3USB221A-Q1 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TS3USB221AQRSERQ1 ACTIVE UQFN RSE 10 3000 RoHS & Green NIPDAUAG Level-3-260C-168 HR -40 to 125 OFW (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of