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TS5A23157
SCDS165F – MAY 2004 – REVISED JANUARY 2019
TS5A23157 Dual 10-Ω SPDT Analog Switch
1 Features
•
•
•
•
•
•
•
•
•
1
•
3 Description
Low ON-State Resistance (15 Ω at 125℃)
125℃ Operation
Control Inputs are 5-V Tolerant
Specified Break-Before-Make Switching
Low Charge Injection
Excellent ON-Resistance Matching
Low Total Harmonic Distortion
1.8-V to 5.5-V Single-Supply Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
The TS5A23157 device is a dual single-pole doublethrow (SPDT) analog switch designed to operate from
1.65 V to 5.5 V. This device can handle both digital
and analog signals. Signals up to 5.5 V (peak) can be
transmitted in either direction.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TS5A23157DGS
VSSOP (10)
3.00 mm × 3.00 mm
TS5A23157RSE
UQFN (10)
2.00 mm × 1.50 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
•
Sample-and-Hold Circuits
Battery-Powered Equipment
Audio and Video Signal Routing
Communication Circuits
Block Diagram
IN1
COM1
NC1
NO1
IN2
COM2
NC2
NO2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A23157
SCDS165F – MAY 2004 – REVISED JANUARY 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
7
8
1
1
1
2
3
4
Absolute Maximum Ratings ...................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics for 5-V Supply................... 5
Electrical Characteristics for 3.3-V Supply................ 7
Electrical Characteristics for 2.5-V Supply................ 8
Electrical Characteristics for 1.8-V Supply................ 9
Typical Characteristics ............................................ 10
Parameter Measurement Information ................ 12
Detailed Description ............................................ 16
8.1 Overview ................................................................. 16
8.2 Functional Block Diagram ....................................... 16
8.3 Feature Description................................................. 16
8.4 Device Functional Modes........................................ 16
9
Application and Implementation ........................ 17
9.1 Application Information............................................ 17
9.2 Typical Application ................................................. 17
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example .................................................... 19
12 Device and Documentation Support ................. 20
12.1
12.2
12.3
12.4
12.5
12.6
Device Support ....................................................
Documentation Support .......................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
21
21
21
21
21
13 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (June 2015) to Revision F
Page
•
Changed Feature From: Low ON-State Resistance (10 Ω) To: Low ON-State Resistance (15 Ω at 125℃) ........................ 1
•
Added Feature : 125℃ Operation .......................................................................................................................................... 1
•
Added Junction Temperature To the Absolute Maximum Ratings table ................................................................................ 4
•
Changed the Operating temperature MAX value From: 85°C To: 125°C in the Recommended Operating Conditions
table ........................................................................................................................................................................................ 4
•
Changed the Thermal Information table ................................................................................................................................. 4
•
Changed ron in the Electrical Characteristics for 5-V Supply table......................................................................................... 5
•
Changed VIH in the Electrical Characteristics for 5-V Supply table ........................................................................................ 5
•
Changed tON and tOFF in the Electrical Characteristics for 5-V Supply table .......................................................................... 5
•
Changed ron in the Electrical Characteristics for 3.3-V Supply table...................................................................................... 7
•
Changed tON and tOFF in the Electrical Characteristics for 3.3-V Supply table ....................................................................... 7
•
Changed ron in the Electrical Characteristics for 2.5-V Supply table...................................................................................... 8
•
Changed tON and tOFF in the Electrical Characteristics for 2.5-V Supply table ....................................................................... 8
•
Changed ron in the Electrical Characteristics for 1.8-V Supply table...................................................................................... 9
•
Changed tON and tOFF in the Electrical Characteristics for 1.8-V Supply table ....................................................................... 9
Changes from Revision D (October 2013) to Revision E
•
2
Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
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TS5A23157
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SCDS165F – MAY 2004 – REVISED JANUARY 2019
5 Pin Configuration and Functions
DGS Package
10-Pin VSSOP
Top View
RSE Package
10-Pin UQFN
Top View
COM1
IN1
1
10
NO1
2
9
NC1
GND
3
8
NO2
4
IN2
5
COM1
IN1
1
9
NC1
V+
NO1
2
8
V+
7
NC2
GND
3
7
NC2
6
COM2
NO2
4
6
COM2
10
5
IN2
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
IN1
I
2
NO1
I/O
Select pin for switch 1
Normally open I/O for switch 1
3
GND
—
Ground
4
NO2
I/O
Normally open I/O for switch 2
5
IN2
I
6
COM2
I/O
Common I/O for switch 2
7
NC2
I/O
Normally closed I/O for switch 2
8
V+
—
Power supply pin
9
NC1
I/O
Normally closed I/O for switch 1
10
COM1
I/O
Common I/O for switch 1
Select pin for switch 2
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SCDS165F – MAY 2004 – REVISED JANUARY 2019
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
V+
Supply voltage (2)
–0.5
6.5
V
VNC
VNO
VCOM
Analog voltage (2) (3) (4)
–0.5
V+ + 0.5
V
II/OK
Analog port diode current
VNC, VNO, VCOM < 0 or VNC, VNO, VCOM > V+
±50
mA
INC
INO
ICOM
On-state switch current
VNC, VNO, VCOM = 0 to V+
±50
mA
VIN
Digital input voltage (2) (3)
IIK
Digital input clamp current
–0.5
VIN < 0
Continuous current through V+ or GND
TJ
Junction Temperature
Tstg
Storage temperature
(1)
(2)
(3)
(4)
–65
6.5
V
–50
mA
±100
mA
150
°C
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
Electrostatic
discharge
(1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VI/O
Switch input/output voltage
V+
Supply voltage
VI
Control input voltage
TA
Operating temperature
MIN
MAX
0
V+
UNIT
V
1.65
5.5
V
0
5.5
V
–40
125
°C
6.4 Thermal Information
TS5A23157
THERMAL METRIC (1)
DGS (VSSOP)
RSE (UQFN)
UNIT
10 PINS
10 PINS
RθJA
Junction-to-ambient thermal resistance
210.5
215.4
°C/W
RθJCtop
Junction-to-case (top) thermal resistance
99.1
140.2
°C/W
RθJB
Junction-to-board thermal resistance
132.4
137.9
°C/W
ψJT
Junction-to-top characterization parameter
29.1
13.7
°C/W
ψJB
Junction-to-board characterization parameter
130.5
137.6
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SCDS165F – MAY 2004 – REVISED JANUARY 2019
6.5 Electrical Characteristics for 5-V Supply
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP (1)
MAX
UNIT
ANALOG SWITCH
VCOM, VNO,
Analog signal range
VNC
0
ron
ON-state resistance
0 ≤ VNO or VNC ≤ V+,
ICOM = –30 mA,
Switch ON,
see Figure 9
Δron
ON-state resistance
match between
channels
VNO or VNC = 3.15 V,
ICOM = –30 mA,
ron(flat)
ON-state resistance
flatness
INC(OFF),
INO(OFF)
V+
Full
V
10
Ω
-40 to
125°C
4.5 V
Switch ON,
see Figure 9
25°C
4.5 V
0.15
Ω
0 ≤ VNO or VNC ≤ V+,
ICOM = –30 mA,
Switch ON,
see Figure 9
25°C
4.5 V
4
Ω
NC, NO
OFF leakage current
VNC or VNO = 0 to V+,
VCOM = 0 to V+,
Switch OFF,
see Figure 10
25°C
INC(ON),
INO(ON)
NC, NO
ON leakage current
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
see Figure 10
25°C
ICOM(ON)
COM
ON leakage current
VNC or VNO = Open,
VCOM = 0 to V+,
Switch ON,
see Figure 10
25°C
Full
Full
Full
5.5 V
5.5 V
5.5 V
15
–1
0.05
1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
µA
µA
µA
DIGITAL INPUTS (IN12, IN2) (2)
Full
VIH
Input logic high
VIL
Input logic low
IIH, IIL
Input leakage current
-40 to
125°C
V+ × 0.7
4.75
V to
5.25
V
V
3.1
Full
25°C
VIN = 5.5 V or 0
Full
V+ × 0.3
5.5 V
–1
0.05
1
–1
1
V
µA
DYNAMIC
tON
Turnon time
tOFF
Turnoff time
VNC = GND and VNO = V+
or
VNC = V+ and VNO = GND,
RL = 500 Ω,
CL = 50 pF,
see Figure 12
VNC = GND and VNO = V+
or
VNC = V+ and VNO = GND,
RL = 500 Ω,
CL = 50 pF,
see Figure 12
Full
4.5 V
to
5.5 V
1.7
5.7
ns
-40 to
125°C
4.75
V to
5.25
V
1.2
8.7
ns
Full
4.5 V
to
5.5 V
0.8
3.8
ns
-40 to
125°C
4.75
V to
5.25
V
0.5
6.8
ns
0.5
tBBM
Break-before-make time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
see Figure 13
Full
4.5 V
to
5.5 V
QC
Charge injection
VNC = VNO = V+/2,
RL = 50 Ω,
See Figure 17
25°C
5V
7
pC
CNC(OFF),
CNO(OFF)
NC, NO
OFF capacitance
VNC or VNO = V+ or GND,
Switch OFF,
see Figure 11
25°C
5V
5.5
pF
CNC(ON),
CNO(ON)
NC, NO
ON capacitance
VNC or VNO = V+ or GND,
Switch ON,
see Figure 11
25°C
5V
17.5
pF
CCOM(ON)
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
see Figure 11
25°C
5V
17.5
pF
CIN
Digital input
capacitance
VIN = V+ or GND,
See Figure 11
25°C
5V
2.8
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
see Figure 14
25°C
4.5 V
220
MHz
(1)
(2)
ns
TA = 25°C.
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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Electrical Characteristics for 5-V Supply (continued)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP (1)
OISO
OFF isolation
RL = 50 Ω,
f = 10 MHz,
XTALK
Crosstalk
RL = 50 Ω,
f = 10 MHz,
Switch ON,
see Figure 16
25°C
4.5 V
–66
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 600 Hz to
20 kHz,
see Figure 18
25°C
4.5 V
0.01%
I+
Positive supply
current
VIN = V+ or GND,
Switch ON or OFF
ΔI+
Change in
supply current
VIN = V+ – 0.6 V
MAX
UNIT
Switch OFF,
see Figure 15
25°C
4.5 V
–65
dB
dB
SUPPLY
6
25°C
Full
Full
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5.5 V
5.5 V
1
10
500
µA
µA
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SCDS165F – MAY 2004 – REVISED JANUARY 2019
6.6 Electrical Characteristics for 3.3-V Supply
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP (1)
MAX
UNIT
ANALOG SWITCH
VCOM, VNO,
Analog signal range
VNC
0
ron
ON-state resistance
0 ≤ VNO or VNC ≤ V+,
ICOM = –24 mA,
Switch ON,
see Figure 9
Δron
ON-state resistance
match between
channels
VNO or VNC = 2.1 V,
ICOM = –24 mA,
ron(flat)
ON-state resistance
flatness
INC(OFF),
INO(OFF)
V+
Full
V
18
Ω
-40 to
125°C
3V
Switch ON,
see Figure 9
25°C
3V
0.2
Ω
0 ≤ VNO or VNC ≤ V+,
ICOM = –24 mA,
Switch ON,
see Figure 11
25°C
3V
9
Ω
NC, NO
OFF leakage current
VNC or VNO = 0 to V+,
VCOM = 0 to V+,
Switch OFF,
see Figure 10
25°C
INC(ON),
INO(ON)
NC, NO
ON leakage current
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
see Figure 10
25°C
ICOM(ON)
COM
ON leakage current
VNC or VNO = Open,
VCOM = 0 to V+,
Switch ON,
see Figure 10
25°C
Full
Full
Full
23
3.6 V
3.6 V
3.6 V
–1
0.05
1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
µA
µA
µA
DIGITAL INPUTS (IN12, IN2) (2)
VIH
Input logic high
Full
V+ × 0.7
V
V+ ×
0.3
VIL
Input logic low
Full
IIH, IIL
Input leakage current
VIN = 5.5 V or 0
tON
Turn-on time
VNC = GND and VNO = V+
or
VNC = V+ and VNO = GND,
RL = 500 Ω,
CL = 50 pF,
see Figure 12
-40 to
125°C
tOFF
Turnoff time
VNC = GND and VNO = V+
or
VNC = V+ and VNO = GND,
RL = 500 Ω,
CL = 50 pF,
see Figure 12
-40 to
125°C
tBBM
Break-before-make time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
see Figure 13
Full
3 V to
3.6 V
QC
Charge injection
RL = 50 Ω,
CL = 0.1 nF,
see Figure 17
25°C
3.3 V
BW
Bandwidth
RL = 50 Ω,
Switch ON,
see Figure 14
25°C
3V
220
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
see Figure 15
25°C
3V
–65
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 10 MHz,
Switch ON,
see Figure 16
25°C
3V
–66
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 600 Hz to
20 kHz,
see Figure 18
25°C
3V
0.015%
I+
Positive supply
current
VIN = V+ or GND,
Switch ON or OFF
ΔI+
Change in
supply current
VIN = V+ – 0.6 V
25°C
Full
3.6 V
–1
0.05
1
V
µA
–1
1
2.5
7.6
ns
2.0
10.6
ns
1.5
5.3
ns
1.0
8.3
ns
DYNAMIC
Full
Full
3 V to
3.6 V
3 V to
3.6 V
0.5
ns
3
pC
SUPPLY
(1)
(2)
25°C
Full
Full
3.6 V
3.6 V
1
10
500
µA
µA
TA = 25°C.
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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6.7 Electrical Characteristics for 2.5-V Supply
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP (1)
MAX
UNIT
ANALOG SWITCH
VCOM, VNO,
Analog signal range
VNC
0
ron
ON-state resistance
0 ≤ VNO or VNC ≤ V+,
ICOM = –8 mA,
Switch ON,
see Figure 9
Δron
ON-state resistance
match
between channels
VNO or VNC = 1.6 V,
ICOM = –8 mA,
ron(flat)
ON-state resistance
flatness
INC(OFF),
INO(OFF)
V+
Full
V
45
Ω
-40 to
125°C
2.3 V
Switch ON,
see Figure 9
25°C
2.3 V
0.5
Ω
0 ≤ VNO or VNC ≤ V+,
ICOM = –8 mA,
Switch ON,
see Figure 9
25°C
2.3 V
27
Ω
NC, NO
OFF leakage current
VNC or VNO = 0 to V+,
VCOM = 0 to V+,
Switch OFF,
see Figure 10
25°C
INC(ON),
INO(ON)
NC, NO
ON leakage current
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
see Figure 10
25°C
ICOM(ON)
COM
ON leakage current
VNC or VNO = Open,
VCOM = 0 to V+,
Switch ON,
see Figure 10
25°C
Full
Full
Full
2.7 V
2.7 V
2.7 V
50
–1
0.05
1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
µA
µA
µA
DIGITAL INPUTS (IN12, IN2) (2)
VIH
Input logic high
Full
V+ × 0.7
V
V+ ×
0.3
VIL
Input logic low
Full
IIH, IIL
Input leakage current
VIN = 5.5 V or 0
tON
Turnon time
VNC = GND and VNO = V+
or
VNC = V+ and VNO = GND,
RL = 500 Ω,
CL = 50 pF,
see Figure 12
-40 to
125°C
tOFF
Turnoff time
VNC = GND and VNO = V+
or
VNC = V+ and VNO = GND,
RL = 500 Ω,
CL = 50 pF,
see Figure 12
-40 to
125°C
tBBM
Break-before-make time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
see Figure 13
Full
2.3 V
to
2.7 V
BW
Bandwidth
RL = 50 Ω,
Switch ON,
see Figure 14
25°C
2.3 V
220
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
see Figure 15
25°C
2.3 V
–65
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 10 MHz,
Switch ON,
see Figure 16
25°C
2.3 V
–66
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 600 Hz to
20 kHz,
see Figure 18
25°C
2.3 V
0.025%
I+
Positive supply
current
VIN = V+ or GND,
Switch ON or OFF
ΔI+
Change in
supply current
VIN = V+ – 0.6 V
25°C
Full
2.7 V
–1
0.05
1
V
µA
–1
1
2.3 V
to
2.7 V
3.5
14
2.5
17
2.3 V
to
2.7 V
2
7.5
ns
1.5
10.5
ns
DYNAMIC
Full
Full
0.5
ns
ns
SUPPLY
(1)
(2)
8
25°C
Full
Full
2.7 V
2.7 V
1
10
500
µA
µA
TA = 25°C.
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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SCDS165F – MAY 2004 – REVISED JANUARY 2019
6.8 Electrical Characteristics for 1.8-V Supply
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP (1)
MAX
UNIT
ANALOG SWITCH
VCOM,
VNO, VNC
Analog signal range
ron
ON-state resistance
0 ≤ VNO or VNC ≤ V+,
ICOM = –4 mA,
Switch ON,
see Figure 9
Δron
ON-state resistance
match between channels
VNO or VNC = 1.15 V,
ICOM = –4 mA,
ron(flat)
ON-state resistance
flatness
INC(OFF),
INO(OFF)
0
V+
Full
V
140
Ω
-40 to
125°C
1.65 V
Switch ON,
see Figure 9
25°C
1.65 V
1
Ω
0 ≤ VNO or VNC ≤ V+,
ICOM = –4 mA,
Switch ON,
see Figure 9
25°C
1.65 V
110
Ω
NC, NO
OFF leakage current
VNC or VNO = 0 to V+,
VCOM = 0 to V+,
Switch OFF,
see Figure 10
25°C
INC(ON),
INO(ON)
NC, NO
ON leakage current
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
see Figure 10
25°C
ICOM(ON)
COM
ON leakage current
VNC or VNO = Open,
VCOM = 0 to V+,
Switch ON,
see Figure 10
25°C
Full
Full
Full
1.95 V
1.95 V
1.95 V
180
–1
0.05
1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
µA
µA
µA
DIGITAL INPUTS (IN12, IN2) (2)
VIH
Input logic high
Full
VIL
Input logic low
Full
IIH, IIL
25°C
V+ × 0.75
V
V+ × 0.25
0.05
1
V
Input leakage current
VIN = 5.5 V or 0
tON
Turnon time
VNC = GND and VNO = V+
or
VNC = V+ and VNO = GND,
RL = 500 Ω,
CL = 50 pF,
see Figure 12
-40 to
125°C
tOFF
Turnoff time
VNC = GND and VNO = V+
or
VNC = V+ and VNO = GND,
RL = 500 Ω,
CL = 50 pF,
see Figure 12
-40 to
125°C
tBBM
Break-before-make time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
see Figure 13
Full
1.65 V
to
1.95 V
BW
Bandwidth
RL = 50 Ω,
Switch ON,
see Figure 14
25°C
1.8 V
220
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
see Figure 15
25°C
1.8 V
–60
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 10 MHz,
Switch ON,
see Figure 16
25°C
1.8 V
–66
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 600 Hz to
20 kHz,
see Figure 18
25°C
1.8 V
0.015%
I+
Positive supply
current
VIN = V+ or GND,
Switch ON or OFF
ΔI+
Change in
supply current
VIN = V+ – 0.6 V
Full
1.95 V
–1
µA
–1
1
7
24
ns
5.5
27
ns
3
13
2
16
DYNAMIC
Full
Full
1.65 V
to
1.95 V
1.65 V
to
1.95 V
0.5
ns
ns
SUPPLY
(1)
(2)
25°C
Full
Full
1.95 V
1.95 V
1
10
500
µA
µA
TA = 25°C.
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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6.9 Typical Characteristics
20
140
TA = 25°C
120
V+ = 1.65 V
16
80
ron − Ω
ron − Ω
100
60
V+ = 2.3 V
40
12
8
V+ = 3 V
20
TA = +85°C
TA = +25°C
TA = –40°C
V+ = 4.5 V
0
4
0
1
2
3
VCOM − V
4
0
5
0.5
1
1.5
2
VCOM − V
2.5
3
3.5
80
100
Figure 2. ron vs VCOM (V+ = 3 V)
Figure 1. ron vs VCOM
10
5
INC(OFF), INO(OFF),
INC(ON), INO(ON), and
ICOM(ON)
OFF
TA = +85°C
TA = +25°C
TA = −40°C
4
ron − Ω
Leakage − nA
8
6
3
ON
2
1
0
−1
−60
4
0
1
2
3
VCOM − V
4
5
−40
40
60
5
tON
TA = 25°C
10
4
tON/tOFF − ns
tON/tOFF − ns
20
Figure 4. Leakage Current vs Temperature
(V+ = 5.5 V)
12
8
6
tON
4
tOFF
2
2.5
3
3.5
4
4.5
V+ − Supply Voltage − V
Figure 5. tON and tOFF vs V+
tOFF
3
2
1
2
10
0
Temperature − °C
Figure 3. ron vs VCOM (V+ = 5 V)
0
1.5
−20
5
5.5
0
−60
−40
−20
0
20
40
TA − Temperature − °C
60
80
100
Figure 6. tON and tOFF vs Temperature (V+ = 5 V)
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Typical Characteristics (continued)
0.0020
0.0018
10
0
−20
0.0016
Bandwidth
THD + Noise − %
−10
Loss − dB
−30
−40
−50
Off-Isolation
−60
−70
TA = 25°C
−80
−90
−100
0.1
0.0014
0.0012
0.0010
0.0008
0.0006
0.0004
0.0000
1
10
Frequency − MHz
TA = 25°C
0.0002
Crosstalk
100
1000
100
Figure 7. Frequency Response (V+ = 3 V)
1000
Frequency −Hz
10000
Figure 8. Total Harmonic Distortion
(THD) vs Frequency (V+ = 3 V)
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7 Parameter Measurement Information
V+
VNC
NC
VCOM
Channel ON
NO
VNO
COM
r on =
IN
ICOM
VIN
VCOM
VNO /NC
ICOM
Ω
VIN = VIH or VIL
GND
Figure 9. ON-State Resistance (ron)
V+
VNC
OFF-State Leakage Current
Channel OFF
VIN = VIH or VIL
NO
VNO
COM
ON-State Leakage Current
Channel ON
VIN = VIH or VIL
IN
VIN
VNC or VNO = 0 to V+
or
VCOM = 0 to V+
VCOM
NC
VNC or VNO = 0 to V+, VCOM = Open
or
VNC or VNO = Open, VCOM = 0 to V+
GND
Figure 10. ON- and OFF-State Leakage Current (ICOM(ON), INC(OFF), INO(OFF), INC(ON), INO(ON))
V+
VCOM
Capacitance
Meter
VBIAS = V+ or GND
VNC
VIN = VIH or VIL
VNO
VBIAS
VIN
Capacitance is measured at NC,
NO, COM, and IN inputs during
ON and OFF conditions.
IN
GND
Figure 11. Capacitance (CIN, CCOM(ON), CNC(OFF), CNO(OFF), CNC(ON), CNO(ON))
12
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Parameter Measurement Information (continued)
V+
TEST
VNC or VNO
NC or NO
VNC
VNO
V+
GND
V+
GND
tON
500 Ω
50 pF
GND
V+
tOFF
500 Ω
50 pF
GND
V+
COM
RL
CL
Logic
Input
IN
Logic
Input
CL
VCOM
NC or NO
VIN
RL
50%
50%
VIN
tON
GND
Switch
Output
tOFF
90%
VCOM
90%
Figure 12. Turnon (tON) and Turnoff (tOFF) Time
V+
tr < 5 ns
tf < 5 ns
VI
COM
RL
CL
IN
Logic
Input
50%
0
NC or NO
VIN
Logic
VIN
Input
VCOM
NC or NO
Switch
Output VCOM
VI = V+/2
RL = 50 Ω
CL = 35 pF
GND
90%
90%
tBBM
Figure 13. Break-Before-Make (tBBM) Time
V+
Network Analyzer
50 Ω
VNC
Channel ON: NC to COM
NC
COM
Source
Signal
VCOM
Gain = 20 log
NO
50 Ω
VIN
VCOM
dB
VNC
Network Analyzer Setup
IN
GND
Source Power = 0 dBM
DC Bias = 350 mV
Figure 14. Frequency Response (BW)
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Parameter Measurement Information (continued)
V+
Network Analyzer
50 Ω
VNC
Channel OFF: NC to COM
NC
COM
Source
Signal
50 Ω
VCOM
VCOM
dB
VNC
OFF Isolation = 20 log
NO
GND
Network Analyzer Setup
50 Ω
Source Power = 0 dBM
DC Bias = 350 mV
Figure 15. OFF Isolation (OISO)
V+
Network Analyzer
Channel ON: NC to COM
50 Ω
VNC
NC
Channel OFF: NO to COM
VCOM
Source
Signal
Crosstalk = 20 log
NO
VNO
VNO
dB
VNC
50 Ω
GND
50 Ω
Network Analyzer Setup
Source Power = 0 dBM
DC Bias = 350 mV
Figure 16. Crosstalk (XTALK)
V+
Logic
Input
NC or NO
ON
VOUT
COM
RL
VIN
OFF
OFF
VOUT
NC or NO
+
VIN
VINL
RGEN
VGEN
VINH
CL
DVOUT
VGEN = 0
IN
RGEN = 0
RL = 1 MΩ
Logic
Input
CL = 35 pF
QC = CL × ΔVOUT
VIN = VIH or VIL
GND
Figure 17. Charge Injection (QC)
14
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Parameter Measurement Information (continued)
Channel ON: COM to NC
V+/2
VSOURCE = 0.5 V P-P
V+
10 µF
Analyzer
fSOURCE = 600 Hz to 20 kHz
RL
RL = 600 Ω
NC
10 µF
VO
CL
NO
CL = 50 pF
COM
RL
VSOURCE
GND
Figure 18. Total Harmonic Distortion (THD)
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8 Detailed Description
8.1 Overview
The TS5A23157 is a dual single-pole-double-throw (SPDT) solid-state analog switch. The TS5A23157, like all
analog switches, is bidirectional. When powered on, each COM pin is connected to its respective NC pin when
the IN pin is low. For this device, NC stands for normally closed and NO stands for normally open. If IN is low,
COM is connected to NC. If IN is high, COM is connected to NO.
The TS5A23157 is a break-before-make switch. This means that during switching, a connection is broken before
a new connection is established. The NC and NO pins are never connected to each other.
8.2 Functional Block Diagram
IN1
COM1
NC1
NO1
IN2
COM2
NC2
NO2
8.3 Feature Description
The low ON-state resistance, ON-state resistance matching, and charge injection in the TS5A23157 make this
switch an excellent choice for analog signals that require minimal distortion. In addition, the low THD allows
audio signals to be preserved more clearly as they pass through the device.
The 1.65-V to 5.5-V operation allows compatibility with more logic levels, and the bidirectional I/Os can pass
analog signals from 0 V to V+ with low distortion. The control inputs are 5-V tolerant, allowing control signals to
be present without VCC.
8.4 Device Functional Modes
Table 1 lists the functional modes for TS5A23157.
Table 1. Function Table
16
IN
NC TO COM,
COM TO NC
NO TO COM,
COM TO NO
L
ON
OFF
H
OFF
ON
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TS5A3157 can be used in a variety of customer systems. The TS5A3157 can be used anywhere multiple
analog or digital signals must be selected to pass across a single line.
9.2 Typical Application
5V
V+
MCU or
System Logic
1
MCU or
System Logic
2
IN1
NO1
To/From
System 1
COM1
NC1
IN2
NO2
To/From
System 2
COM2
NC2
GND
Figure 19. System Schematic for TS5A23157
9.2.1 Design Requirements
In this particular application, V+ was 5 V, although V+ is allowed to be any voltage specified in Recommended
Operating Conditions. A decoupling capacitor is recommended on the V+ pin. See Power Supply
Recommendations for more details.
9.2.2 Detailed Design Procedure
In this application, IN is, by default, pulled low to GND. Choose the resistor size based on the current driving
strength of the GPIO, the desired power consumption, and the switching frequency (if applicable). If the GPIO is
open-drain, use pullup resistors instead.
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Typical Application (continued)
9.2.3 Application Curve
100
90
80
ICC+ − nA
70
60
50
40
30
20
10
0
−60
−40
−20
0
20
40
60
TA − Temperature − °C
80
100
Figure 20. Power-Supply Current vs Temperature (V+ = 5 V)
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF bypass capacitor is recommended. If there are multiple pins labeled VCC, then a 0.01-μF or
0.022-μF capacitor is recommended for each VCC because the VCC pins will be tied together internally. For
devices with dual supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass
capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results.
18
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11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Below figure shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
Unused switch I/Os, such as NO, NC, and COM, can be left floating or tied to GND. However, the IN pin must be
driven high or low. Due to partial transistor turnon when control inputs are at threshold levels, floating control
inputs can cause increased ICC or unknown switch selection states.
11.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 21. Trace Example
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Device Nomenclature
Table 2. Parameter Description
SYMBOL
DESCRIPTION
VCOM
Voltage at COM
VNC
Voltage at NC
VNO
Voltage at NO
ron
Resistance between COM and NC or COM and NO ports when the channel is ON
Δron
Difference of ron between channels
ron(flat)
Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
INC(OFF)
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the OFF state under worstcase input and output conditions
INO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state under worstcase input and output conditions
INC(ON)
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the ON state and the output
(COM) being open
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output
(COM) being open
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (NO to COM or NC to COM) in the ON state
and the output (NC or NO) being open
VIH
Minimum input voltage for logic high for the control input (IN)
VIL
Minimum input voltage for logic low for the control input (IN)
VIN
Voltage at IN
IIH, IIL
Leakage current measured at IN
tON
Turnon time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog outputs (COM/NC/NO) signal when the switch is turning ON.
tOFF
Turnoff time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog outputs (COM/NC/NO) signal when the switch is turning OFF.
tBBM
Break-before-make time. This parameter is measured under the specified range of conditions and by the propagation
delay between the output of two adjacent analog channels (NC and NO) when the control signal changes state.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NC, NO, or
COM) output. This is measured in coulombs (C) and measured by the total charge induced due to switching of the
control input. Charge injection, QC = CL× ΔVO, CL is the load capacitance and ΔVO is the change in analog output
voltage.
CNC(OFF)
Capacitance at the NC port when the corresponding channel (NC to COM) is OFF
CNO(OFF)
Capacitance at the NO port when the corresponding channel (NC to COM) is OFF
CNC(ON)
Capacitance at the NC port when the corresponding channel (NC to COM) is ON
CNO(ON)
Capacitance at the NO port when the corresponding channel (NC to COM) is ON
CCOM(ON)
Capacitance at the COM port when the corresponding channel (COM to NC or COM to NO) is ON
CIN
Capacitance of IN
OISO
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific
frequency, with the corresponding channel (NC to COM or NO to COM) in the OFF state. OFF isolation, OISO = 20 LOG
(VNC/VCOM) dB, VCOM is the input and VNC is the output.
XTALK
Crosstalk is a measurement of unwanted signal coupling from an ON channel to an OFF channel (NC to NO or NO to
NC). This is measured at a specific frequency and in dB. Crosstalk, XTALK = 20 log (VNC1/VNO1), VNO1 is the input and
VNC1 is the output.
BW
Bandwidth of the switch. This is the frequency where the gain of an ON channel is –3 dB below the dc gain. Gain is
measured from the equation, 20 log (VNC/VCOM) dB, where VNC is the output and VCOM is the input.
I+
Static power-supply current with the control (IN) pin at V+ or GND
ΔI+
This is the increase in I+ for each control (IN) input that is at the specified voltage, rather than at V+ or GND.
20
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Table 3. Summary of Characteristics
CONFIGURATION
2:1 MULTIPLEXER/DEMULTIPLEXER
(2 × SPDT)
Number of channels
2
ON-state resistance (ron)
10 Ω
ON-state resistance match between channels (Δron)
0.15 Ω
ON-state resistance flatness (ron(flat))
4Ω
Turnon/turnoff time (tON/tOFF)
5.7 ns/3.8 ns
Break-before-make time (tBBM)
0.5 ns
Charge injection (QC)
7 pC
Bandwidth (BW)
220 MHz
OFF isolation (OSIO)
–65 dB at 10 MHz
Crosstalk 9XTALK)
–66 dB at 10 MHz
Total harmo nic distortion (THD)
0.01%
Leakage current (ICOM(OFF)/INC(OFF))
±1 µA
Package options
10-pin DGS and RSE
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation, see the following:
• Implications of Slow or Floating CMOS Inputs, SCBA004
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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7-Oct-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS5A23157DGSR
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
JBR
TS5A23157DGSRE4
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
JBR
TS5A23157DGSRG4
ACTIVE
VSSOP
DGS
10
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
JBR
TS5A23157DGST
ACTIVE
VSSOP
DGS
10
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
JBR
TS5A23157RSER
ACTIVE
UQFN
RSE
10
3000
RoHS & Green
Call TI | NIPDAU
Level-1-260C-UNLIM
-40 to 125
JBO
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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