Product
Folder
Order
Now
Technical
Documents
Support &
Community
Tools &
Software
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
TS5A23166 0.9-Ω Dual-SPST Analog Switch
5-V and 3.3-V 2-Channel Analog Switch
1 Features
3 Description
•
•
•
•
•
•
•
•
The TS5A23166 device is a dual single-pole singlethrow (SPST) analog switch that is designed to
operate from 1.65 V to 5.5 V. The TS5A23166 device
offers a low ON-state resistance and an excellent
channel-to-channel ON-state resistance matching.
The TS5A23166 device has excellent total harmonic
distortion (THD) performance and consumes very low
power. These features make this device suitable for
portable audio applications.
1
•
Isolation in Powered-Down Mode, V+ = 0
Low ON-state resistance (0.9 Ω)
Control inputs are 5.5-V Tolerant
Low charge injection
Excellent ON-state resistance matching
Low total harmonic distortion (THD)
1.65-V to 5.5-V Single-supply operation
Latch-up performance exceeds 100 mA
per JESD 78, class II
ESD Performance tested per JESD 22
– 2000-V Human-body model
(A114-B, Class II)
– 1000-V Charged-device model (C101)
Device Information(1)
PART NUMBER
TS5A23166
PACKAGE
BODY SIZE (NOM)
VSSOP (8)
2.30 mm × 2.00 mm
DSBGA (8)
1.91 mm × 0.91 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
•
•
•
•
•
•
Cell phones
Portable instrumentation
Audio and video signal routing
Low-voltage data-acquisition systems
Communication circuits
Modems
Hard Drives
Computer Peripherals
Wireless Terminals and Peripherals
Simplified Schematic
IN1
IN2
NO1
COM1
NO2
COM2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
7
1
1
1
2
3
3
Absolute Maximum Ratings ...................................... 3
ESD Ratings ............................................................ 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics: 5-V Supply ....................... 4
Electrical Characteristics: 3.3-V Supply .................... 6
Electrical Characteristics: 2.5-V Supply ................... 7
Electrical Characteristics: 1.8-V Supply .................... 9
Switching Characteristics: 5-V Supply .................... 10
Switching Characteristics: 3.3-V Supply ............... 10
Switching Characteristics: 2.5-V Supply ............... 10
Switching Characteristics: 1.8-V Supply ............... 11
Typical Characteristics .......................................... 12
Parameter Measurement Information ................ 14
8
Detailed Description ............................................ 18
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
18
18
18
18
Application and Implementation ........................ 19
9.1 Application Information............................................ 19
9.2 Typical Application ................................................. 19
10 Power Supply Recommendations ..................... 20
11 Layout................................................................... 20
11.1 Layout Guidelines ................................................. 20
11.2 Layout Example .................................................... 20
12 Device and Documentation Support ................. 21
12.1
12.2
12.3
12.4
12.5
12.6
Device Support......................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
22
22
22
22
22
13 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (March 2018) to Revision J
•
Changed the Thermal Information table ................................................................................................................................. 4
Changes from Revision H (May 2015) to Revision I
•
Page
Page
Added Note: "Not tested in production" to leakage current at 25°C in the Electrical Characteristics tables.......................... 4
Changes from Revision G (February 2013) to Revision H
Page
•
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
•
Updated document to new TI data sheet format - no specification changes. ........................................................................ 1
•
Removed Ordering Information table. .................................................................................................................................... 1
Changes from Revision F (September 2012) to Revision G
•
2
Page
Changed pin numbers for YZT or YZP package pinout. ........................................................................................................ 3
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
5 Pin Configuration and Functions
DCU Package
8-Pin VSSOP
Top View
YZT or YZP Package
8-Pin DSBGA
Bottom View
NO1
1
8
V+
COM1
2
7
IN1
IN2
3
6
COM2
GND
4
5
NO2
D1
D2
NO2
IN2 C1
C2
COM2
GND
COM1
B1
B2
IN1
NO1
A1
A2
V+
Pin Functions
PIN
NAME
TSSOP NO.
DSBGA NO.
COM1
2
B1
COM2
6
GND
4
IN1
TYPE
DESCRIPTION
I/O
Common port for switch 1
C2
I/O
Common port for switch 2
D1
GND
7
B2
I
Active-high control pin connecting NO1 to COM1.
IN2
3
C1
I
Active-high control pin connecting NO2 to COM2.
NO1
1
A1
I/O
Normally open switch path 1
NO2
5
D2
I/O
Normally open switch path 2
V+
8
A2
PWR
Ground
Power supply pin
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
MAX
UNIT
V+
Supply voltage (3)
–0.5
6.5
V
VNO
VCOM
Analog voltage (3) (4) (5)
–0.5
V+ + 0.5
V
IK
Analog port diode current
VNO, VCOM < 0
–50
INO
ICOM
ON-state switch current
VNO, VCOM = 0 to V+
–200
200
mA
VNO, VCOM = 0 to V+
–400
400
mA
VI
Digital input voltage (3) (4)
–0.5
6.5
IIK
Digital input clamp current
I+
Continuous current through V+
IGND
Continuous current through GND
(1)
(2)
(3)
(4)
(5)
(6)
ON-state peak switch current
(6)
VI < 0
mA
–50
–100
V
mA
100
mA
100
mA
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
Pulse at 1-ms duration < 10% duty cycle.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
3
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
+2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
+1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VI/O
Input/output voltage
V+
Supply voltage
VI
Control Input Voltage
TA
Operating free-air temperature
MAX
UNIT
0
V+
V
1.65
5.5
V
0
5.5
V
–40
85
°C
6.4 Thermal Information
TS5A23166
THERMAL METRIC (1)
DCU (VSSOP)
YZP (DSBGA)
YZT (DSBGA)
8 PINS
8 PINS
8 PINS
212.2
99.9
99.7
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
77.6
1.0
1.4
°C/W
RθJB
Junction-to-board thermal resistance
91.7
27.8
27.8
°C/W
φJT
Junction-to-top characterization parameter
7.1
0.4
0.5
°C/W
φ JB
Junction-to-board characterization parameter
91.1
27.8
27.7
°C/W
RθJA
(1)
Junction-to-ambient thermal resistance
UNIT
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report.
6.5 Electrical Characteristics: 5-V Supply
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
VCOM,
VNO
Analog signal
rpeak
Peak ON resistance
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C
ron
ON-state resistance
VNO = 2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C
Δron
ON-state resistance
match between
channels
VNO = 2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 11
ron(flat)
ON-state resistance
flatness
INO(OFF)
NO
OFF leakage current
INO(PWROFF)
(1)
(2)
4
0
VNO = 1 V, 1.5 V, 2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
VNO = 1 V,
VCOM = 4.5 V,
or
VNO = 4.5 V,
VCOM = 1 V,
Switch OFF,
see Figure 12
VNO = 0 to 5.5 V,
VCOM = 5.5 V to 0,
Switch OFF,
see Figure 12
Full
Full
0.9
4.5 V
0.75
4.5 V
0.04
4.5 V
Full
Ω
Ω
Ω
0.2
0.15
0.25
4
20 (2)
Full
25°C
V
0.1
0.1
4.5 V
Ω
0.25
25°C
Full
0.9
1
25°C
25°C
1.1
1.2
25°C
Full
V+
0V
5.5 V
0V
–150
–10
150
0.2
–50
10 (2)
50
nA
μA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
Not tested in production.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
Electrical Characteristics: 5-V Supply (continued)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
VCOM = 1 V,
VNO = 4.5 V,
or
VCOM = 4.5 V,
VNO = 1 V,
Switch OFF,
see Figure 12
VCOM = 0 to 5.5 V,
VNO = 5.5 V to 0,
Switch OFF,
see Figure 12
INO(ON)
NO
ON leakage current
VNO = 1 V,
VCOM = Open,
or
VNO = 4.5 V,
VCOM = Open,
Switch ON,
see Figure 13
ICOM(ON)
COM
ON leakage current
VCOM = 1 V,
VNO = Open,
or
VCOM = 4.5 V,
VNO = Open,
Switch ON,
see Figure 13
ICOM(OFF)
COM
OFF leakage current
ICOM(PWROFF)
TA
V+
25°C
Full
25°C
Full
5.5 V
0V
25°C
Full
TYP
MAX
0V
4
20 (2)
–150
–10
5.5 V
0.2
10 (2)
50
0.4
–50
–5
5.5 V
150
–50
–5
25°C
Full
MIN
nA
μA
5 (2)
50
0.4
UNIT
nA
5 (2)
–50
50
nA
Digital Control Inputs (IN1, IN2) (3)
VIH
Input logic high
Full
2.4
5.5
V
VIL
Input logic low
Full
0
0.8
V
IIH, IIL
Input leakage current
VI = 5.5 V or 0
QC
Charge injection
VGEN = 0,
RGEN = 0,
CL = 1 nF,
see Figure 19
25°C
5V
6
pC
CNO(OFF)
NO
OFF capacitance
VNO = V+ or GND,
Switch OFF,
See Figure 14
25°C
5V
19
pF
CCOM(OFF)
COM
OFF capacitance
VCOM = V+ or GND,
Switch OFF,
See Figure 14
25°C
5V
18
pF
CNO(ON)
NO
ON capacitance
VNO = V+ or GND,
Switch ON,
See Figure 14
25°C
5V
35.5
pF
CCOM(ON)
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 14
25°C
5V
35.5
pF
CI
Digital input
capacitance
VI = V+ or GND,
See Figure 14
25°C
5V
2
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
See Figure 16
25°C
5V
150
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C
5V
–62
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
Switch ON,
see Figure 18
25°C
5V
–85
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20
kHz,
see Figure 20
25°C
5V
0.005%
Positive supply
current
VI = V+ or GND,
Switch ON or
OFF
25°C
5.5 V
25°C
Full
5.5 V
–2
0.3
–20
2
20
nA
Dynamic
Supply
I+
(3)
Full
0.01
0.1
1
μA
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
5
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
6.6 Electrical Characteristics: 3.3-V Supply
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
VCOM,
VNO
Analog signal range
rpeak
Peak ON resistance
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C
ron
ON-state resistance
VNO = 2 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
25°C
Δron
ON-state resistance
match between
channels
VNO = 2 V, 0.8 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
0 ≤ VNO ≤ V+,
ICOM = –100 mA
Switch ON,
see Figure 11
ron(flat)
ON-state resistance
flatness
0
VNO = 2 V, 0.8 V,
ICOM = –100 mA,
Switch ON,
see Figure 11
VNO = 1 V, VCOM = 3 V,
or
VNO = 3 V, VCOM = 1 V,
Switch OFF,
see Figure 12
INO(PWROFF)
VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,
Switch OFF,
see Figure 12
ICOM(OFF)
VCOM = 1 V, VNO = 3 V,
or
VCOM = 3 V, VNO = 1 V,
Switch OFF,
see Figure 12
ICOM(PWROFF)
VCOM = 0 to 3.6 V,
VNO = 3.6 V to 0,
Switch OFF,
see Figure 12
INO(ON)
NO
ON leakage current
VNO = 1 V,
VCOM = Open,
or
VNO = 3 V,
VCOM = Open,
COM
ON leakage current
VCOM = 1 V,
VNO = Open,
or
VCOM = 3 V,
VNO = Open,
INO(OFF)
NO
OFF leakage current
COM
OFF leakage current
ICOM(ON)
Full
Full
0.04
Full
25°C
Full
Full
Full
Ω
Ω
0.15
0.25
Ω
0.25
–5
3.6 V
0V
25°C
Full
Ω
0.3
3V
25°C
25°C
V
0.1
0.1
Full
Full
1.5
1.7
3V
0V
–5
5 (2)
25
0.5
0.1
5 (2)
25
0.3
–20
μA
nA
μA
2 (2)
20
0.3
nA
5 (2)
50
–25
–2
3.6 V
0.1
–50
–5
5 (2)
50
–25
–2
3.6 V
0.5
–50
–5
3.6 V
25°C
Switch ON,
see Figure 13
1.1
25°C
25°C
1.6
1.8
3V
25°C
Switch ON,
see Figure 13
1.3
3V
25°C
Full
V+
nA
2 (2)
–20
20
nA
Digital Control Inputs (IN1, IN2) (3)
VIH
Input logic high
Full
2
5.5
V
VIL
Input logic low
Full
0
0.8
V
25°C
–2
IIH, IIL
(1)
(2)
(3)
6
Input leakage current
VI = 5.5 V or 0
Full
3.6 V
–20
0.3
2
20
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
Not tested in production.
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
Electrical Characteristics: 3.3-V Supply (continued)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Dynamic
QC
Charge injection
VGEN = 0,
RGEN = 0,
CL = 1 nF,
see Figure 19
25°C
5V
CNO(OFF)
NO
OFF capacitance
VNO = V+ or GND,
Switch OFF,
See Figure 14
25°C
CCOM(OFF)
COM
OFF capacitance
VCOM = V+ or GND,
Switch OFF,
See Figure 14
CNO(ON)
NO
ON capacitance
VNO = V+ or GND,
Switch ON,
CCOM(ON)
COM
ON capacitance
CI
6
pC
3.3 V
19.5
pF
25°C
3.3 V
18.5
pF
See Figure 14
25°C
3.3 V
36
pF
VCOM = V+ or GND,
Switch ON,
See Figure 14
25°C
3.3 V
36
pF
Digital input
capacitance
VI = V+ or GND,
See Figure 14
25°C
3.3 V
2
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
See Figure 16
25°C
3.3 V
150
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C
3.3 V
–62
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
Switch ON,
see Figure 18
25°C
3.3 V
–85
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
see Figure 20
25°C
3.3 V
0.01%
Positive supply
current
VI = V+ or GND,
Switch ON or OFF
Supply
I+
25°C
Full
0.001
3.6 V
0.05
0.3
μA
6.7 Electrical Characteristics: 2.5-V Supply
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
VCOM, VNO
Analog signal
range
rpeak
Peak ON
resistance
0 ≤ VNO ≤ V+,
ICOM = –8 mA,
Switch ON,
see Figure 11
25°C
ron
ON-state
resistance
VNO = 1.8 V,
ICOM = –8 mA,
Switch ON,
see Figure 11
25°C
Δron
ON-state
resistance
match
between
channels
VNO = 1.8 V, 0.8 V,
ICOM = –8 mA,
Switch ON,
see Figure 11
0 ≤ VNO ≤ V+,
ICOM = –8 mA,
Switch ON,
see Figure 11
ron(flat)
ON-state
resistance
flatness
VNO = 1.8 V, 0.8 V,
ICOM = –8 mA,
Switch ON,
see Figure 11
INO(OFF)
INO(PWROFF)
(1)
(2)
NO
OFF leakage
current
0
Full
Full
1.8
2.3 V
1.2
2.3 V
VNO = 0.5 V,
VCOM = 2.3 V,
or
VNO = 2.3 V,
VCOM = 0.5 V,
Switch OFF,
see Figure 12
VNO = 0 to 2.7 V,
VCOM = 2.7 V to 0,
Switch OFF,
see Figure 12
0.04
2.3 V
Full
Ω
Ω
0.15
0.15
2.3 V
0.4
0.6
0.3
5 (2)
Full
25°C
V
Ω
0.7
Ω
0.6
25°C
Full
2.1
2.4
25°C
25°C
2.4
2.6
25°C
Full
V+
–5
2.7 V
0V
–50
–2
–15
50
0.05
2 (2)
15
nA
μA
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Not tested in production.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
7
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
Electrical Characteristics: 2.5-V Supply (continued)
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
VNO = 2.3 V,
VCOM = 0.5 V,
or
VNO = 0.5 V,
VCOM = 2.3 V,
Switch OFF,
see Figure 12
VCOM = 0 to 2.7 V,
VNO = 2.7 V to 0,
Switch OFF,
see Figure 12
INO(ON)
NO
ON leakage
current
VNO = 0.5 V,
VCOM = Open,
or
VNO = 2.3 V,
VCOM = Open,
Switch ON,
see Figure 13
ICOM(ON)
COM
ON leakage
current
VCOM = 0.5 V,
VNO = Open,
or
VCOM = 2.3 V,
VNO = Open,
Switch ON,
see Figure 13
ICOM(OFF)
COM
OFF leakage
current
ICOM(PWROFF)
TA
V+
25°C
Full
25°C
Full
2.7 V
0V
25°C
Full
TYP
MAX
–5
0.3
5 (2)
–50
–2
2.7 V
0.05
2 (2)
15
0.3
–20
–2
2.7 V
50
–15
–2
25°C
Full
MIN
nA
μA
2 (2)
20
0.3
UNIT
nA
2 (2)
–20
20
nA
Digital Control Inputs (IN1, IN2)
VIH
Input logic high
Full
1.8
5.5
V
VIL
Input logic low
Full
0
0.6
V
IIH, IIL
Input leakage
current
VI = 5.5 V or 0
QC
Charge
injection
VGEN = 0,
RGEN = 0,
CL = 1 nF,
see Figure 19
25°C
2.5 V
4
pC
CNO(OFF)
NO
OFF
capacitance
VNO = V+ or GND,
Switch OFF,
See Figure 14
25°C
2.5 V
19.5
pF
CCOM(OFF)
COM
OFF
capacitance
VCOM = V+ or GND,
Switch OFF,
See Figure 14
25°C
2.5 V
18.5
pF
CNO(ON)
NO
ON
capacitance
VNO = V+ or GND,
Switch ON,
See Figure 14
25°C
2.5 V
36.5
pF
CCOM(ON)
COM
ON
capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 14
25°C
2.5 V
36.5
pF
CI
Digital input
capacitance
VI = V+ or GND,
See Figure 14
25°C
2.5 V
2
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
See Figure 16
25°C
2.5 V
150
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C
2.5 V
–62
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
Switch ON,
see Figure 18
25°C
2.5 V
–85
dB
THD
Total
harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
see Figure 20
25°C
2.5 V
0.02%
Positive supply
current
VI = V+ or GND,
Switch ON or OFF
25°C
Full
2.7 V
–2
0.3
–20
2
20
nA
Dynamic
Supply
I+
8
25°C
Full
Submit Documentation Feedback
2.7 V
0.001
0.02
0.25
μA
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
6.8 Electrical Characteristics: 1.8-V Supply
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
VCOM, VNO
Analog signal
range
rpeak
Peak ON
resistance
0 ≤ VNO ≤ V+,
ICOM = –2 mA,
Switch ON,
see Figure 11
25°C
ron
ON-state
resistance
VNO = 0.6 V, 1.5 V,
ICOM = –2 mA,
Switch ON,
see Figure 11
25°C
Δron
ON-state
resistance
match
between
channels
VNO = 1.5 V,
ICOM = –2 mA,
Switch ON,
see Figure 11
0 ≤ VNO ≤ V+,
ICOM = –2 mA,
Switch ON,
see Figure 11
ron(flat)
ON-state
resistance
flatness
VNO = 0.6 V, 1.5 V,
ICOM = –2 mA,
Switch ON,
see Figure 11
0
Switch OFF,
see Figure 12
INO(PWROFF)
VNO = 0 to 1.95 V,
VCOM = 1.95 V to 0,
Switch OFF,
see Figure 12
ICOM(OFF)
VNO = 1.65 V,
VCOM = 0.3 V,
or
VNO = 0.3 V,
VCOM = 1.65 V,
Switch OFF,
see Figure 12
VCOM = 0 to 1.95 V,
VNO = 1.95 V to 0,
Switch OFF,
see Figure 12
NO
OFF leakage
current
COM
OFF leakage
current
ICOM(PWROFF)
Full
4.2
1.65 V
Full
25°C
1.6
1.65 V
0.04
1.65 V
4.1
INO(ON)
NO
ON leakage
current
VNO = 0.3 V,
VCOM = Open,
or
VNO = 1.65 V,
VCOM = Open,
Switch ON,
see Figure 13
ICOM(ON)
COM
ON leakage
current
VNO = Open,
VCOM = 0.3 V,
or
VNO = Open,
VCOM = 1.65 V,
Switch ON,
see Figure 13
25°C
Full
–5
1.95 V
0V
1.95 V
0V
25°C
Full
–2
22
Ω
Ω
2 (2)
10
0.3
0.05
(2)
2
10
0.3
–20
μA
nA
μA
2 (2)
20
0.3
nA
5 (2)
50
–10
–2
1.95 V
0.05
–50
–2
5 (2)
50
–10
–2
1.95 V
0.3
–50
–5
25°C
Full
Ω
27
25°C
Full
Ω
2.8
1.65 V
25°C
Full
V
0.2
0.2
Full
25°C
3.9
4
25°C
Full
25
30
25°C
VNO = 0.3 V,
VCOM = 1.65 V,
or
VNO = 1.65 V,
VCOM = 0.3 V,
INO(OFF)
Full
V+
nA
2
–20
20
nA
Digital Control Inputs (IN1, IN2)
VIH
Input logic high
Full
1.5
5.5
V
VIL
Input logic low
Full
0
0.6
V
Input leakage
current
VI = 5.5 V or 0
25°C
–2
QC
Charge
injection
VGEN = 0,
RGEN = 0,
CL = 1 nF,
see Figure 19
25°C
1.8 V
2
pC
CNO(OFF)
NO
OFF
capacitance
VNO = V+ or GND,
Switch OFF,
See Figure 14
25°C
1.8 V
19.5
pF
CCOM(OFF)
COM
OFF
capacitance
VCOM = V+ or GND,
Switch OFF,
See Figure 14
25°C
1.8 V
18.5
pF
CNO(ON)
NO
ON
capacitance
VNO = V+ or GND,
Switch ON,
See Figure 14
25°C
1.8 V
36.5
pF
IIH, IIL
Full
1.95 V
0.3
–20
2
20
μA
Dynamic
(1)
(2)
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Not tested in production.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
9
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
Electrical Characteristics: 1.8-V Supply (continued)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
V+
See Figure 14
25°C
1.8 V
36.5
pF
VI = V+ or GND,
See Figure 14
25°C
1.8 V
2
pF
Bandwidth
RL = 50 Ω,
Switch ON,
See Figure 16
25°C
1.8 V
150
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C
1.8 V
–62
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
see Figure 20
25°C
1.8 V
0.055%
Positive supply
current
VI = V+ or GND,
Switch ON or OFF
CCOM(ON)
COM
ON
capacitance
VCOM = V+ or GND,
Switch ON,
CI
Digital input
capacitance
BW
MIN
TYP
MAX
UNIT
Supply
I+
25°C
Full
0.001
1.95 V
0.01
0.15
μA
6.9 Switching Characteristics: 5-V Supply
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
4.5
7.5
UNIT
Dynamic
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL= 35 pF,
see Figure 15
25°C
5V
1
Full
4.5 V to 5.5 V
1
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
25°C
5V
4.5
Full
4.5 V to 5.5 V
3.5
(1)
9
8
11
13
ns
ns
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
6.10 Switching Characteristics: 3.3-V Supply
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
25°C
3.3 V
1.5
5
9.5
Full
3 V to
3.6 V
1
25°C
3.3 V
4.5
Full
3 V to
3.6 V
3
UNIT
Dynamic
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL= 35 pF,
see Figure 15
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
(1)
10
8.5
ns
11
12.5
ns
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
6.11 Switching Characteristics: 2.5-V Supply
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
25°C
2.5 V
2
6
10
Full
2.3 V to
2.7 V
1
UNIT
Dynamic
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
(1)
10
25°C
2.5 V
Full
2.3 V to
2.7 V
4.5
3
12
8
ns
12.5
15
ns
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
6.12 Switching Characteristics: 1.8-V Supply
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
9
18
UNIT
Dynamic
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
(1)
25°C
1.8 V
3
Full
1.65 V to
1.95 V
1
25°C
1.8 V
5
Full
1.65 V to
1.95 V
4
20
10
ns
15.5
18.5
ns
The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
11
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
6.13 Typical Characteristics
1.6
3.5
3.0
1.2
2.5
V+ = 1.8 V
ron (W)
ron (Ω)
1.4
TA = 25_C
2.0
1.5
V+ = 2.5 V
V+ = 3.3 V
1.0
0.8
255C
0.6
–405C
0.4
V+ = 5 V
0.5
855C
1.0
0.2
0.0
0.0
0
1
2
3
4
5
0
6
1
2
Figure 2. ron vs VCOM (V+ = 3.3 V)
Figure 1. ron vs VCOM
70
1.0
60
855C
255C
0.8
ron (W)
Leakage Current (nA)
1.2
–405C
0.6
0.4
0.2
0.0
1
2
3
4
5
ICOM(OFF)
50
40
INO/NC(OFF)
30
20
INO/NC(ON)
10
ICOM(ON)
0
6
25°
TA (°C)
−40°
VCOM (V)
20
12
15
10
10
V+ = 5 V
V+ = 3 V
tON
8
5
tON/tOFF (ns)
Charge Injection (pC)
85°
Figure 4. Leakage Current vs Temperature (V+ = 5.5 V)
Figure 3. ron vs VCOM (V+ = 5 V)
0
−5
tOFF
6
4
2
−10
−15
0
1
2
3
4
5
0
0
1
Bias Voltage (V)
Figure 5. Charge Injection (QC) vs VCOM
12
4
VCOM (V)
VCOM (V)
0
3
2
3
V+ (V)
4
5
6
Figure 6. tON and tOFF vs Supply Voltage
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
Typical Characteristics (continued)
10
−1
8
−2
7
−3
6
tON
5
4
Gain (dB)
tON/tOFF (ns)
0
tOFF
9
−4
−5
−6
3
2
−7
1
−8
−9
0.1
0
-40 °C
25°C
TA (°C)
85°C
1
10
100
1000
Frequency (MHz)
Figure 8. Bandwidth (V+ = 5 V)
Figure 7. tON and tOFF vs Temperature (V+ = 5 V)
0
0.010
0.009
0.008
THD + (%)
Attenuation (dB)
−20
−40
−60
0.007
0.006
0.005
0.004
−80
0.003
0.002
−100
0.001
−120
0.1
1
10
Frequency (MHz)
100
Figure 9. OFF Isolation and Crosstalk (V+ = 5 V)
1000
0.000
0
10
100
1000
Frequency (Hz)
10000
100000
Figure 10. Total Harmonic Distortion vs Frequency
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
13
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
7 Parameter Measurement Information
V+
VNO NO
COM
+
VCOM
Channel ON
r on =
VI
ICOM
IN
VCOM – VNO
Ω
I COM
VI = VIH or VIL
+
GND
Figure 11. ON-State Resistance (ron)
V+
VNO NO
COM
+
VCOM
+
VI
OFF-State Leakage Current
Channel OFF
VI = VIH or VIL
IN
+
GND
Figure 12. OFF-State Leakage Current (ICOM(OFF), INC(OFF), ICOM(PWROFF), INC(PWR(FF))
V+
VNO NO
COM
+
VI
VCOM
ON-State Leakage Current
Channel ON
VI = VIH or VIL
IN
+
GND
Figure 13. ON-State Leakage Current (ICOM(ON), INC(ON))
14
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
Parameter Measurement Information (continued)
V+
VNO
NO
Capacitance
Meter
VBIAS = V+ or GND
VI = V+ or GND
COM
COM
VI
IN
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
VBIAS
GND
Figure 14. Capacitance (CI, CCOM(OFF), CCOM(ON), CNC(OFF), CNC(ON))
V+
VI
RL
CL
tON
50 Ω
35 pF
V+
tOFF
50 Ω
35 pF
V+
VNO
NO
VCOM
TEST
VCOM
COM
CL(2)
RL
IN
Logic
Input(1)
V+
Logic
Input
(VI)
GND
50%
50%
0
tON
tOFF
Switch
Output
(VNO)
(1)
All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
(2)
CL includes probe and jig capacitance.
90%
90%
Figure 15. Turnon (tON) and Turnoff Time (tOFF)
V+
Network Analyzer
50 Ω
VNO
NO
Channel ON: NO to COM
COM
VCOM
VI = VIH or VIL
Source
Signal
Network Analyzer Setup
50 Ω
VI
+
IN
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
GND
DC Bias = 350 mV
Figure 16. Bandwidth (BW)
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
15
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
Parameter Measurement Information (continued)
V+
Network Analyzer
Channel OFF: NO to COM
50 Ω
VNO NO
VI = V+ or GND
VCOM
COM
Source
Signal
50 Ω
Network Analyzer Setup
VI
50 Ω
Source Power = 0 dBm
(632-mV P-P at 50- Ω load)
IN
+
GND
DC Bias = 350 mV
Figure 17. OFF Isolation (OISO)
V+
Network Analyzer
50 Ω
VNO1
Source
Signal
VNO2
NO1
Channel ON: NO to COM
COM1
NO2
VI
50 Ω
Network Analyzer Setup
50 Ω
COM2
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
IN
+
DC Bias = 350 mV
GND
Figure 18. Crosstalk (XTALK)
V+
RGEN
VIH
OFF
ON
OFF V
IL
NO
COM
+
VGEN
Logic
Input
(VI)
VCOM
VCOM
ΔVCOM
CL(1)
VI
VGEN = 0 to V+
IN
Logic
Input(2)
RGEN = 0
CL = 1 nF
QC = CL × ΔVCOM
VI = VIH or VIL
GND
(1)
CL includes probe and jig capacitance.
(2)
All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
Figure 19. Charge Injection (QC)
16
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
Parameter Measurement Information (continued)
Channel ON: COM to NO
VSOURCE = V+ P-P
VI = V+/2 or −V+/2
RL = 600 Ω
fSOURCE = 20 Hz to 20 kHz
CL = 50 pF
V+/2
Audio Analyzer
NO
Source
Signal
COM
CL(1)
600 Ω
VI
IN
600 Ω
−V+/2
(1)
CL includes probe and jig capacitance.
Figure 20. Total Harmonic Distortion (THD)
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
17
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
8 Detailed Description
8.1 Overview
The TS5A23166 is a dual single-pole single-throw (SPST) analog switch that is designed to operate from 1.65 V
to 5.5 V. The device offers a low ON-state resistance. The device has excellent total harmonic distortion (THD)
performance and consumes very low power. These features make this device suitable for portable audio
applications. Table 2 shows the descriptions of each parameter specified in the datasheet.
8.2 Functional Block Diagram
IN1
IN2
NO1
COM1
NO2
COM2
8.3 Feature Description
Tolerant control inputs allow 5-V logic levels to be present on the IN pin at any value of VCC. Low ON-resistance
allows minimal signal distortion through device.
8.4 Device Functional Modes
Table 1 shows the functional modes for TS5A23166.
Table 1. Function Table
18
IN
NO TO COM,
COM TO NO
L
OFF
H
ON
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TS5A23166 dual SPST analog switch is a basic component that could be used in any electrical system
design. One example application is a gain selector, which is described in the Typical Application section.
9.2 Typical Application
Figure 21. Gain-Control Circuit for OP Amplifier
9.2.1 Design Requirements
By selecting values of R1 and R2, such that Rx >> ron(x), ron of TS5A23166 can be ignored. The gain of op amp
can be calculated as follow:
Vo / VI = 1+ R|| / R3
R|| = (R1+ron(1)) || (R2+ron(2))
(1)
(2)
9.2.2 Detailed Design Procedure
Place a switch in series with the input of the op amp. Because the op amp input impedance is very large, a
switch on ron(1) is irrelevant.
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
19
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
Typical Application (continued)
9.2.3 Application Curve
160
140
I+ (nA)
120
100
80
60
40
20
0
-40 °C
25°C
TA (°C)
85°C
Figure 22. Power-Supply Current vs Temperature (V+ = 5 V)
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF bypass capacitor is recommended. If there are multiple pins labeled VCC, then a 0.01-μF or
0.022-μF capacitor is recommended for each VCC because the VCC pins will be tied together internally. For
devices with dual supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass
capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Figure 23 shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
11.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 23. Trace Example
20
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
TS5A23166
www.ti.com
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
12 Device and Documentation Support
12.1 Device Support
12.1.1 Device Nomenclature
Table 2. Parameter Description
SYMBOL
DESCRIPTION
VCOM
Voltage at COM
VNO
Voltage at NO
ron
Resistance between COM and NO ports when the channel is ON
rpeak
Peak on-state resistance over a specified voltage range
ron(flat)
Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
INO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF-state under worst-case
input and output conditions
INO(PWROFF)
Leakage current measured at the NO port during the power-down condition, V+ = 0
ICOM(OFF)
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the OFF-state under worstcase input and output conditions
ICOM(PWROFF)
Leakage current measured at the COM port during the power-down condition, V+ = 0
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON-state and the output
(COM) open
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the ON-state and the output
(NO) open
VIH
Minimum input voltage for logic high for the control input (IN)
VIL
Maximum input voltage for logic low for the control input (IN)
VI
Voltage at the control input (IN)
IIH, IIL
Leakage current measured at the control input (IN)
tON
Turnon time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.
tOFF
Turnoff time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM)
output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input.
Charge injection, QC = CL × ΔVCOM, CL is the load capacitance, and ΔVCOM is the change in analog output voltage.
CNO(OFF)
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
CCOM(OFF)
Capacitance at the COM port when the corresponding channel (COM to NO) is OFF
CNO(ON)
Capacitance at the NO port when the corresponding channel (NO to COM) is ON
CCOM(ON)
Capacitance at the COM port when the corresponding channel (COM to NO) is ON
CI
Capacitance of control input (IN)
OISO
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific
frequency, with the corresponding channel (NO to COM) in the OFF state.
BW
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB below the DC gain.
THD
Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of root
mean square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental
harmonic.
I+
Static power-supply current with the control (IN) pin at V+ or GND
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
21
TS5A23166
SCDS196J – MAY 2005 – REVISED SEPTEMBER 2019
www.ti.com
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
22
Submit Documentation Feedback
Copyright © 2005–2019, Texas Instruments Incorporated
Product Folder Links: TS5A23166
PACKAGE OPTION ADDENDUM
www.ti.com
30-Aug-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS5A23166DCUR
ACTIVE
VSSOP
DCU
8
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(AM, JAMQ, JAMR)
JZ
TS5A23166DCURG4
ACTIVE
VSSOP
DCU
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
JAMR
TS5A23166YZPR
ACTIVE
DSBGA
YZP
8
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
JMN
TS5A23166YZTR
ACTIVE
DSBGA
YZT
8
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
JMN
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
