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TS5A3159
SCDS174D – AUGUST 2004 – REVISED NOVEMBER 2015
TS5A3159 1-Ω SPDT Analog Switch
1 Features
3 Description
•
•
•
•
•
•
•
•
The TS5A3159 device is a single-pole double-throw
(SPDT) analog switch that is designed to operate
from 1.65 V to 5.5 V. The device offers a low ONstate resistance and an excellent ON-state resistance
matching, with the break-before-make feature to
prevent signal distortion during the transferring of a
signal from one channel to another. The device has
excellent total harmonic distortion (THD) performance
and consumes very low power. These features make
this device suitable for portable audio applications.
1
•
Specified Break-Before-Make Switching
Low ON-State Resistance (1 Ω)
Control Inputs are 5-V Tolerant
Low Charge Injection
Excellent ON-Resistance Matching
Low Total Harmonic Distortion
1.65-V to 5.5-V Single-Supply Operation
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
2 Applications
•
•
•
Device Information(1)
PART NUMBER
TS5A3159
PACKAGE
BODY SIZE (NOM)
SOT-23 (6)
2.90 mm × 1.60 mm
SC70 (6)
2.00 mm × 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Mobile Phones
Consumer and Computing
Portable Instrumentation
Block Diagram
IN
COM
NC
NO
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A3159
SCDS174D – AUGUST 2004 – REVISED NOVEMBER 2015
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
7
1
1
1
2
3
3
Absolute Maximum Ratings ...................................... 3
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics for 5-V Supply................... 4
Electrical Characteristics for 3.3-V Supply................ 5
Electrical Characteristics for 2.5-V Supply................ 6
Electrical Characteristics for 1.8-V Supply................ 8
Switching Characteristics for 5-V Supply .................. 9
Switching Characteristics for 3.3-V Supply ............. 9
Switching Characteristics for 2.5-V Supply ............. 9
Switching Characteristics for 1.8-V Supply ............. 9
Typical Characteristics .......................................... 10
Parameter Measurement Information ................ 12
8
Detailed Description ............................................ 16
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
16
16
16
16
Application and Implementation ........................ 17
9.1 Application Information............................................ 17
9.2 Typical Application ................................................. 17
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 18
11.1 Layout Guidelines ................................................. 18
11.2 Layout Example .................................................... 18
12 Device and Documentation Support ................. 19
12.1
12.2
12.3
12.4
12.5
12.6
Device Support ....................................................
Documentation Support .......................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
19
20
20
20
20
20
13 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (March 2015) to Revision D
Page
•
Changed NO Pin description ................................................................................................................................................. 3
•
Deleted Added Junction temperature to the Absolute Maximum Ratings table. .................................................................... 3
Changes from Revision B (September 2004) to Revision C
•
Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
Changes from Revision A (September 2004) to Revision B
•
2
Page
Removed Ordering Information table. .................................................................................................................................... 1
Changes from Original (August 2004) to Revision A
•
Page
Page
Corrected Figure 11 graphic ................................................................................................................................................ 12
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SCDS174D – AUGUST 2004 – REVISED NOVEMBER 2015
5 Pin Configuration and Functions
DBV and DCK Packages
6-Pin SOT-23 and SC-70
Top View
TS5A3159
NO
1
6 IN
GND
2
5
V+
NC
3
4
COM
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
NO
I/O
Normally open switch port
2
GND
—
Ground
3
NC
I/O
Normally closed switch port
4
COM
I/O
Common switch port
5
V+
—
Power supply
6
IN
I
Switch select. High = COM connected to NO; Low = COM connected to NC.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
V+
Supply voltage (2)
–0.5
6.5
V
VNO
VCOM
Analog voltage (2) (3) (4)
–0.5
V+ + 0.5
V
II/OK
Analog port diode current
VNO, VCOM < 0 or VNO, VCOM > V+
±50
mA
INO
ICOM
ON-state switch current
VNO, VCOM = 0 to V+
±200
mA
±400
mA
ON-state peak switch current (5)
VIN
Digital input voltage (2) (3)
IIK
Digital input clamp current
–0.5
VIN < 0
6.5
V
–50
mA
Continuous current through V+ or GND
±100
mA
Tj
Junction temperature
150
°C
Tstg
Storage temperature
150
°C
(1)
(2)
(3)
(4)
(5)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
Pulse at 1-ms duration < 10% duty cycle.
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6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VI/O
Switch input/output voltage
V+
Supply voltage
VI
Control input voltage
TA
Operating temperature
MAX
UNIT
0
V+
V
1.65
5.5
V
0
5.5
V
–40
85
°C
6.4 Thermal Information
TS5A3159
THERMAL METRIC (1)
RθJA
(1)
DBV (SOT-23)
DCK (SC-70)
6 PINS
6 PINS
165
165
Junction-to-ambient thermal resistance
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics for 5-V Supply
V+ = 4.5 V to 5.5 V and TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN TYP (1)
MAX
UNIT
Analog Switch
VCOM,
VNO, VNC
Analog signal range
rpeak
Peak ON-state
resistance
0 ≤ VNO or VNC ≤ V+,
ICOM = –30 mA,
Switch ON,
see Figure 10
25°C
ron
ON-state resistance
VNO or VNC = 2.5 V,
ICOM = –30 mA,
Switch ON,
see Figure 10
25°C
Δron
ON-state resistance
match between
channels
VNO or VNC = 2.5 V,
ICOM = –30 mA,
Switch ON,
see Figure 10
ron(flat)
ON-state resistance
flatness
0
0 ≤ VNO or VNC ≤ V+,
ICOM = –30 mA
VNO or VNC = 1 V, 1.5 V, 2.5 V,
ICOM = –30 mA
Switch ON,
see Figure 10
Full
Full
25°C
V+
1
4.5 V
1.5
1.5
0.75
4.5 V
1.1
1.1
4.5 V
Ω
25°C
NC, NO
Off leakage current
VNC or VNO = 4.5 V,
VCOM = 0 V,
Switch OFF,
see Figure 11
25°C
INC(ON),
INO(ON)
NC, NO
On leakage current
VNC or VNO = 4.5 V,
VCOM = Open,
Switch ON,
see Figure 12
25°C
ICOM(ON)
COM
On leakage current
VNC or VNO = 4.5 V or Open,
VCOM = 4.5 V,
Switch ON,
see Figure 12
25°C
Full
Full
Full
Ω
0.233
4.5 V
INC(OFF),
INO(OFF)
Ω
Ω
0.1
25°C
V
0.15
5.5 V
5.5 V
5.5 V
–2
0.2
–20
–4
2.8
–40
–4
2
20
4
40
0.47
4
–40
40
nA
nA
nA
Digital Input (IN)
VIH
Input logic high
Full
2.4
5.5
V
VIL
Input logic low
Full
0
0.8
V
IIH, IIL
Input leakage
current
–1
1
μA
(1)
4
VIN = 5.5 V or 0
Full
5.5 V
TA = 25°C.
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Electrical Characteristics for 5-V Supply (continued)
V+ = 4.5 V to 5.5 V and TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP (1)
MAX
4.5 V
to
5.5 V
20
35
4.5 V
to
5.5 V
15
TA
V+
25°C
UNIT
Dynamic
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
tBBM
Break-before-make
time
VNC = VNO = V+ / 2,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
QC
Charge injection
CL = 1 nF,
VGEN = 0 V,
CNC(OFF),
CNO(OFF)
NC, NO
OFF capacitance
CNC(ON),
CNO(ON)
Full
25°C
Full
25°C
40
20
35
1
12
ns
ns
Full
4.5 V
to
5.5 V
14.5
See Figure 19
25°C
5V
36
pC
VNC or VNO = V+ or GND,
Switch OFF,
see Figure 13
25°C
5V
23
pF
NC, NO
ON capacitance
VNC or VNO = V+ or GND,
Switch ON,
see Figure 13
25°C
5V
84
pF
CCOM(ON)
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
see Figure 13
25°C
5V
84
pF
CIN
Digital input
capacitance
VIN = V+ or GND,
See Figure 13
25°C
5V
2.1
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
see Figure 16
25°C
5V
100
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C
5V
–65
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
Switch ON,
see Figure 18
25°C
5V
–65
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 600 Hz to
20 kHz,
see Figure 20
25°C
5V
0.01%
Positive supply
current
VIN = V+ or GND,
Switch ON or
OFF
Full
5.5 V
ns
1
Supply
I+
0.1
μA
6.6 Electrical Characteristics for 3.3-V Supply
V+ = 3 V to 3.6 V and TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP (1) MAX
0
V+
UNIT
Analog Switch
VCOM,
VNO, VNC
Analog signal range
rpeak
Peak ON-state
resistance
0 ≤ VNO or VNC ≤ V+,
ICOM = –24 mA,
Switch ON,
see Figure 10
25°C
ron
ON-state resistance
VNO or VNC = 2 V,
ICOM = –24 mA,
Switch ON,
see Figure 10
25°C
Δron
ON-state resistance
match
between channels
VNO or VNC = 2 V, 0.8
V,
ICOM = –24 mA,
Switch ON,
see Figure 10
ron(flat)
(1)
ON-state resistance
flatness
0 ≤ VNO or VNC ≤ V+,
ICOM = –24 mA,
VNO or VNC = 2 V, 0.8
V,
ICOM = –24 mA,
Full
Full
25°C
3V
3V
3V
25°C
Switch ON,
see Figure 10
1.35
2.1
2.1
1.15
1.5
1.5
0.11
Ω
Ω
Ω
0.225
Ω
3V
25°C
V
0.25
TA = 25°C.
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Electrical Characteristics for 3.3-V Supply (continued)
V+ = 3 V to 3.6 V and TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
TYP (1) MAX
MIN
UNIT
INC(OFF),
INO(OFF)
NC, NO
Off leakage current
VNC or VNO = 3 V,
VCOM = 0,
Switch OFF,
see Figure 11
25°C
3.6 V
0.2
nA
INC(ON),
INO(ON)
NC, NO
On leakage current
VNC or VNO = 3 V,
VCOM = Open,
Switch ON,
see Figure 12
25°C
3.6 V
2.8
nA
ICOM(ON)
COM
On leakage current
VNC or VNO = 3 V or
Open,
VCOM = 3 V,
Switch ON,
see Figure 12
25°C
3.6 V
0.47
nA
Digital Inputs (IN)
VIH
Input logic high
Full
2
5.5
V
VIL
Input logic low
Full
0
0.6
V
IIH, IIL
Input leakage
current
VIN = 5.5 V or 0
–1
1
µA
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
tBBM
Break-before-make
time
VNC = VNO = V+ / 2,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
QC
Charge injection
CL = 1 nF,
VGEN = 0 V,
CNC(OFF),
CNO(OFF)
NC, NO
OFF capacitance
CNC(ON),
CNO(ON)
Full
3.6 V
25°C
3V
to
3.6 V
30
3V
to
3.6 V
20
Dynamic
Full
25°C
Full
25°C
40
ns
55
25
ns
40
Full
3V
to
3.6 V
1
21
29
see Figure 19
25°C
3.3 V
20
pC
VNC or VNO = V+ or
GND,
Switch OFF,
see Figure 13
25°C
3.3 V
23
pF
NC, NO
ON capacitance
VNC or VNO = V+ or
GND,
Switch ON,
see Figure 13
25°C
3.3 V
84
pF
CCOM(ON)
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
see Figure 13
25°C
3.3 V
84
pF
CIN
Digital input
capacitance
VIN = V+ or GND,
See Figure 13
25°C
3.3 V
2.1
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
see Figure 16
25°C
3.3 V
100
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C
3.3 V
–65
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
Switch ON,
see Figure 18
25°C
3.3 V
–65
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 600 Hz to 20
kHz,
see Figure 20
25°C
3.3 V
0.015%
Positive supply
current
VIN = V+ or GND,
Switch ON or OFF
Full
3.6 V
ns
1
Supply
I+
μA
0.1
6.7 Electrical Characteristics for 2.5-V Supply
V+ = 2.3 V to 2.7 V and TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP (1) MAX
0
V+
UNIT
Analog Switch
VCOM,
VNO, VNC
(1)
6
Analog signal
range
V
TA = 25°C.
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Electrical Characteristics for 2.5-V Supply (continued)
V+ = 2.3 V to 2.7 V and TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
rpeak
Peak ON-state
resistance
0 ≤ VNO or VNC ≤ V+,
ICOM = –8 mA,
Switch ON,
see Figure 10
25°C
ron
ON-state
resistance
VNO or VNC = 1.8 V,
ICOM = –8 mA,
Switch ON,
see Figure 10
25°C
Δron
ON-state
resistance match
between channels
VNO or VNC = 0.8 V, 1.8 V,
ICOM = –8 mA,
Switch ON,
see Figure 10
ron(flat)
ON-state
resistance
flatness
0 ≤ VNO or VNC ≤ V+,
ICOM = –8 mA,
VNO or VNC = 0.8 V, 1.8 V
ICOM = –8 mA,
Switch ON,
see Figure 10
Full
Full
25°C
V+
MIN
TYP (1) MAX
1.7
2.5 V
2.7
2.7
1.45
2.5 V
2
2
2.5 V
Ω
Ω
Ω
0.7
25°C
UNIT
0.5
Ω
2.5 V
25°C
0.45
INC(OFF),
INO(OFF)
NC, NO
VNC or VNO = 2.3 V,
Off leakage current VCOM = 0,
Switch OFF,
see Figure 11
25°C
2.7 V
0.2
nA
INC(ON),
INO(ON)
NC, NO
VNC or VNO = 2.3 V,
On leakage current VCOM = Open,
Switch ON,
see Figure 12
25°C
2.7 V
2.8
nA
ICOM(ON)
VNC or VNO = 2.3 V or
COM
Open,
On leakage current
VCOM = 2.3 V,
Switch ON,
see Figure 12
25°C
2.7 V
0.47
nA
Digital Input (IN)
VIH
Input logic high
Full
1.8
5.5
V
VIL
Input logic low
Full
0
0.6
V
IIH, IIL
Input leakage
current
VIN = 5.5 V or 0
–1
1
μA
tON
Turnon time
VCOM = V+, RL = 50 Ω,
CL = 35 pF,
see Figure 14
tOFF
Turnoff time
VCOM = V+, RL = 50 Ω,
CL = 35 pF,
see Figure 14
tBBM
Break-before-make VNC = VNO = V+ / 2,
time
RL = 50 Ω,
CL = 35 pF,
see Figure 15
QC
Charge injection
CL = 1 nF, VGEN = 0 V,
CNC(OFF),
CNO(OFF)
NC, NO
OFF capacitance
CNC(ON),
CNO(ON)
Full
2.7 V
25°C
2.3 V
to
2.7 V
40
2.3 V
to
2.7 V
30
Dynamic
Full
25°C
Full
25°C
55
70
40
55
1
33
ns
ns
Full
2.3 V
to
2.7 V
39
See Figure 19
25°C
2.5 V
13
pC
VNC or VNO = V+ or GND,
Switch OFF,
see Figure 13
25°C
2.5 V
23
pF
NC, NO
ON capacitance
VNC or VNO = V+ or GND,
Switch ON,
see Figure 13
25°C
2.5 V
84
pF
CCOM(ON)
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
see Figure 13
25°C
2.5 V
84
pF
CIN
Digital input
capacitance
VIN = V+ or GND,
See Figure 13
25°C
2.5 V
2.1
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
see Figure 16
25°C
2.5 V
100
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C
2.5 V
–64
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
Switch ON,
see Figure 18
25°C
2.5 V
–64
dB
THD
Total harmonic
distortion
RL = 600 Ω,
f = 600 Hz to 20 kHz,
CL = 50 pF,
see Figure 20
25°C
2.5 V
0.025%
Positive supply
current
VIN = V+ or GND,
Switch ON or OFF
Full
2.7 V
ns
1
Supply
I+
0.1
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6.8 Electrical Characteristics for 1.8-V Supply
V+ = 1.65 V to 1.95 V and TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
MIN TYP (1)
MAX
UNIT
Analog Switch
VCOM,
VNO, VNC
Analog signal
rpeak
Peak ONresistance
0 ≤ VNO or VNC ≤ V+,
ICOM = –2 mA,
Switch ON,
see Figure 10
25°C
ron
ON-state
resistance
VNO or VNC = 1.5 V,
ICOM = –2 mA,
Switch ON,
see Figure 10
25°C
Δron
ON-state
resistance match
between channels
VNO or VNC = 0.6 V, 1.5 V,
ICOM = –2 mA,
Switch ON,
see Figure 10
ON-state
resistance flatness
ron(flat)
0
0 ≤ VNO or VNC ≤ V+,
ICOM = –2 mA,
VNO or VNC = 0.6 V, 1.5 V,
ICOM = –2 mA,
Full
Full
4
1.8 V
1.7
1.8 V
Full
25°C
3.2
3.2
V
Ω
Ω
0.7
1.8 V
Ω
0.7
25°C
Switch ON,
see Figure 10
4.9
4.9
25°C
Full
V+
1.85
1.85
1.8 V
Ω
0.9
Full
0.9
INC(OFF),
INO(OFF)
NC, NO
OFF leakage
current
VNC or VNO = 1.65 V,
VCOM = 0,
Switch OFF,
see Figure 11
25°C
1.95 V
0.2
nA
INC(ON),
INO(ON)
NC, NO
ON leakage
current
VNC or VNO = 1.65 V,
VCOM = Open,
Switch ON,
see Figure 12
25°C
1.95 V
2.8
nA
ICOM(ON)
COM
ON leakage
current
VNC or VNO = 1.65 V or
open,
VCOM = 1.65 V,
Switch ON,
see Figure 12
25°C
1.95 V
0.47
nA
Digital Input (IN)
VIH
Input logic high
Full
1.5
5.5
V
VIL
Input logic low
Full
0
0.6
V
IIH, IIL
Input leakage
current
VIN = 5.5 V or 0
–1
1
μA
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
tBBM
Break-before-make VNC = VNO = V+ / 2,
time
RL = 50 Ω,
CL = 35 pF,
see Figure 15
QC
Charge injection
CL = 1 nF, VGEN = 0 V,
CNC(OFF),
CNO(OFF)
NC, NO
OFF capacitance
CNC(ON),
CNO(ON)
Full
1.95 V
25°C
1.65 V
to
1.95 V
65
1.65 V
to
1.95 V
40
Dynamic
Full
25°C
Full
95
55
70
60
ns
Full
See Figure 19
25°C
1.8 V
13
pC
VNC or VNO = V+ or GND,
Switch OFF,
see Figure 13
25°C
1.8 V
23
pF
NC, NO
ON capacitance
VNC or VNO = V+ or GND,
Switch ON,
see Figure 13
25°C
1.8 V
84
pF
CCOM(ON)
COM
ON capacitance
VCOM = V+ or GND,
Switch ON,
see Figure 13
25°C
1.8 V
84
pF
CIN
Digital input
capacitance
VIN = V+ or GND,
See Figure 13
25°C
1.8 V
2.1
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
see Figure 16
25°C
5.5 V
100
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
see Figure 17
25°C
1.8 V
–63
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
Switch ON,
see Figure 18
25°C
1.8 V
–63
dB
8
1
ns
1.65 V
to
1.95 V
(1)
25°C
70
72
ns
0.5
TA = 25°C.
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Electrical Characteristics for 1.8-V Supply (continued)
V+ = 1.65 V to 1.95 V and TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
Full
1.8 V
MIN TYP (1)
MAX
UNIT
Supply
I+
Positive supply
current
VIN = V+ or GND,
Switch ON or OFF
0.1
µA
6.9 Switching Characteristics for 5-V Supply
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
TYP
MAX
4.5 V to
5.5 V
20
35
4.5 V to
5.5 V
15
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
25°C
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
25°C
tBBM
Break-beforemake time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
25°C
Full
Full
Full
4.5 V to
5.5 V
MIN
40
20
35
1
12
14.5
1
UNIT
ns
ns
ns
6.10 Switching Characteristics for 3.3-V Supply
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
TYP
MAX
CL = 35 pF,
see Figure 14
25°C
3 V to
3.6 V
30
40
3 V to
3.6 V
20
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
25°C
tBBM
Break-beforemake time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
25°C
Full
Full
Full
3 V to
3.6 V
MIN
55
25
40
1
21
29
TYP
MAX
55
1
UNIT
ns
ns
ns
6.11 Switching Characteristics for 2.5-V Supply
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
V+
2.3 V to
2.7 V
40
2.3 V to
2.7 V
30
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
25°C
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
25°C
tBBM
Break-beforemake time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
25°C
Full
Full
Full
2.3 V to
2.7 V
MIN
70
40
55
1
33
39
TYP
MAX
70
1
UNIT
ns
ns
ns
6.12 Switching Characteristics for 1.8-V Supply
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 14
tBBM
Break-beforemake time
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 35 pF,
see Figure 15
TA
V+
25°C
1.65 V
to
1.95 V
65
1.65 V
to
1.95 V
40
Full
25°C
Full
25°C
Full
1.65 V
to
1.95 V
MIN
95
60
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72
1
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55
70
1
UNIT
ns
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6.13 Typical Characteristics
1.6
3.5
V+ = 3 V
TA = 25°C
1.4
3
2.5
V+ = 1.8 V
ron (Ω)
ron (Ω)
TA = 25°C
1
2
V+ = 2.5 V
1.5
TA = −40°C
0.8
0.6
V+ = 3 V
1
0.4
V+ = 4.5 V
0.5
0
TA = 85°C
1.2
0
1
2
0.2
3
0
4
0
1
2
Figure 2. ron vs VCOM
Figure 1. ron vs VCOM
1.2
3
VCOM (V)
VCOM (V)
18
V+ = 4.5 V
V+ = 5 V
16
1
TA = 85°C
14
12
Leakage (nA)
ron (W)
0.8
TA = 25°C
0.6
TA = −40°C
0.4
10
INC(ON)
8
6
ICOM(ON)
4
INO(ON)
0.2
2
INO(OFF)
0
INC(OFF)
0
0
1
2
3
4
−40
−20
0
VCOM (V)
60
80
100
Figure 4. Leakage Current vs Temperature
50
2.5
VCOM = V+
TA = 25°C
tr < 20 ns
tf < 20 ns
40
VIH
Logic Threshold (VIH/VIL)
2
30
tON/OFF (ns)
40
Temperature (°C)
Figure 3. ron vs VCOM
20
10
0
0
1
2
3
4
5
6
VIL
1.5
1
0.5
0
1.5
2
Figure 5. tON/OFF vs V+
2.5
3
3.5
4
4.5
5
Power Supply (V)
Supply Voltage (V)
10
20
Figure 6. Logic Threshold vs Power Supply
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Typical Characteristics (continued)
0
OFF Isolation
−10
12
Bandwidth
−2
−40
−4
−50
−5
−60
−6
−70
−7
−80
−8
ICC (nA)
−3
Crosstalk
Loss − dB
10
−30
Gain (dB)
V+ = 5 V
−1
−20
−90
0.1
14
0
10
100
6
4
2
0
−9
1
8
1K
−40
−20
0
Frequency (MHz)
20
40
60
80
100
Temperature (°C)
Figure 7. Frequency Response
Figure 8. Power-Supply Current vs Temperature
0.035
V+ = 3 V
THD + Noise (%)
0.030
0.025
0.020
0.015
0.010
0.005
0
10
100
1K
10K
100K
Frequency (MHz)
Figure 9. Total Harmonic Distortion (THD) vs Frequency
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7 Parameter Measurement Information
V+
VNC NC
COM
+
VCOM
Channel ON
VNO NO
r on
VI
VCOM
ICOM
IN
VNO or VNC
Ω
I COM
VI = VIH or VIL
+
GND
Figure 10. ON-State Resistance (ron)
V+
VNC NC
COM
+
VCOM
OFF-State Leakage Current
Channel OFF
VI = VIH or VIL
VNO NO
VI
IN
+
GND
Figure 11. OFF-State Leakage Current (INC(OFF), INO(OFF))
V+
VNC NC
+
COM
VNO NO
VI
VCOM
ON-State Leakage Current
Channel ON
VI = VIH or VIL
NOTE: See electrical characteristics for test conditions.
IN
+
GND
Figure 12. ON-State Leakage Current (ICOM(ON), INC(ON), INO(ON))
12
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Parameter Measurement Information (continued)
V+
VCOM COM
Capacitance
Meter
VBIAS
VNC
NC
VNO
NO
VI
IN
VBIAS = V+ or GND
VI = VIH or VIL
Capacitance is measured at NC,
NO, COM, and IN inputs during
ON and OFF conditions.
GND
Figure 13. Capacitance (CI, CCOM(ON), CNC(OFF), CNO(OFF), CNC(ON), CNO(ON))
V+
NC or NO VNC or VNO
VCOM
VI
Logic
Input(1)
TEST
RL
CL
VCOM
tON
50 Ω
35 pF
V+
tOFF
50 Ω
35 pF
V+
COM
CL(2)
NC or NO
RL
IN
CL(2)
GND
RL
V+
Logic
Input
(VI)
50%
50%
0
tON
tOFF
Switch
Output
(VNC or VNO)
90%
90%
(1)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
(2)
CL includes probe and jig capacitance.
Figure 14. Turnon (tON) and Turnoff Time (tOFF)
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Parameter Measurement Information (continued)
+
NC or NO
V+
Logic
Input
(VI)
VNC or VNO
VCOM
50%
0
COM
NC or NO
CL(2)
RL
IN
VI
Switch
Output
(VCOM)
90%
90%
tBBM
Logic
Input(1)
VNC or VNO = V+/2
RL = 50 Ω
CL = 35 pF
GND
(1)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
(2)
CL includes probe and jig capacitance.
Figure 15. Break-Before-Make Time (tBBM)
V+
Network Analyzer
50 Ω
VNC
NC
Channel ON: NC to COM
COM
Source
Signal
VCOM
VI = VIH or VIL
NO
Network Analyzer Setup
VI
50 Ω
IN
+
Source Power = 0 dBM
(632-mV P-P at 50-Ω load)
GND
DC Bias = 350 mV
Figure 16. Bandwidth (BW)
V+
Network Analyzer
Channel OFF: NC to COM
50 Ω
VNC NC
COM
Source
Signal
50 Ω
VI = VIH or VIL
NO
Network Analyzer Setup
VI
50 Ω
VCOM
+
IN
GND
Source Power = 0 dBM
(632-mV P-P at 50-Ω load)
DC Bias = 350 mV
Figure 17. OFF Isolation (OISO)
14
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Parameter Measurement Information (continued)
V+
Network Analyzer
Channel ON: NC to COM
50 Ω
VNC
Channel OFF: NO to COM
NC
VCOM
Source
Signal
VNO
VI
50 Ω
VI = VIH or VIL
NO
Network Analyzer Setup
50 Ω
IN
+
Source Power = 0 dBM
(632-mV P-P at 50- Ω load)
GND
DC Bias = 350 mV
Figure 18. Crosstalk (XTALK)
V+
R GEN
VGEN
Logic
Input
(VI)
OFF
ON
OFF V
IL
NC or NO
COM
+
VIH
VCOM
VCOM
NC or NO
∆VCOM
CL(2)
VI
VGEN = 0 to V+
RGEN = 0
CL = 0.1 nF
QC = CL× ∆VCOM
VI = VIH or VIL
IN
Logic
Input(1)
GND
(1)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
(2)
CL includes probe and jig capacitance.
Figure 19. Charge Injection (QC)
Channel ON: COM to NC
VSOURCE = V+ P-P
VI = VIH or VIL
fSOURCE = 600 Hz to 20 kHz
RL = 600 Ω
CL = 50 pF
V+/2
+
RL
10 µ F
VO
COM
NO
VSOURCE
RL
VI
10 µ F
NC
Analyzer
CL(1)
IN
+
GND
(1)
CL includes probe and jig capacitance.
Figure 20. Total Harmonic Distortion (THD)
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8 Detailed Description
8.1 Overview
The TS5A3159 is a single-pole-double-throw (SPDT) solid-state analog switch. The TS5A3159, like all analog
switches, is bidirectional. When powered on, each COM pin is connected to the NC pin. For this device, NC
stands for normally closed and NO stands for normally open. If IN is low, COM is connected to NC. If IN is high,
COM is connected to NO.
The TS5A3159 is a break-before-make switch. This means that during switching, a connection is broken before a
new connection is established. The NC and NO pins are never connected to each other.
8.2 Functional Block Diagram
IN
COM
NC
NO
8.3 Feature Description
The low ON-state resistance, ON-state resistance matching, and charge injection in the TS5A3159 make this
switch an excellent choice for analog signals that require minimal distortion. In addition, the low THD allows
audio signals to be preserved more clearly as they pass through the device.
The 1.65-V to 5.5-V operation allows compatibility with more logic levels, and the bidirectional I/Os can pass
analog signals from 0 V to V+ with low distortion.
8.4 Device Functional Modes
Table 1. Function Table
NC TO COM,
COM TO NC
NO TO COM,
COM TO NO
L
ON
OFF
H
OFF
ON
IN
16
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TS5A3159 can be used in a variety of customer systems. The TS5A3159 can be used anywhere multiple
analog or digital signals must be selected to pass across a single line.
9.2 Typical Application
5V
V+
IN
NO
MCU or
System Logic
To/From
System
COM
GND
NC
Figure 21. System Schematic for TS5A3159
9.2.1 Design Requirements
In this particular application, V+ was 1.8 V, although V+ is allowed to be any voltage specified in Recommended
Operating Conditions. A decoupling capacitor is recommended on the V+ pin. See Power Supply
Recommendations for more details.
9.2.2 Detailed Design Procedure
In this application, IN is, by default, pulled low to GND. Choose the resistor size based on the current driving
strength of the GPIO, the desired power consumption, and the switching frequency (if applicable). If the GPIO is
open-drain, use pullup resistors instead.
9.2.3 Application Curve
20
tr = 2.5 ns
tf = 2.5 ns
V+ = 5 V
18
16
tON/OFF (ns)
14
12
10
8
6
4
2
0
−40
−20
0
20
40
60
80
100
Temperature (°C)
Figure 22. tON/OFF vs Temperature
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10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF bypass capacitor is recommended. If there are multiple pins labeled VCC, then a 0.01-μF or
0.022-μF capacitor is recommended for each VCC because the VCC pins will be tied together internally. For
devices with dual supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass
capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Below figure shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
Unused switch I/Os, such as NO, NC, and COM, can be left floating or tied to GND. However, the IN pin must be
driven high or low. Due to partial transistor turnon when control inputs are at threshold levels, floating control
inputs can cause increased ICC or unknown switch selection states.
11.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 23. Trace Example
18
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Device Nomenclature
Table 2. Parameter Description
SYMBOL
VCOM
DESCRIPTION
Voltage at COM
VNC
Voltage at NC
VNO
Voltage at NO
ron
Resistance between COM and NC or COM and NO ports when the channel is ON
rpeak
Peak ON-state resistance over a specified voltage range
Δron
Difference of ron between channels
ron(flat)
Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
INC(OFF)
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the OFF state under
worst-case input and output conditions
INO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state under
worst-case input and output conditions
INC(ON)
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the ON state and the
output (COM) being open
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the
output (COM) being open
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (COM to NO or COM to NC) in the ON
state and the output (NC or NO) being open
VIH
Minimum input voltage for logic high for the control input (IN)
VIL
Minimum input voltage for logic low for the control input (IN)
VIN
Voltage at IN
IIH, IIL
Leakage current measured at IN
tON
Turnon time for the switch. This parameter is measured under the specified range of conditions and by the
propagation delay between the digital control (IN) signal, and analog outputs (COM, NC, or NO) signal when the
switch is turning ON.
tOFF
Turnoff time for the switch. This parameter is measured under the specified range of conditions and by the
propagation delay between the digital control (IN) signal, and analog outputs (COM, NC, or NO) signal when the
switch is turning OFF.
tBBM
Break-before-make time. This parameter is measured under the specified range of conditions and by the
propagation delay between the output of two adjacent analog channels (NC and NO), when the control signal
changes state.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NC, NO,
or COM) output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the
control input. Charge injection, QC = CL × ΔVO, CL is the load capacitance, and ΔVO is the change in analog output
voltage.
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Table 2. Parameter Description (continued)
SYMBOL
DESCRIPTION
CNC(OFF)
Capacitance at the NC port when the corresponding channel (NC to COM) is OFF
CNO(OFF)
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
CNC(ON)
Capacitance at the NC port when the corresponding channel (NC to COM) is ON
CNO(ON)
Capacitance at the NO port when the corresponding channel (NO to COM) is ON
CCOM(ON)
CIN
Capacitance at the COM port when the corresponding channel (COM to NC or COM to NO) is ON
Capacitance of IN
OISO
OFF isolation of the switch is a measurement OFF-state switch impedance. This is measured in dB in a specific
frequency, with the corresponding channel (NC to COM or NO to COM) in the OFF state.
XTALK
Crosstalk is a measurement of unwanted signal coupling from an ON channel to an OFF channel (NC to NO or NO
to NC). This is measured in a specific frequency and in dB.
BW
I+
ΔI+
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB below the DC gain.
Static power-supply current with the control (IN) terminal at V+ or GND
This is the increase in I+ for each control (IN) input that is at the specified voltage, rather than at V+ or GND.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation, see the following:
• Implications of Slow or Floating CMOS Inputs, SCBA004
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
20
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Copyright © 2004–2015, Texas Instruments Incorporated
Product Folder Links: TS5A3159
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
(3)
Device Marking
(4/5)
(6)
TS5A3159DBVR
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JA8K, JA8R)
TS5A3159DBVRE4
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JA8K, JA8R)
TS5A3159DBVRG4
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JA8K, JA8R)
TS5A3159DBVT
ACTIVE
SOT-23
DBV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JA8K, JA8R)
TS5A3159DBVTG4
ACTIVE
SOT-23
DBV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JA8K, JA8R)
TS5A3159DCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JAK, JAR, JAZ)
TS5A3159DCKRE4
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JAK, JAR, JAZ)
TS5A3159DCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JAK, JAR, JAZ)
TS5A3159DCKTG4
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JAK, JAR, JAZ)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of