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TS5A3160
SCDS216E – OCTOBER 2005 – REVISED NOVEMBER 2017
TS5A3160 1-Ω SPDT Analog Switch
1 Features
•
•
•
•
•
•
•
•
•
1
•
3 Description
Low ON-State Resistance (1 Ω)
Isolation in the Powered-Off Mode, V+ = 0
Specified Make-Before-Break Switching
Control Inputs are 5-V Tolerant
Low Charge Injection
Excellent ON-Resistance Matching
Low Total Harmonic Distortion
1.65-V to 5.5-V Single-Supply Operation
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
The TS5A3160 device is a single-pole double-throw
(SPDT) analog switch that is designed to operate
from 1.65 V to 5.5 V. The device offers a low ONstate resistance and an excellent channel-to-channel
ON-state resistance matching. The device has
excellent total harmonic distortion (THD) performance
and consumes very low power. These features make
this device suitable for portable audio applications.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TS5A3160DBV
SOT-23 (6)
2.90 mm × 1.60 mm
TS5A3160DCK
SC70 (6)
2.00 mm × 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
Mobile Phones
Consumer and Computing
Portable Instrumentation
Block Diagram
IN
COM
NC
NO
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A3160
SCDS216E – OCTOBER 2005 – REVISED NOVEMBER 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
7
8
1
1
1
2
3
4
Absolute Maximum Ratings ...................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics for 5-V Supply................... 5
Electrical Characteristics for 3.3-V Supply................ 7
Electrical Characteristics for 2.5-V Supply................ 9
Electrical Characteristics for 1.8-V Supply.............. 11
Typical Characteristics ............................................ 13
Parameter Measurement Information ................ 15
Detailed Description ............................................ 18
8.1 Overview ................................................................. 18
8.2 Functional Block Diagram ....................................... 18
8.3 Feature Description................................................. 18
8.4 Device Functional Modes........................................ 18
9
Application and Implementation ........................ 19
9.1 Application Information............................................ 19
9.2 Typical Application ................................................. 19
10 Power Supply Recommendations ..................... 20
11 Layout................................................................... 20
11.1 Layout Guidelines ................................................. 20
11.2 Layout Example .................................................... 20
12 Device and Documentation Support ................. 21
12.1
12.2
12.3
12.4
12.5
12.6
Device Support ....................................................
Documentation Support .......................................
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
21
22
22
22
22
22
13 Mechanical, Packaging, and Orderable
Information ........................................................... 22
4 Revision History
Changes from Revision D (June 2015) to Revision E
•
Changed Input leakage current UNIT value From: μA To: nA in the Electrical Characteristics for 5-V Supply table ............ 5
Changes from Revision C (March 2012) to Revision D
•
2
Page
Page
Added Applications, Device Information table, Pin Functions table, ESD Ratings table, Thermal Information table,
Typical Characteristics, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................. 1
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SCDS216E – OCTOBER 2005 – REVISED NOVEMBER 2017
5 Pin Configuration and Functions
DBV or DCK Packages
6-Pin SOT-23 or SC-70
Top View
NO 1
6
IN
GND 2
5
V+
NC 3
4 COM
Pin Functions
PIN
NO.
NAME
1
NO
2
3
I/O
DESCRIPTION
I/O
Normally open switch port
GND
—
Ground
NC
I/O
Normally closed switch port
4
COM
I/O
Common switch port
5
V+
—
Power supply
6
IN
I
Switch select. High = COM connected to NO; Low = COM connected to NC.
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SCDS216E – OCTOBER 2005 – REVISED NOVEMBER 2017
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
MAX
UNIT
–0.5
6.5
V
–0.5
V+ + 0.5
V
V+
Supply voltage (3)
VNC
VNO
VCOM
Analog voltage (3)
IK
Analog port diode current
INC
INO
ICOM
On-state switch current
VI
Digital input voltage (3)
IIK
Digital input clamp current
I+
Continuous current through V+
IGND
Continuous current through GND
–100
Tstg
Storage temperature
–65
(1)
(2)
(3)
(4)
(5)
(6)
(4) (5)
VNC, VNO, VCOM < 0
–50
VNC, VNO, VCOM = 0 to V+
On-state peak switch current (6)
(4)
VI < 0
mA
–200
200
–400
400
–0.5
6.5
mA
V
–50
mA
100
mA
mA
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
Pulse at 1-ms duration < 10% duty cycle
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VI/O
Switch input/output voltage
V+
Supply voltage
VI
Control input voltage
TA
Operating temperature
MIN
MAX
0
V+
UNIT
V
1.65
5.5
V
0
5.5
V
–40
85
°C
6.4 Thermal Information
TS5A3160
THERMAL METRIC (1)
RθJA
(1)
4
DBV (SOT-23)
DCK (SC-70)
6 PINS
6 PINS
165
259
Junction-to-ambient thermal resistance
UNIT
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SCDS216E – OCTOBER 2005 – REVISED NOVEMBER 2017
6.5 Electrical Characteristics for 5-V Supply
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
ANALOG SWITCH
VCOM, VNC,
VNO
Analog signal
range
rpeak
Peak ON
resistance
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 13
25°C
ron
ON-state
resistance
VNO or VNC = 2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 13
25°C
Δron
ON-state
resistance
match
between
channels
VNO or VNC = 2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 13
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 13
ron(flat)
ON-state
resistance
flatness
VNO or VNC = 1 V, 1.5 V,
2.5 V,
ICOM = –100 mA,
Switch ON,
see Figure 13
VNC or VNO = 1 V,
VCOM = 4.5 V,
or
VNO = 4.5 V, VCOM = 1 V,
Switch OFF,
see Figure 14
VNC or VNO = 0 to 5.5 V,
VCOM = 5.5 V to 0,
Switch OFF,
see Figure 14
INC(OFF),
INO(OFF)
INC(PWROFF),
INO(PWROFF)
NC, NO
OFF leakage
current
0
Full
Full
0.8
4.5 V
0.7
4.5 V
0.05
4.5 V
INC(ON),
INO(ON)
NC, NO
ON leakage
current
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
see Figure 15
ICOM(PWROFF)
COM
OFF leakage
current
VCOM = 0 to 5.5 V,
VNC or VNO = 5.5 V to 0,
Switch OFF,
see Figure 14
ICOM(ON)
COM
ON leakage
current
VCOM = 1 V,
VNC or VNO = Open,
or
VCOM = 4.5 V,
VNC or VNO = Open,
Full
4.5 V
5.5 V
0V
Full
–1
0.25
Ω
Ω
5.5 V
0.2
1
20
2
–100
0.1
μA
nA
1
20
2
nA
20
100
–20
–20
20
100
–20
–1
0V
2
–100
–20
5.5 V
25°C
Switch ON,
see Figure 15
0.1
–20
25°C
Full
Ω
0.25
25°C
Full
Ω
0.15
25°C
25°C
V
0.1
0.1
Full
Full
0.9
1.1
25°C
25°C
1.1
1.5
25°C
Full
V+
μA
20
–100
100
nA
DIGITAL CONTROL INPUT (IN) (2)
VIH
Input logic high
Full
2.4
5.5
V
VIL
Input logic low
Full
0
0.8
V
IIH, IIL
Input leakage
current
(1)
(2)
25°C
VI = 5.5 V or 0
Full
5.5 V
–2
0.2
100
100
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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Electrical Characteristics for 5-V Supply (continued)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
25°C
5V
2
3.5
6
Full
4.5 V
to 5.5
V
1
25°C
5V
3
Full
4.5 V
to 5.5
V
2
25°C
5V
2
Full
5 V to
5.5 V
2
UNIT
DYNAMIC
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 17
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 17
tMBB
Make-beforebreak time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 18
QC
Charge
injection
VGEN = 0,
RGEN = 0,
CL = 1 nF,
see Figure 22
25°C
5V
36.5
pC
CNC(OFF),
CNO(OFF)
NC, NO
OFF
capacitance
VNC or VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
5V
18
pF
CNC(ON),
CNO(ON)
NC, NO
ON
capacitance
VNC or VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
5V
55
pF
CCOM(ON)
COM
ON
capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
5V
55
pF
CI
Digital input
capacitance
VI = V+ or GND,
See Figure 16
25°C
5V
2
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
See Figure 19
25°C
5V
100
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 10 MHz,
See Figure 20
25°C
5V
–64
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
See Figure 20
25°C
5V
–64
dB
THD
Total harmonic RL = 600 Ω,
distortion
CL = 50 pF,
f = 20 Hz to 20 kHz,
see Figure 23
25°C
5V
0.004%
tON
8
8.5
13
15
7
ns
ns
12
15
ns
SUPPLY
I+
6
25°C
Positive supply
VI = V+ or GND
current
Full
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5.5 V
10
50
500
nA
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SCDS216E – OCTOBER 2005 – REVISED NOVEMBER 2017
6.6 Electrical Characteristics for 3.3-V Supply
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
ANALOG SWITCH
VCOM, VNC, VNO
Analog signal
range
rpeak
Peak ON
resistance
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 13
25°C
ron
ON-state
resistance
VNO or VNC = 2 V,
ICOM = –100 mA,
Switch ON,
see Figure 13
25°C
Δron
ON-state
resistance
match
between
channels
VNO or VNC = 2 V, 0.8 V,
ICOM = –100 mA,
Switch ON,
see Figure 13
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –100 mA,
Switch ON,
see Figure 13
ron(flat)
ON-state
resistance
flatness
INC(OFF),
INO(OFF)
NC, NO
OFF leakage
current
INC(PWROFF),
INO(PWROFF)
0
Full
Full
1.3
3V
VNO or VNC = 2 V, 0.8 V,
ICOM = –100 mA,
Switch ON,
see Figure 13
1.2
3V
VNC or VNO = 1 V,
VCOM = 3 V,
or
VNC or VNO = 3 V,
VCOM = 1 V,
Switch OFF,
see Figure 14
VNC or VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,
Switch OFF,
see Figure 14
0.1
3V
INC(ON),
INO(ON)
NC, NO
ON leakage
current
VNC or VNO = 1 V,
VCOM = Open,
or
VNC or VNO = 3 V,
VCOM = Open,
Switch ON,
see Figure 15
ICOM(PWROFF)
COM
OFF leakage
current
VCOM = 0 to 3.6 V,
VNC or VNO = 3.6 V to 0,
Switch OFF,
see Figure 14
ICOM(ON)
COM
ON leakage
current
VCOM = 1 V,
VNC or VNO = Open,
or
VCOM = 3 V,
VNC or VNO = Open,
Switch ON,
see Figure 15
Full
0.15
3.6 V
0V
3.6 V
25°C
Full
–1
0.3
Ω
Ω
3.6 V
0.2
1
15
2
–20
0.2
μA
nA
1
15
2
nA
10
20
–15
–10
20
50
–15
–1
0V
2
–50
–10
25°C
Full
Ω
0.3
–20
25°C
Full
Ω
0.2
Full
25°C
V
0.15
0.15
3V
25°C
Full
1.5
1.7
25°C
25°C
1.6
2
25°C
Full
V+
μA
10
–20
20
nA
DIGITAL CONTROL INPUT (IN) (2)
VIH
Input logic high
Full
2
5.5
V
VIL
Input logic low
Full
0
0.8
V
Input leakage
current
25°C
–2
2
–100
100
IIH, IIL
(1)
(2)
VI = 5.5 V or 0
Full
3.6 V
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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Electrical Characteristics for 3.3-V Supply (continued)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
4.5
13
UNIT
DYNAMIC
25°C
3.3 V
2
Full
3 V to
3.6 V
1
25°C
3.3 V
3
Full
3 V to
3.6 V
2
25°C
3.3 V
1
Full
3 V to
3.6 V
1
CL = 1 nF,
see Figure 22
25°C
3.3 V
20
pC
NC, NO
OFF
capacitance
VNC or VNO = V+ or GND,
See Figure 16
Switch OFF,
25°C
3.3 V
18
pF
CNC(ON),
CNO(ON)
NC, NO
ON
capacitance
VNC or VNO = V+ or GND,
See Figure 16
Switch ON,
25°C
3.3 V
55
pF
CCOM(ON)
COM
ON
capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
3.3 V
55
pF
CI
Digital input
capacitance
VI = V+ or GND,
See Figure 16
25°C
3.3 V
2
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
See Figure 19
25°C
3.3 V
100
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 10 MHz,
See Figure 20
25°C
3.3 V
–64
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
See Figure 20
25°C
3.3 V
–64
dB
THD
Total harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
see Figure 23
25°C
3.3 V
0.01%
tON
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 17
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 17
tMBB
Make-beforebreak time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 18
QC
Charge
injection
VGEN = 0,
RGEN = 0,
CNC(OFF),
CNO(OFF)
15
9
15
20
7
ns
ns
12
15
ns
SUPPLY
I+
8
25°C
Positive supply
VI = V+ or GND
current
Full
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3.6 V
10
30
100
nA
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6.7 Electrical Characteristics for 2.5-V Supply
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
ANALOG SWITCH
VCOM, VNC,
VNO
Analog signal
range
rpeak
Peak ON
resistance
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –8 mA,
Switch ON,
see Figure 13
25°C
ron
ON-state
resistance
VNO or VNC = 1.8 V,
ICOM = –8 mA,
Switch ON,
see Figure 13
25°C
Δron
ON-state
resistance
match
between
channels
VNO or VNC = 1.8 V,
ICOM = –8 mA,
Switch ON,
see Figure 13
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –8 mA,
Switch ON,
see Figure 13
ron(flat)
ON-state
resistance
flatness
INC(OFF),
INO(OFF)
NC, NO
OFF leakage
current
INC(PWROFF),
INO(PWROFF)
0
Full
Full
1.8
2.3 V
1.5
2.3 V
25°C
VNC or VNO = 0.5 V,
VCOM = 2.2 V,
or
VNC or VNO = 2.2 V,
VCOM = 0.5 V,
25°C
Switch OFF,
see Figure 14
VNC or VNO = 0 to 2.7 V,
VCOM = 2.7 V to 0,
Switch OFF,
see Figure 14
INC(ON),
INO(ON)
NC, NO
ON leakage
current
VNC or VNO = 0.5 V,
VCOM = Open,
or
VNC or VNO = 2.2 V,
VCOM = Open,
Switch ON,
see Figure 15
ICOM(PWROFF)
COM
OFF leakage
current
VCOM = 0 to 2.7 V,
VNC or VNO = 2.7 V to 0,
Switch OFF,
see Figure 14
ICOM(ON)
COM
ON leakage
current
VCOM = 0.5 V,
VNC or VNO = Open,
or
VCOM = 2.2 V,
VNC or VNO = Open,
Switch ON,
see Figure 15
0.15
2.3 V
25°C
Full
2.3 V
0V
0.6
1
2
20
–50
–1
2.7 V
1
10
2
Ω
Ω
0.1
μA
nA
1
10
2
nA
10
20
–10
–10
2.7 V
0.1
–20
–1
0V
50
–10
–10
25°C
Full
Ω
1
–20
25°C
Full
Ω
2.6
2.3 V
25°C
Full
V
0.2
0.2
Full
Full
2
2.4
25°C
VNO or VNC = 0.8 V, 1.8 V, Switch ON,
ICOM = –8 mA,
see Figure 13
2.5
2.7
25°C
Full
V+
μA
10
–20
20
nA
DIGITAL CONTROL INPUT (IN) (2)
VIH
Input logic
high
Full
1.8
5.5
VIL
Input logic
low
Full
0
0.6
IIH, IIL
Input leakage
VI = 5.5 V or 0
current
(1)
(2)
25°C
Full
2.7 V
–2
2
–20
20
V
V
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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Electrical Characteristics for 2.5-V Supply (continued)
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
25°C
2.5 V
2
6.5
15
Full
2.3 V
to
2.7 V
1
25°C
2.5 V
3
Full
2.3 V
to
2.7 V
2
25°C
2.5 V
1
Full
2.3 V
to
2.7 V
1
UNIT
DYNAMIC
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 17
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 17
tMBB
Make-beforebreak time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 18
QC
Charge
injection
VGEN = 0,
RGEN = 0,
CL = 1 nF,
see Figure 22
25°C
2.5 V
12
pC
CNC(OFF),
CNO(OFF)
NC, NO
OFF
capacitance
VNC or VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
2.5 V
18
pF
CNC(ON),
CNO(ON)
NC, NO
ON
capacitance
VNC or VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
2.5 V
55
pF
CCOM(ON)
COM
ON
capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
2.5 V
55
pF
CI
Digital input
capacitance
VI = V+ or GND,
See Figure 16
25°C
2.5 V
2
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
See Figure 19
25°C
2.5 V
100
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 10 MHz,
See Figure 20
25°C
2.5 V
–64
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
See Figure 20
25°C
2.5 V
–64
dB
THD
Total
harmonic
distortion
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
see Figure 23
25°C
2.5 V
0.02%
Positive
supply
current
VI = V+ or GND
tON
17
11
18
20
8
ns
ns
12
15
ns
SUPPLY
I+
10
25°C
Full
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2.7 V
30
50
nA
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6.8 Electrical Characteristics for 1.8-V Supply
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
TYP MAX
0
V+
UNIT
ANALOG SWITCH
VCOM, VNC,
VNO
Analog signal
range
rpeak
Peak ON
resistance
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –2 mA,
Switch ON,
see Figure 13
25°C
ron
ON-state
resistance
VNO or VNC = 1.5 V,
ICOM = –2 mA,
Switch ON,
see Figure 13
25°C
Δron
ON-state
resistance
match
between
channels
VNO or VNC = 1.5 V,
ICOM = –2 mA,
Switch ON,
see Figure 13
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –2 mA,
Switch ON,
see Figure 13
ron(flat)
ON-state
resistance
flatness
INC(OFF),
INO(OFF)
NC, NO
OFF leakage
current
INC(PWROFF),
INO(PWROFF)
Full
Full
5
1.65 V
15
2
1.65 V
3.5
25°C
VNO or VNC = 0.6 V, 1.5 V,
ICOM = –2 mA,
Switch ON,
see Figure 13
VNC or VNO = 0.3 V,
VCOM = 1.65 V,
or
VNC or VNO = 1.65 V,
VCOM = 0.3 V,
Switch OFF,
see Figure 14
VNC or VNO = 0 to 1.95 V,
VCOM = 1.95 V to 0,
Switch OFF,
see Figure 14
Full
0.15
1.65 V
NC, NO
ON leakage
current
VNC or VNO = 0.3 V,
VCOM = Open,
or
VNC or VNO = 1.65 V,
VCOM = Open,
Switch ON,
see Figure 15
ICOM(PWROFF)
COM
OFF leakage
current
VCOM = 0 to 1.95 V,
VNC or VNO =1.95 V to 0,
Switch OFF,
see Figure 14
ICOM(ON)
COM
ON leakage
current
VCOM = 0.3 V,
VNC or VNO = Open,
or
VCOM = 1.65 V,
VNC or VNO = Open,
Switch ON,
see Figure 15
Ω
Ω
5
1.65 V
Ω
4.5
Full
25°C
INC(ON),
INO(ON)
Ω
0.4
0.4
25°C
25°C
2.5
V
Full
25°C
Full
–5
1.95 V
0V
25°C
Full
25°C
Full
–1
1.95 V
0.1
1
5
2
–20
0.1
μA
nA
1
5
2
nA
5
20
–5
–5
5
20
–5
–1
0V
25°C
Full
–20
–5
1.95 V
2
μA
5
–20
20
nA
DIGITAL CONTROL INPUT (IN) (2)
VIH
Input logic high
Full
1.5
5.5
V
VIL
Input logic low
Full
0
0.6
V
Input leakage
current
25°C
–2
2
–20
20
IIH, IIL
(1)
(2)
VI = 5.5 V or 0
Full
1.95 V
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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Electrical Characteristics for 1.8-V Supply (continued)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
V+
MIN
25°C
1.8 V
6
Full
2.3 V
to 2.7
V
5
25°C
1.8 V
6
Full
2.3 V
to 2.7
V
5
25°C
1.8 V
2
Full
2.3 V
to 2.7
V
2
TYP MAX
UNIT
DYNAMIC
13
24
Turnon time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 17
tOFF
Turnoff time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 17
tMBB
Make-beforebreak time
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
see Figure 18
QC
Charge
injection
VGEN = 0,
RGEN = 0,
CL = 1 nF,
see Figure 22
25°C
1.8 V
5.5
pC
CNC(OFF),
CNO(OFF)
NC, NO
OFF
capacitance
VNC or VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
1.8 V
18
pF
CNC(ON),
CNO(ON)
NC, NO
ON
capacitance
VNC or VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
1.8 V
55
pF
CCOM(ON)
COM
ON
capacitance
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
1.8 V
55
pF
CI
Digital input
capacitance
VI = V+ or GND,
See Figure 16
25°C
1.8 V
2
pF
BW
Bandwidth
RL = 50 Ω,
Switch ON,
See Figure 19
25°C
1.8 V
105
MHz
OISO
OFF isolation
RL = 50 Ω,
f = 10 MHz,
See Figure 20
25°C
1.8 V
–64
dB
XTALK
Crosstalk
RL = 50 Ω,
f = 1 MHz,
See Figure 20
25°C
1.8 V
–64
dB
THD
Total harmonic RL = 600 Ω,
distortion
CL = 50 pF,
f = 20 Hz to 20 kHz,
see Figure 23
25°C
1.8 V
0.06%
tON
27
15
27
30
7
ns
ns
12
15
ns
SUPPLY
I+
12
25°C
Positive supply
VI = V+ or GND
current
Full
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5
15
50
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6.9 Typical Characteristics
1.4
3.5
3.0
1.2
V+ = 1.8 V
1.0
2.0
ron (Ω)
ron (Ω)
2.5
V+ = 2.5 V
1.5
V+ = 3.3 V
0.8
25°C
0.6
–40°C
0.4
1.0
0.2
0.5
V+ = 5 V
0.0
0.0
0.5
1.0
1.5
VCOM (V)
Figure 1. ron vs VCOM
0.0
0.0
2.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VCOM (V)
Figure 2. ron vs VCOM (V+ = 3.3 V)
1.0
20
COM(ON)
Leakage Current (nA)
85°C
0.9
0.8
0.7
ron (Ω)
85°C
25°C
0.6
–40°C
0.5
0.4
0.3
0.2
10
0
NO/NC (off)
−10
−20
−30
NO/NC (on)
0.1
−40
0.0
0
1
2
3
4
5
−40°C
6
3500
°C
25
85
3500
NC/NO (PWRoff)
2500
COM (PWRoff)
2000
NC/NO (PWRoff)
3000
Leakage Current (nA)
3000
Leakage Current (nA)
°C
TA (°C)
Figure 4. Leakage Current vs Temperature (V+ = 5.5 V)
VCOM (V)
Figure 3. ron vs VCOM (V+ = 5 V)
1500
1000
500
0
2500
COM (PWRoff)
2000
1500
1000
500
0
−500
−500
−40°C
°C
°C
25 85
TA (°C)
Figure 5. Leakage Current vs Temperature (V+ = 5 V)
−40°C
°C
°C
25 85
TA (°C)
Figure 6. Charge Injection (QC) vs VCOM
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Typical Characteristics (continued)
2.5
20
tOFF
18
tON/tOFF (ns)
14
Logic Level Threshold (nA)
16
tON
12
10
8
6
4
2
2.0
VIH
1.5
VIL
1.0
0.5
0.0
0
0
0
1
2
Figure 7. tON
3
4
5
1
2
3
4
5
6
V+ (V)
6
V+ (V)
and tOFF vs Supply Voltage
Figure 8. Logic-Level Threshold vs V+
0
0
−10
−2
−20
Attenuation (dB)
Gain (dB)
−4
−6
−8
−10
−12
−14
0.1
−30
−40
−50
−60
−70
−80
−90
0.1
1
10
100
1000
Frequency (MHz)
Figure 9. Bandwidth (Gain vs Frequency) (V+ = 5 V)
1
10
100
1000
Frequency (MHz)
Figure 10. OFF Isolation vs Crosstalk (V+ = 5 V)
250
0.010
0.009
200
0.008
150
ICC+ (nA)
THD + (%)
0.007
0.006
0.005
0.004
100
50
0.003
0.002
0
−60
0.001
0.000
0
0.01
1
10
100
Frequency (kHz)
Figure 11. Total Harmonic Distortion vs Frequency
14
−40
−20
0
20
40
60
80
100
TA (°C)
0.1
Figure 12. Power-Supply Current vs Temperature
(V+ = 5 V)
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7 Parameter Measurement Information
V+
VNC NC
COM
VCOM
+
Channel ON
VNO NO
r on –
IN
VI
VCOM
VNO or VNC
Ω
I COM
ICOM
VI = VIH or VIL
+
GND
Figure 13. ON-State Resistance (ron)
V+
VNC NC
COM
+
VCOM
+
VNO NO
OFF-State Leakage Current
Channel OFF
VI = VIH or VIL
IN
VI
+
GND
Figure 14. OFF-State Leakage Current (INC(OFF), INO(OFF), ICOM(OFF), INC(PWROFF), INO(PWROFF), ICOM(PWROFF))
V+
VNC NC
COM
+
VCOM
VNO NO
VI
ON-State Leakage Current
Channel ON
VI = VIH or VIL
IN
+
GND
Figure 15. ON-State Leakage Current (ICOM(ON), INC(ON), INO(ON))
V+
Capacitance
Meter
VNC
NC
VNO
NO
VBIAS = V+ or GND
VI = V+ or GND
VCOM COM
VBIAS
VI
Capacitance is measured at NC,
NO, COM, and IN inputs during
ON and OFF conditions.
IN
GND
Figure 16. Capacitance (CI, CCOM(ON), CNC(OFF), CNO(OFF), CNC(ON), CNO(ON))
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Parameter Measurement Information (continued)
V+
NC or NO
VNC or VNO
NC or NO
CL(2)
TEST
RL
CL
VCOM
tON
50 Ω
35 pF
V+
tOFF
50 Ω
35 pF
V+
COM
VCOM
RL
IN
VI
CL(2)
Logic
Input(1)
V+
Logic
Input
(VI)
RL
GND
50%
50%
0
tON
tOFF
Switch
Output
(VNC or VNO)
90%
90%
A.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf
< 5 ns.
B.
CL includes probe and jig capacitance.
Figure 17. Turnon (tON) and Turnoff Time (tOFF)
V+
VCOM
COM
VNO
NO
VI
CL(2)
RL
CL(2)
RL
VCOM = V+
RL = 50 Ω
CL = 35 pF
GND
50%
0
VNC
Switch
Output
IN
Logic
Input(1)
V+
Logic
Input
(VI)
VNC
NC
0.8 VOUT
0.8 VOUT
VNQ
tMBB
A.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf
< 5 ns.
B.
CL includes probe and jig capacitance.
Figure 18. Make-Before-Break Time (tMBB)
V+
Network Analyzer
50 Ω
VNC
NC
Channel ON: NC to COM
COM
Source
Signal
VCOM
VI = V+ or GND
NO
Network Analyzer Setup
50 Ω
VI
+
IN
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
GND
DC Bias = 350 mV
Figure 19. Bandwidth (BW)
16
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Parameter Measurement Information (continued)
V+
Network Analyzer
Channel OFF: NC to COM
50 Ω
VNC
NC
VI = V+ or GND
COM
Source
Signal
50 Ω
VCOM
NO
Network Analyzer Setup
IN
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
VI
50 Ω
+
GND
DC Bias = 350 mV
Figure 20. OFF Isolation (OISO)
V+
Network Analyzer
Channel ON: NC to COM
50 Ω
VNC
NC
VNO
NO
Channel OFF: NO to COM
VCOM
Source
Signal
VI
50 Ω
Network Analyzer Setup
50 Ω
IN
+
VI = V+ or GND
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
GND
DC Bias = 350 mV
Figure 21. Crosstalk (XTALK)
V+
RGEN
VGEN
Logic
Input
(VI)
ON
OFF
OFF V
IL
NC or NO
COM
+
VIH
VCOM
VCOM
NC or NO
DVCOM
CL(2)
VI
VGEN = 0 to V+
IN
Logic
Input(1)
RGEN = 0
CL = 1 nF
QC = CL × ΔVCOM
VI = VIH or VIL
GND
(1)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf
< 5 ns.
A.
CL includes probe and jig capacitance.
Figure 22. Charge Injection (QC)
V+
RGEN
VGEN
Logic
Input
(VI)
ON
OFF
OFF V
IL
NC or NO
COM
+
VIH
VCOM
VCOM
NC or NO
DVCOM
CL(2)
VI
Logic
Input(1)
VGEN = 0 to V+
IN
RGEN = 0
CL = 1 nF
QC = CL × ΔVCOM
VI = VIH or VIL
GND
Figure 23. Total Harmonic Distortion (THD)
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8 Detailed Description
8.1 Overview
The TS5A3160 is a single-pole-double-throw (SPDT) solid-state analog switch. The TS5A3160, like all analog
switches, is bidirectional. When powered on, each COM pin is connected to the NC pin. For this device, NC
stands for normally closed and NO stands for normally open. If IN is low, COM is connected to NC. If IN is high,
COM is connected to NO.
The TS5A3160 is a make-before-break switch. This means that during switching, a connection is made before
the existing connection is broken. During this brief period, the NC and NO pins are connected to each other.
8.2 Functional Block Diagram
IN
COM
NC
NO
8.3 Feature Description
The low ON-state resistance, ON-state resistance matching, and charge injection in the TS5A3160 make this
switch an excellent choice for analog signals that require minimal distortion. In addition, the low THD allows
audio signals to be preserved more clearly as they pass through the device.
The 1.65-V to 5.5-V operation allows compatibility with more logic levels, and the bidirectional I/Os can pass
analog signals from 0 V to V+ with low distortion.
8.4 Device Functional Modes
Table 1 lists the functional modes for the TS5A3160.
Table 1. Function Table
NC TO COM,
COM TO NC
NO TO COM,
COM TO NO
L
ON
OFF
H
OFF
ON
IN
18
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TS5A3160 can be used in a variety of customer systems. The TS5A3160 can be used anywhere multiple
analog or digital signals must be selected to pass across a single line.
9.2 Typical Application
5V
V+
IN
NO
MCU or
System Logic
To/From
System
COM
GND
NC
Figure 24. System Schematic for TS5A3160
9.2.1 Design Requirements
In this particular application, V+ was 1.8 V, although V+ is allowed to be any voltage specified in Recommended
Operating Conditions. A decoupling capacitor is recommended on the V+ pin. See Power Supply
Recommendations for more details.
9.2.2 Detailed Design Procedure
In this application, IN is, by default, pulled low to GND. Choose the resistor size based on the current driving
strength of the GPIO, the desired power consumption, and the switching frequency (if applicable). If the GPIO is
open-drain, use pullup resistors instead.
9.2.3 Application Curve
10
9
tOFF
8
tON/tOFF (ns)
7
6
5
4
3
tON
2
1
0
−40
25
TA (°C)
85
Figure 25. tON and tOFF vs Temperature (V+ = 5 V)
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10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions.
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a singlesupply, a 0.1-μF bypass capacitor is recommended. If there are multiple pins labeled VCC, then a 0.01-μF or
0.022-μF capacitor is recommended for each VCC because the VCC pins will be tied together internally. For
devices with dual-supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass
capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Below figure shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
Unused switch I/Os, such as NO, NC, and COM, can be left floating or tied to GND. However, the IN pin must be
driven high or low. Due to partial transistor turnon when control inputs are at threshold levels, floating control
inputs can cause increased ICC or unknown switch selection states.
11.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 26. Trace Example
20
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Device Nomenclature
Table 2. Parameter Description
SYMBOL
VCOM
DESCRIPTION
Voltage at COM
VNC
Voltage at NC
VNO
Voltage at NO
ron
Resistance between COM and NO ports when the channel is ON
rpeak
Peak on-state resistance over a specified voltage range
Δron
Difference of ron between channels in a specific device
ron(flat)
INC(OFF)
INC(PWROFF)
INO(OFF)
INO(PWROFF)
Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the OFF state under worstcase input and output conditions
Leakage current measured at the NC port during the power-off condition, V+ = 0
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state
Leakage current measured at the NO port during the power-off condition, V+ = 0
INC(ON)
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the ON state and the output
(COM) open
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output
(COM) open
INO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state and the output
(COM) open
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output
(COM) open
ICOM(OFF)
ICOM(PWROFF)
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the OFF state
Leakage current measured at the COM port during the power-off condition, V+ = 0
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the ON state and the output
(NO) open
VIH
Minimum input voltage for logic high for the control input (IN)
VIL
Maximum input voltage for logic low for the control input (IN)
VI
Voltage at the control input (IN)
IIH, IIL
Leakage current measured at the control input (IN)
tON
Turn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.
tOFF
Turn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.
tMBB
Make-before-break time. This parameter is measured under the specified range of conditions and by the propagation delay
between the output of two adjacent analog channels (NC and NO) when the control signal changes state.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM)
output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the control
input.Charge injection, QC = CL × ΔVCOM, CL is the load capacitance and ΔVCOM is the change in analog output voltage.
CNC(OFF)
Capacitance at the NC port when the corresponding channel (NC to COM) is OFF
CNO(OFF)
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
CNC(ON)
Capacitance at the NC port when the corresponding channel (NC to COM) is ON
CNO(ON)
Capacitance at the NO port when the corresponding channel (NO to COM) is ON
CCOM(ON)
CI
OISO
Capacitance at the COM port when the corresponding channel (COM to NO) is ON
Capacitance of IN
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific
frequency, with the corresponding channel (NO to COM) in the OFF state.
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Product Folder Links: TS5A3160
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TS5A3160
SCDS216E – OCTOBER 2005 – REVISED NOVEMBER 2017
www.ti.com
Table 2. Parameter Description (continued)
SYMBOL
XTALK
DESCRIPTION
Crosstalk is a measurement of unwanted signal coupling from an ON channel to an adjacent ON channel (NC1 to NC2).
This is measured in a specific frequency and in dB.
BW
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is -3 dB below the DC gain.
THD
Total harmonic distortion is defined as the ratio of the root mean square (RMS) value of the second, third, and higher
harmonics to the magnitude of fundamental harmonic.
I+
Static power-supply current with the control (IN) pin at V+ or GND
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation, see the following:
• Implications of Slow or Floating CMOS Inputs, SCBA004
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
22
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Product Folder Links: TS5A3160
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS5A3160DBVR
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
JAKR
JAKH
TS5A3160DBVT
ACTIVE
SOT-23
DBV
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
JAKR
JAKH
TS5A3160DCKJ
ACTIVE
SC70
DCK
6
10000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JKK, JKR)
JKH
TS5A3160DCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JKK, JKR)
JKH
TS5A3160DCKRG4
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JKK, JKR)
JKH
TS5A3160DCKT
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JKK, JKR)
JKH
TS5A3160DCKTG4
ACTIVE
SC70
DCK
6
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(JKK, JKR)
JKH
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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