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TS5A3166-Q1
SCDS357A – JULY 2014 – REVISED DECEMBER 2014
TS5A3166-Q1 0.9-Ω SPST Analog Switch
1 Features
2 Applications
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1
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Qualified for Automotive Applications
Isolation in Powered-Off Mode, V+ = 0
Low ON-State Resistance (0.9 Ω)
Control Inputs are 5.5 V Tolerant
Low Charge Injection
Low Total Harmonic Distortion (THD)
1.65-V to 5.5-V Single-Supply Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model (A114-B, Class II)
– 1000-V Charged-Device Model (C101)
Cell Phones
PDAs
Radar System
Infotainment System
Portable Instrumentation
Audio and Video Signal Routing
Low-Voltage Data-Acquisition Systems
Communication Circuits
Modems
Hard Drives
Computer Peripherals
Wireless Terminals and Peripherals
Microphone Switching – Notebook Docking
3 Description
The TS5A3166-Q1 is a single-pole single-throw
(SPST) analog switch that is designed to operate
from 1.65 V to 5.5 V. The device offers a low ONstate resistance. The device has excellent total
harmonic distortion (THD) performance and
consumes very low power. These features make this
device suitable for portable audio applications.
Device Information(1)
PART NUMBER
TS5A3166-Q
PACKAGE
SC70 (5)
BODY SIZE (NOM)
2.00 mm × 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
4 Simplified Schematic
1
NO
SW
2
COM
4
IN
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A3166-Q1
SCDS357A – JULY 2014 – REVISED DECEMBER 2014
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Simplified Schematic.............................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
8
1
1
1
1
2
3
3
Absolute Maximum Ratings ..................................... 3
ESD Ratings.............................................................. 3
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics for 5-V Supply .................. 5
Electrical Characteristics for 3.3-V Supply ............... 7
Electrical Characteristics for 2.5-V Supply ............... 9
Electrical Characteristics for 1.8-V Supply ............. 11
Typical Characteristics ............................................ 13
Parameter Measurement Information ................ 15
9
Detailed Description ............................................ 18
9.1
9.2
9.3
9.4
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
18
19
19
19
10 Application and Implementation........................ 20
10.1 Application Information.......................................... 20
10.2 Typical Application ............................................... 21
11 Power Supply Recommendations ..................... 22
12 Layout................................................................... 22
12.1 Layout Guidelines ................................................. 22
12.2 Layout Example .................................................... 22
13 Device and Documentation Support ................. 23
13.1 Trademarks ........................................................... 23
13.2 Electrostatic Discharge Caution ............................ 23
13.3 Glossary ................................................................ 23
14 Mechanical, Packaging, and Orderable
Information ........................................................... 23
5 Revision History
Changes from Original (July 2014) to Revision A
•
2
Page
Initial release of full document. .............................................................................................................................................. 1
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SCDS357A – JULY 2014 – REVISED DECEMBER 2014
6 Pin Configuration and Functions
SOT-23 OR SC-70 PACKAGE
(TOP VIEW)
NO 1
COM
2
GND
3
5
V+
4
IN
YZP PACKAGE
(BOTTOM VIEW)
GND
3
COM
2
NO
1
4
IN
5
V+
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
IO
Normally closed
Common
NO
1
COM
2
IO
GND
3
GND
Digital ground
IN
4
Input
Digital control pin to connect COM to NO
V+
5
Power
Power Supply
7 Specifications
7.1 Absolute Maximum Ratings (1) (2)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
V+
Supply voltage range (3)
–0.5
6.5
V
VNO
VCOM
Analog voltage range (3) (4) (5)
–0.5
V+ + 0.5
V
IK
Analog port diode current
INO
ICOM
On-state switch current
VI
Digital input voltage range (3) (4)
IIK
Digital clamp current
I+
Continuous current through V+
IGND
Continuous current through GND
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
(5)
(6)
On-state peak switch current (6)
VNO, VCOM < 0
UNIT
–50
VNO, VCOM = 0 to V+
VI < 0
mA
–200
200
–400
400
–0.5
6.5
mA
V
–50
mA
100
mA
–100
–65
mA
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
Pulse at 1-ms duration < 10% duty cycle.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002
(1)
Charged-device model (CDM), per AEC Q100-011
±2000
±1000
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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SCDS357A – JULY 2014 – REVISED DECEMBER 2014
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7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VI/O
Input/output voltage
0
5.5
UNIT
V
V+
Supply voltage
0
5.5
V
VI
Control Input Voltage
0
5.5
V
TA
Operating free-air temperature
–40
125
°C
7.4 Thermal Information
TS5A3166-Q1
THERMAL METRIC
(1)
DCK
UNIT
5 PINS
RθJA
Junction-to-ambient thermal resistance
283.1
RθJC(top)
Junction-to-case (top) thermal resistance
92.2
RθJB
Junction-to-board thermal resistance
60.8
ψJT
Junction-to-top characterization parameter
1.7
ψJB
Junction-to-board characterization parameter
60.0
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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SCDS357A – JULY 2014 – REVISED DECEMBER 2014
7.5 Electrical Characteristics for 5-V Supply (1)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
85°C
MIN
TYP
125°C
MAX
MIN
V+
0
TYP
MAX
UNIT
Analog Switch
Analog signal
range
VCOM,
VNO
0
Peak ON
resistance
rpeak
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
Switch ON,
See Figure 13
25°C
ON-state
resistance
ron
VNO = 2.5 V,
ICOM = –100 mA,
Switch ON,
See Figure 13
25°C
ON-state
resistance
flatness
NO
OFF leakage
current
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
ron(flat)
INO(OFF)
INO(PWROFF)
COM
OFF leakage
current
ICOM(OFF)
VNO = 1 V, 1.5 V,
2.5 V,
ICOM = –100 mA,
VNO = 1 V,
VCOM = 4.5 V,
or
VNO = 4.5 V,
VCOM = 1 V,
COM
ON leakage
current
Full
0.8
4.5 V
25°C
0.7
4.5 V
4.5 V
0.09
VNO = 0 to 5.5 V,
VCOM = 5.5 V to 0,
25°C
VCOM = 1 V,
VNO = 4.5 V,
or
VCOM = 4.5 V,
VNO = 1 V,
25°C
Full
Switch OFF,
See Figure 14
Full
25°C
Full
INO(ON)
VNO = 1 V,
VCOM = Open,
or
VNO = 4.5 V,
VCOM = Open,
Switch ON,
See Figure 15
ICOM(ON)
VCOM = 1 V,
VNO = Open,
or
VCOM = 4.5 V,
VNO = Open,
Switch ON,
See Figure 15
5.5 V
0V
5.5 V
0V
25°C
Full
–5
4
–100
–5
0.4
0.7
0.9
1.2
0.15
0.09
0.15
–80
100
–400
5
–5
15
–30
20
–80
100
–400
4
400
0.4
5
30
4
Ω
400
0.4
5
2
–80
20
–400
2
–80
–20
20
–400
400
30
0.3
μA
nA
μA
80
400
0.3
nA
80
–5
0.3
Ω
80
–30
–20
Ω
0.18
20
5
0.3
V
0.15
15
–15
–2
5.5 V
0.4
–15
–2
5.5 V
4
–100
–20
25°C
Full
0.9
0.15
–20
1.1
1.44
1
Full
Full
0.8
0.15
25°C
Switch OFF,
See Figure 14
1.1
1.2
25°C
Switch ON,
See Figure 13
ICOM(PWROF VCOM = 5.5 V to 0,
VNO = 0 to 5.5 V,
F)
NO
ON leakage
current
Full
V+
nA
80
nA
Digital Control Inputs (IN)
Input logic high
VIH
Full
2.4
5.5
2.4
5.5
V
Input logic low
VIL
Full
0
0.8
0
0.8
V
25°C
–2
–400
400
Input leakage
current
(1)
IIH, IIL
VI = 5.5 V or 0
Full
5.5 V
–20
0.3
2
20
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
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Electrical Characteristics for 5-V Supply(1) (continued)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
85°C
125°C
MIN
TYP
MAX
MIN
TYP
MAX
4.5
7
2.5
4.5
7
7.5
1.5
11.5
6
12.5
4
UNIT
Dynamic
Turn-on time
tON
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 17
Turn-off time
tOFF
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 17
Charge injection
QC
VGEN = 0,
RGEN = 0 ,
NO
OFF capacitance
CNO(OFF)
COM
OFF capacitance
25°C
5V
2.5
Full
4.5 V to
5.5 V
1.5
5V
6
Full
4.5 V to
5.5 V
4
CL = 1 nF,
See Figure 20
25°C
5V
1
1
pC
VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
5V
19
19
pF
CCOM(OFF)
VCOM = V+ or GND,
Switch OFF,
See Figure 16
25°C
5V
18
18
pF
NO
ON capacitance
CNO(ON)
VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
5V
35.5
35.5
pF
COM
ON capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
5V
35.5
35.5
pF
VI = V+ or GND,
See Figure 16
25°C
5V
2
2
pF
CI
9
ns
25°C
Digital input
capacitance
9
7.5
11.5
12.5
ns
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 18
25°C
5V
200
200
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
See Figure 19
25°C
5V
–64
–64
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to
20 kHz,
See Figure 21
25°C
5V
0.005
0.005
%
VI = V+ or GND,
Switch ON or
OFF
Supply
Positive supply
current
6
I+
25°C
Full
5.5 V
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0.01
0.1
0.5
0.01
0.1
0.8
μA
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SCDS357A – JULY 2014 – REVISED DECEMBER 2014
7.6 Electrical Characteristics for 3.3-V Supply (1)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
85°C
MIN
TYP
125°C
MAX
MIN
V+
0
TYP
MAX
UNIT
Analog Switch
Analog signal range
VCOM,
VNO
Peak ON resistance
rpeak
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
Switch ON,
See Figure 13
25°C
ON-state resistance
ron
VNO = 2 V,
ICOM = –100 mA,
Switch ON,
See Figure 13
25°C
ON-state resistance
flatness
0
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
ron(flat)
INO(OFF)
NO
OFF leakage current
INO(PWROFF)
ICOM(OFF)
COM
OFF leakage current
VNO = 2 V, 0.8 V,
ICOM = –100 mA,
VNO = 1 V,
VCOM = 3 V,
or
VNO = 3 V,
VCOM = 1 V,
COM
ON leakage current
Full
1.1
3V
25°C
1
3V
0.09
VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,
25°C
VCOM = 1 V,
VNO = 3 V,
or
VCOM = 3 V,
VNO = 1 V,
25°C
Full
Switch OFF,
See Figure 14
Full
25°C
Full
INO(ON)
VNO = 1 V,
VCOM = Open,
or
VNO = 3 V,
VCOM = Open,
Switch ON,
See Figure 15
ICOM(ON)
VCOM = 1 V,
VNO = Open,
or
VCOM = 3 V,
VNO = Open,
Switch ON,
See Figure 15
3.6 V
0V
3.6 V
0V
25°C
Full
–1
0.5
–20
–1
0.1
1
1.4
1.8
0.15
0.09
0.15
2
–2
20
–360
1
–1
5
–27
2
–72
20
–360
0.5
360
0.1
1
27
0.5
Ω
360
0.1
nA
μA
72
–2
27
2
–72
72
20
–360
360
2
–72
72
–20
20
–360
360
0.2
Ω
2
–27
–20
Ω
0.18
5
0.2
V
0.3
1
–5
–2
3.6 V
0.1
–5
–2
3.6 V
0.5
–20
–2
25°C
Full
1.4
0.15
–2
1.5
2.07
0.3
3V
25°C
Full
1.1
1.5
Full
Switch OFF,
See Figure 14
1.5
1.7
25°C
Switch ON,
See Figure 13
ICOM(PWROF VCOM = 3.6 V to 0,
VNO = 0 to 3.6 V,
F)
NO
ON leakage current
Full
V+
2
nA
μA
nA
nA
Digital Control Inputs (IN)
Input logic high
VIH
Full
2
5.5
2
5.5
V
Input logic low
VIL
Full
0
0.8
0
0.8
V
25°C
–2
–360
360
Input leakage
current
(1)
IIH, IIL
VI = 5.5 V or 0
Full
3.6 V
–20
0.3
2
20
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
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Electrical Characteristics for 3.3-V Supply(1) (continued)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
85°C
125°C
MIN
TYP
MAX
MIN
TYP
MAX
5
10
2
5
10
11
1.5
12
6.5
13
4
UNIT
Dynamic
25°C
3.3 V
2
Full
3 V to
3.6 V
1.5
25°C
3.3 V
6.5
Full
3 V to
3.6 V
4
CL = 1 nF,
See Figure 21
25°C
3.3 V
1
1
pC
VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
3.3 V
19
19
pF
CCOM(OFF)
VCOM = V+ or GND,
Switch OFF,
See Figure 16
25°C
3.3 V
18
18
pF
NO
ON capacitance
CNO(ON)
VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
3.3 V
36
36
pF
COM
ON capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
3.3 V
36
36
pF
VI = V+ or GND,
See Figure 16
25°C
3.3 V
2
2
pF
Turn-on time
tON
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 17
Turn-off time
tOFF
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 17
Charge injection
QC
VGEN = 0,
RGEN = 0,
NO
OFF capacitance
CNO(OFF)
COM
OFF capacitance
Digital input
capacitance
CI
9
11
9
ns
12
13
ns
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 18
25°C
3.3 V
200
200
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
See Figure 19
25°C
3.3 V
–64
–64
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to
20 kHz,
See Figure 21
25°C
3.3 V
0.01
0.01
%
VI = V+ or GND,
Switch ON or
OFF
Supply
Positive supply
current
8
I+
25°C
Full
3.6 V
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0.01
0.1
0.25
0.01
0.1
0.7
μA
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SCDS357A – JULY 2014 – REVISED DECEMBER 2014
7.7 Electrical Characteristics for 2.5-V Supply (1)
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
85°C
MIN
TYP
125°C
MAX
MIN
V+
0
TYP
MAX
UNIT
Analog Switch
Analog signal range
VCOM,
VNO
Peak ON resistance
rpeak
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
Switch ON,
See Figure 13
25°C
ON-state resistance
ron
VNO = 2 V,
ICOM = –100 mA,
Switch ON,
See Figure 13
25°C
ON-state resistance
flatness
2.3 V
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
ron(flat)
INO(OFF)
NO
OFF leakage current
INO(PWROFF)
ICOM(OFF)
COM
OFF leakage current
VNO = 2 V, 0.8 V,
ICOM = –100 mA,
VNO = 1 V,
VCOM = 3 V,
or
VNO = 3 V,
VCOM = 1 V,
COM
ON leakage current
Full
1.8
2.3 V
25°C
1.2
2.3 V
VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,
25°C
VCOM = 1 V,
VNO = 3 V,
or
VCOM = 3 V,
VNO = 1 V,
25°C
Full
Switch OFF,
See Figure 14
Full
25°C
Full
INO(ON)
VNO = 1 V,
VCOM = Open,
or
VNO = 3 V,
VCOM = Open,
Switch ON,
See Figure 15
0.4
ICOM(ON)
VCOM = 1 V,
VNO = Open,
or
VCOM = 3 V,
VNO = Open,
Switch ON,
See Figure 15
–5
2.7 V
0V
0V
–2
2.7 V
0.3
–50
–2
0.05
2.1
1.2
2.1
2.88
0.6
0.4
0.6
5
–64
50
–320
2
–2
15
–24
5
–64
50
–320
0.3
320
0.05
2
24
0.3
Ω
320
0.05
24
2
–64
64
20
–320
320
2
–64
–20
20
–320
320
0.3
nA
μA
64
–2
0.3
Ω
64
–24
–20
Ω
0.72
2
0.3
V
0.7
15
–15
–2
2.7 V
0.05
–15
–2
25°C
Full
–50
–5
2.7 V
0.3
2.4
3.1
0.6
25°C
Full
1.8
0.7
2.3 V
25°C
Full
2.4
2.4
Full
Switch OFF,
See Figure 14
V+
2.6
25°C
Switch ON,
See Figure 13
ICOM(PWROF VCOM = 3.6 V to 0,
VNO = 0 to 3.6 V,
F)
NO
ON leakage current
Full
0
2
nA
μA
nA
64
nA
Digital Control Inputs (IN1, IN2)
Input logic high
VIH
Full
1.8
5.5
1.8
5.5
V
Input logic low
VIL
Full
0
0.6
0
0.6
V
25°C
–2
–320
320
Input leakage
current
(1)
IIH, IIL
VI = 5.5 V or 0
Full
2.7 V
–20
0.3
2
20
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
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Electrical Characteristics for 2.5-V Supply(1) (continued)
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
85°C
125°C
MIN
TYP
MAX
MIN
TYP
MAX
6
10
2
6
10
12
1
10.5
4.5
15
3
UNIT
Dynamic
Turn-on time
tON
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 17
Turn-off time
tOFF
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 17
Charge injection
QC
VGEN = 0,
RGEN = 0,
NO
OFF capacitance
CNO(OFF)
COM
OFF capacitance
25°C
2.5 V
2
Full
2.3 V to
2.7 V
1
2.5 V
Full
2.3 V to
2.7 V
CL = 1 nF,
See Figure 21
25°C
2.5 V
4
4
pC
VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
2.5 V
19.5
19.5
pF
CCOM(OFF)
VCOM = V+ or GND,
Switch OFF,
See Figure 16
25°C
2.5 V
18.5
18.5
pF
NO
ON capacitance
CNO(ON)
VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
2.5 V
36.5
36.5
pF
COM
ON capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
2.5 V
36.5
36.5
pF
VI = V+ or GND,
See Figure 16
25°C
2.5 V
2
2
pF
CI
8
3
8
ns
25°C
Digital input
capacitance
4.5
12
10.5
15
ns
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 18
25°C
2.5 V
150
150
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
See Figure 19
25°C
2.5 V
–62
–62
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to
20 kHz,
See Figure 21
25°C
2.5 V
0.02
0.02
%
VI = V+ or GND,
Switch ON or
OFF
Supply
Positive supply
current
10
I+
25°C
Full
2.7 V
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0.02
0.25
0.001
0.02
0.6
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7.8 Electrical Characteristics for 1.8-V Supply (1)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted))
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
85°C
MIN
TYP
125°C
MAX
MIN
V+
0
TYP
MAX
UNIT
Analog Switch
Analog signal range
VCOM,
VNO
Peak ON resistance
rpeak
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
Switch ON,
See Figure 13
25°C
ON-state resistance
ron
VNO = 2 V,
ICOM = –100 mA,
Switch ON,
See Figure 13
25°C
ON-state resistance
flatness
0
0 ≤ VNO ≤ V+,
ICOM = –100 mA,
ron(flat)
INO(OFF)
NO
OFF leakage current
INO(PWROFF)
ICOM(OFF)
COM
OFF leakage current
VNO = 2 V, 0.8 V,
ICOM = –100 mA,
VNO = 1 V,
VCOM = 3 V,
or
VNO = 3 V,
VCOM = 1 V,
COM
ON leakage current
Full
4.2
1.65 V
25°C
1.6
1.65 V
4.1
VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,
25°C
VCOM = 1 V,
VNO = 3 V,
or
VCOM = 3 V,
VNO = 1 V,
25°C
Full
Switch OFF,
See Figure 14
Full
25°C
Full
INO(ON)
VNO = 1 V,
VCOM = Open,
or
VNO = 3 V,
VCOM = Open,
Switch ON,
See Figure 15
ICOM(ON)
VCOM = 1 V,
VNO = Open,
or
VCOM = 3 V,
VNO = Open,
Switch ON,
See Figure 15
0V
1.95 V
0V
25°C
Full
1.95 V
25°C
Full
3.9
1.6
1.95 V
3.9
4.8
V
Ω
Ω
2.8
22
4.1
27
1.95 V
25
36
2.8
1.65 V
25°C
Full
4.2
4.0
Full
Switch OFF,
See Figure 14
25
30
25°C
Switch ON,
See Figure 13
ICOM(PWROF VCOM = 0 to 3.6 V,
VNO = 3.6 V to 0,
F)
NO
ON leakage current
Full
V+
22
Ω
32.4
–5
5
–58
58
–50
50
–320
320
–2
2
–2
2
–10
10
–22
22
–5
5
–58
58
–50
50
–320
320
–2
2
–2
2
–10
10
–22
22
–2
2
–58
58
–20
20
–320
320
–2
2
–58
58
–20
20
–320
320
nA
μA
nA
μA
nA
nA
Digital Control Inputs (IN1, IN2)
Input logic high
VIH
Full
1.5
5.5
1.5
5.5
V
Input logic low
VIL
Full
0
0.6
0
0.6
V
25°C
–2
–320
320
Input leakage
current
(1)
IIH, IIL
VI = 5.5 V or 0
Full
1.95 V
–20
0.3
2
20
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
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Electrical Characteristics for 1.8-V Supply(1) (continued)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted))
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
85°C
125°C
MIN
TYP
MAX
MIN
TYP
MAX
9
18
3
9
18
20
1
15.5
5
18.5
4
UNIT
Dynamic
25°C
1.8 V
3
Full
1.65 V to
1.95 V
1
25°C
1.8 V
5
Full
1.65 V to
1.95 V
4
CL = 1 nF,
See Figure 21
25°C
1.8 V
2
2
pC
VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
1.8 V
19.5
19.5
pF
CCOM(OFF)
VCOM = V+ or GND,
Switch OFF,
See Figure 16
25°C
1.8 V
18.5
18.5
pF
NO
ON capacitance
CNO(ON)
VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
1.8 V
36.5
36.5
pF
COM
ON capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
1.8 V
36.5
36.5
pF
VI = V+ or GND,
See Figure 16
25°C
1.8 V
2
2
pF
Turn-on time
tON
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 17
Turn-off time
tOFF
VCOM = V+,
RL = 50 Ω,
CL = 35 pF,
See Figure 17
Charge injection
QC
VGEN = 0,
RGEN = 0,
NO
OFF capacitance
CNO(OFF)
COM
OFF capacitance
Digital input
capacitance
CI
10
20
10
ns
15.5
18.5
ns
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 18
25°C
1.8 V
150
150
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
See Figure 19
25°C
1.8 V
–62
–62
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to
20 kHz
See Figure 21
25°C
1.8 V
0.055
0.055
%
VI = V+ or GND,
Switch ON or
OFF
Supply
Positive supply
current
12
I+
25°C
Full
1.95 V
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0.01
0.15
0.001
0.01
0.6
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7.9 Typical Characteristics
3.5
1.4
3.0
1.2
TA = 85_C
1.0
V+ = 1.8 V
ron (Ω)
ron (Ω)
2.5
2.0
1.5
0.8
TA = −40_C
0.6
V+ = 2.5 V
1.0
V+ = 3.3 V
0.4
0.5
V+ = 5 V
0.2
0.0
0
TA = 25_C
0.0
0.5
1
1.5 2
2.5
3
3.5
4
4.5
0
5
0.5
1
VCOM (V)
1.0
2.5
3
14
0.9
TA = 85_C
12
Leakage Current (nA)
TA = 25_C
0.8
0.7
ron (Ω)
2
Figure 2. ron vs VCOM (V+ = 3 V)
Figure 1. ron vs VCOM
0.6
0.5
0.4
TA = −40_C
0.3
0.2
INO/NC(OFF)
10
0.1
8
ICOM(OFF)
6
INO/NC(ON)
4
ICOM(ON)
2
0
−60
0.0
0
0.5
1
1.5
2 2.5
3
VCOM (V)
3.5
4
4.5
−40
−20
0
5
20
40
60
80
100
TA (°C)
Figure 4. Leakage Current vs Temperature (V+ = 5.5 V)
Figure 3. ron vs VCOM (V+ = 5 V)
14
1.5
V+ = 3.3 V
1
12
tOFF
10
tON/tOFF (ns)
0.5
QC (pC)
1.5
VCOM (V)
V+ = 5 V
0
−0.5
−1
tON
8
6
4
2
−1.5
0
0
0.5
1
1.5
2 2.5 3
3.5
Bias Voltage (V)
4
4.5
Figure 5. Charge Injection (QC) vs VCOM
5
0
1
2
3
V+ (V)
4
5
6
Figure 6. tON and tOFF vs Supply Voltage
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Typical Characteristics (continued)
3.0
12
10
2.5
Logic Threshold (V)
tOFF
tON/tOFF (ns)
8
6
tON
4
2
2.0
VIH
1.5
VIL
1.0
0.5
0
−60
−40
−20
0
20
40
60
80
100
0.0
0
TA (°C)
1
−1
−10
−2
−20
Attenuation (dB)
Gain (dB)
0
−5
−6
4
5
6
Figure 8. Logic Threshold vs V+
0
−4
3
V+ (V)
Figure 7. tON and tOFF vs Temperature (V+ = 5 V)
−3
2
−30
−40
−50
−60
−70
−7
−80
−8
0.1
1
10
100
1000
−90
0.1
1
10
Frequency (MHz)
Frequency (MHz)
100
1000
Figure 10. OFF Isolation vs Frequency (V+ = 5 V)
Figure 9. Gain vs Frequency (V+ = 5 V)
0.009
60
V+ = 3.3 V
0.008
50
0.007
0.006
40
I+ (nA)
THD (%)
0.005
V+ = 5 V
0.004
0.003
30
20
0.002
10
0.001
0.000
0
10
100
1000
Frequency (Hz)
10000
100000
Figure 11. Total Harmonic Distortion vs Frequency
(V+ = 5 V)
14
0
−60
−40
−20
0
20
40
60
80
100
TA (°C)
Figure 12. Power-Supply Current vs Temperature
(V+ = 5 V)
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8 Parameter Measurement Information
V+
VNO NO
COM
+
VCOM
Channel ON
r on =
VI
ICOM
IN
VCOM – VNC
Ω
ICOM
VI = VIH or VIL
+
GND
Figure 13. ON-State Resistance (ron)
V+
VNO NO
COM
+
VCOM
+
VI
OFF-State Leakage Current
Channel OFF
VI = VIH or VIL
IN
+
GND
Figure 14. OFF-State Leakage Current (ICOM(OFF), INO(OFF), ICOM(PWROFF), INO(PWR(FF))
V+
VNO NO
COM
+
VI
VCOM
ON-State Leakage Current
Channel ON
VI = VIH or VIL
IN
+
GND
Figure 15. ON-State Leakage Current (ICOM(ON), INO(ON))
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Parameter Measurement Information (continued)
V+
VNO
NO
Capacitance
Meter
VBIAS = V+ or GND
VI = VIH or VIL
VCOM COM
VBIAS
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
IN
VI
GND
Figure 16. Capacitance (CI, CCOM(OFF), CCOM(ON), CNO(OFF), CNO(ON))
V+
VI
RL
CL
VCOM
tON
50 W
35 pF
V+
tOFF
50 W
35 pF
V+
VNO
NO
VCOM
TEST
COM
CL(2)
RL
IN
Logic
Input(1)
V+
Logic
Input
(VI)
GND
50%
50%
0
tON
Switch
Output
(VNC)
tOFF
90%
90%
(1)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
(2)
CL includes probe and jig capacitance.
Figure 17. Turn-On (tON) and Turn-Off Time (tOFF)
V+
Network Analyzer
50
VNO
NO
Channel ON: NO to COM
COM
VCOM
VI = V+ or GND
Source
Signal
Network Analyzer Setup
50
VI
+
IN
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
GND
DC Bias = 350 mV
Figure 18. Bandwidth (BW)
16
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Parameter Measurement Information (continued)
V+
Network Analyzer
Channel OFF: NO to COM
50
VNO NO
VI = V+ or GND
COM
Source
Signal
VCOM
50
Network Analyzer Setup
VI
50
Source Power = 0 dBm
(632-mV P-P at 50-Ω load)
IN
+
GND
DC Bias = 350 mV
Figure 19. OFF Isolation (OISO)
V+
RGEN
Logic
Input
(VI)
VIH
OFF
ON
OFF V
IL
NO
COM
+
VCOM
VCOM
DVCOM
VGEN
CL(1)
VI
VGEN = 0 to V+
IN
Logic
Input(2)
RGEN = 0
CL = 1 nF
QC = CL × DVCOM
VI = VIH or VIL
GND
(1)
CL includes probe and jig capacitance.
(2)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
Figure 20. Charge Injection (QC)
Channel ON: COM to NO
VSOURCE = V+ P-P
VI = VIH or VIL
RL = 600 W
fSOURCE = 20 Hz to 20 kHz
CL = 50 pF
V+/2
Audio Analyzer
NO
Source
Signal
COM
CL(1)
600
VI
IN
GND
600
−V+/2
(1)
CL includes probe and jig capacitance.
Figure 21. Total Harmonic Distortion (THD)
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9 Detailed Description
9.1 Overview
Table 1. Parameter Description
SYMBOL
DESCRIPTION
VCOM
Voltage at COM
VNO
Voltage at NO
ron
Resistance between COM and NO ports when the channel is ON
rpeak
Peak on-state resistance over a specified voltage range
ron(flat)
Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
INO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state under worst-case
input and output conditions
INO(PWROFF)
Leakage current measured at the NO port during the power-down condition, V+ = 0
ICOM(OFF)
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the OFF state under worstcase input and output conditions
ICOM(PWROFF)
Leakage current measured at the COM port during the power-down condition, V+ = 0
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output
(COM) open
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the ON state and the output
(NO) open
VIH
Minimum input voltage for logic high for the control input (IN)
VIL
Maximum input voltage for logic low for the control input (IN)
VI
Voltage at the control input (IN)
IIH, IIL
Leakage current measured at the control input (IN)
tON
Turn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.
tOFF
Turn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM)
output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input.
Charge injection, QC = CL × ΔVCOM, CL is the load capacitance, and ΔVCOM is the change in analog output voltage.
CNO(OFF)
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
CCOM(OFF)
Capacitance at the COM port when the corresponding channel (COM to NO) is OFF
CNO(ON)
Capacitance at the NO port when the corresponding channel (NO to COM) is ON
CCOM(ON)
Capacitance at the COM port when the corresponding channel (COM to NO) is ON
CI
Capacitance of control input (IN)
OISO
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific
frequency, with the corresponding channel (NO to COM) in the OFF state.
BW
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB below the DC gain.
THD
Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of root
mean square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental
harmonic.
I+
Static power-supply current with the control (IN) pin at V+ or GND
18
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9.2 Functional Block Diagram
1
2
SW
NO
COM
4
IN
9.3 Feature Description
Table 2. Summary Of Characteristics (1)
Single Pole
Single Throw
(SPST)
Configuration
Number of channels
1
0.9 Ω
ON-state resistance (ron)
0.15 Ω
ON-state resistance flatness (ron(flat))
Turn-on/turn-off time (tON/tOFF)
7.5 ns/12.5 ns
Charge injection (QC)
1 pC
Bandwidth (BW)
200 MHz
OFF isolation (OISO)
–64 dB at 1 MHz
Total harmonic distortion (THD)
0.005%
Leakage current (ICOM(OFF))
±4 nA
0.5 μA
Power-supply current (I+)
Package option
(1)
5-pin DSBGA, SOT-23, or SC-70
V+ = 5 V, TA = 25°C
9.4 Device Functional Modes
Table 3. Function Table
IN
NO TO COM,
COM TO NO
L
OFF
H
ON
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
SPST analog switch is a basic component that could be used in any electrical system design. The following are
some basic applications that utilize the TS5A3166, more detailed applications may be found in the Typical
Application section.
1. Gain-control circuit for amplifier
(a) Additional details are available in the Typical Application section.
2. Improve lock time of a PLL by changing the time constant
(a) Example Diagram:
To MCU
SPST
SW
PLL
Figure 22. Improved Lock Time Circuit Simplified Block Diagram
1. Improve power consumption for PLL
(a) Example Diagram:
MCU
Power Enable
PLL
SP5T
SW
Figure 23. PLL Improved Power Consumption Simplified Block Diagram
20
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10.2 Typical Application
-
VI
LMV321
VO
+
R1
1A
R2
2A
ron(1)
1B
ron(2)
2B
TS5A3166
R3
Figure 24. Gain-Control Circuit for OP Amplifier
10.2.1 Design Requirements
Place a switch in series with the input of the op amp. Since the op amp input impedance is very large, a switch
on ron(1) is irrelevant.
10.2.2 Detailed Design Procedure
By choosing values of R1 and R2, such that Rx >> ron(x), ron of TS5A3166 can be ignored. The gain of op amp
can be calculated as follow:
Vo / VI = 1+ R|| / R3
R|| = (R1+ron(1)) || (R2+ron(2))
(1)
(2)
10.2.3 Application Curves
3.5
1.4
3.0
1.2
TA = 85_C
1.0
V+ = 1.8 V
ron (Ω)
ron (Ω)
2.5
2.0
1.5
0.8
TA = −40_C
0.6
V+ = 2.5 V
1.0
V+ = 3.3 V
0.4
0.5
V+ = 5 V
0.2
0.0
0
TA = 25_C
0.0
0.5
1
1.5 2
2.5
3
3.5
4
4.5
5
0
VCOM (V)
0.5
1
1.5
VCOM (V)
2
2.5
3
Figure 26. ron vs VCOM (V+ = 3 V)
Figure 25. ron vs VCOM
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Typical Application (continued)
1.0
0.9
TA = 85_C
TA = 25_C
0.8
ron (Ω)
0.7
0.6
0.5
0.4
TA = −40_C
0.3
0.2
0.1
0.0
0
0.5
1
1.5
2 2.5
3
VCOM (V)
3.5
4
4.5
5
Figure 27. ron vs VCOM (V+ = 5 V)
11 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the
Recommended Operating Conditions.
Each Vcc terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1 μF bypass capacitor is recommended. If there are multiple Vcc terminals then a 0.01 μF or 0.022
μF capacitor is recommended for each power terminal. It is ok to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1 μF and 1 μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results
12 Layout
12.1 Layout Guidelines
Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Below figure shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
12.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 28. Trace Example
22
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SCDS357A – JULY 2014 – REVISED DECEMBER 2014
13 Device and Documentation Support
13.1 Trademarks
All trademarks are the property of their respective owners.
13.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
13.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS5A3166QDCKRQ1
ACTIVE
SC70
DCK
5
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
SIU
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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