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TS5A3357
SCDS177B – OCTOBER 2004 – REVISED AUGUST 2018
Single 5-Ω SP3T Analog Switch
5-V/3.3-V 3:1 Multiplexer/Demultiplexer
1 Features
3 Description
•
•
•
•
•
•
•
•
•
The TS5A3357 is a high-performance, 1-channel 3:1
analog switch that is designed to operate from 1.65 V
to 5.5 V. The device offers a low ON-state resistance
and low input/output capacitance and, thus, causes a
low signal distortion. The break-before-make feature
allows transferring of a signal from one port to
another, with a minimal signal distortion. This device
also offers a low charge injection which makes this
device suitable for high-performance audio and data
acquisition systems.
1
•
Specified Break-Before-Make Switching
Low ON-State Resistance
High Bandwidth
Control Inputs Are 5.5-V Tolerant
Low Charge Injection
Excellent ON-State Resistance Matching
Low Total Harmonic Distortion (THD)
1.65-V to 5.5-V Single-Supply Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
Device Information(1)
PART NUMBER
TS5A3357
PACKAGE
VSSOP (8)
BODY SIZE (NOM)
2.3 mm x 2 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
Cell Phones
PDAs
Portable Instrumentation
Logic Diagram
1
8
2
7
3
6
Logic
5
4
Control
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A3357
SCDS177B – OCTOBER 2004 – REVISED AUGUST 2018
www.ti.com
Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
8
9
1
1
1
2
3
4
5
Absolute Maximum Ratings ...................................... 5
ESD Ratings.............................................................. 5
Recommended Operating Conditions....................... 5
Thermal Information .................................................. 5
Electrical Characteristics for 5-V Supply .................. 6
Electrical Characteristics for 3.3-V Supply ............... 8
Electrical Characteristics for 2.5-V Supply ............. 10
Electrical Characteristics for 1.8-V Supply ............. 12
Typical Characteristics ............................................ 14
Parameter Measurement Information ................ 16
Detailed Description ............................................ 20
9.1 Overview ................................................................. 20
9.2 Functional Block Diagram ....................................... 20
9.3 Feature Description................................................. 20
9.4 Device Functional Modes........................................ 20
10 Application and Implementation........................ 21
10.1 Application Information.......................................... 21
10.2 Typical Application ............................................... 21
11 Power Supply Recommendations ..................... 22
12 Layout................................................................... 23
12.1 Layout Guidelines ................................................. 23
12.2 Layout Example .................................................... 23
13 Device and Documentation Support ................. 24
13.1
13.2
13.3
13.4
13.5
13.6
13.7
Device Support......................................................
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
24
24
24
24
24
24
24
14 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (December 2007) to Revision B
•
2
Page
Added Device Information table, ESD Ratings table, Recommended Operating Conditions table, Feature
Description section, Device Functional Modes, Application and Implementation section, Power Supply
Recommendations section, Layout section, Device and Documentation Support section, and Mechanical,
Packaging, and Orderable Information section ..................................................................................................................... 1
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SCDS177B – OCTOBER 2004 – REVISED AUGUST 2018
5 Device Comparison Table
Table 1. Summary of Characteristics (1)
Triple 3:1 Multiplexer/
Demultiplexer
(1 × SP3T)
Configuration
Number of channels
1
5Ω
ON-state resistance (ron)
ON-state resistance match (Δron)
0.1 Ω
ON-state resistance flatness (ron(flat))
6.5 Ω
Turn-on/turn-off time (tON/tOFF)
6.5 ns/3.7 ns
Break-before-make time (tBBM)
0.5 ns
Charge injection (QC)
3.4 pC
Bandwidth (BW)
334 MHz
OFF isolation (OISO)
–82 dB at 10 MHz
Crosstalk (XTALK)
–62 dB at 10 MHz
Total harmonic distortion (THD)
0.05%
Leakage current (ICOM(OFF))
±1 μA
(1)
V+ = 5 V, TA = 25°C
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SCDS177B – OCTOBER 2004 – REVISED AUGUST 2018
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6 Pin Configuration and Functions
DCU Package
VSSOP 8 Pin
Top View
NO0
1
8
V+
NO1
2
7
COM
NO2
3
6
IN1
GND
4
5
IN2
Not to scale
Pin Functions
PIN
NAME
DESCRIPTION
NO.
NO0
1
Normally open
NO1
2
Normally open
NO2
3
Normally open
GND
4
Digital ground
IN2
5
Digital control to connect COM to NO
IN1
6
Digital control to connect COM to NO
COM
7
Common
V+
8
Power supply
4
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SCDS177B – OCTOBER 2004 – REVISED AUGUST 2018
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
V+
Supply voltage range (2)
VNO
VCOM
Analog voltage range (2)
IK
Analog port diode current
INO
ICOM
On-state switch current
(3) (4)
VNO, VCOM < 0 or VNO, VCOM > V+
VNO, VCOM = 0 to V+
(2) (3)
VI
Digital input voltage range
IIK
Digital input clamp current
I+
Continuous current through V+
IGND
Continuous current through GND
Tstg
Storage temperature range
(1)
(2)
(3)
(4)
VI < 0
MIN
MAX
–0.5
6.5
UNIT
V
–0.5
V+ + 0.5
V
–50
50
mA
–100
100
mA
–0.5
6.5
V
–50
mA
100
mA
–100
100
mA
–65
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5 V maximum.
7.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
V+
Supply voltage range
1.65
5.5
VNO
VCOM
Analog voltage range
0
V+
VI
Digital input voltage range
0
5.5
UNIT
V
7.4 Thermal Information
TS5A3357
THERMAL METRIC (1)
DCU (VSSOP)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
206.5
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
78.7
°C/W
RθJB
Junction-to-board thermal resistance
85.3
°C/W
ψJT
Junction-to-top characterization parameter
7.3
°C/W
ψJB
Junction-to-board characterization parameter
84.8
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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SCDS177B – OCTOBER 2004 – REVISED AUGUST 2018
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7.5 Electrical Characteristics for 5-V Supply (1)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
Full
4.5 V
TYP
MAX
UNIT
Analog Switch
Peak ON resistance
rpeak
0 ≤ VNO ≤ V+,
ICOM = –30 mA,
Switch ON,
See Figure 13
VNO = 0,
ICOM = 30 mA
ON-state resistance
ron
VNO = 2.4 V,
ICOM = –30 mA
15
25°C
5
7
6
12
Full
Switch ON,
See Figure 13
VNO = 4.5 V,
ICOM = –30 mA
25°C
Full
Ω
7
4.5 V
12
25°C
7
Full
Ω
15
15
ON-state resistance
match between
channels
Δron
VNO = 3.15 V,
ICOM = –30 mA,
Switch ON,
See Figure 13
25°C
4.5 V
0.1
Ω
ON-state
resistance flatness
ron(flat)
0 ≤ VNO ≤ V+,
ICOM = –30 mA,
Switch ON,
See Figure 13
25°C
5V
6.5
Ω
NO
OFF leakage current
INO(OFF)
VNO = 0 to V+,
VCOM = V+ to 0
Switch OFF,
See Figure 14
25°C
COM
OFF leakage current
ICOM(OFF)
VCOM = 0 to V+,
VNO = V+ to 0,
Switch OFF,
See Figure 14
25°C
NO
ON leakage current
INO(ON)
VNO = 0 to V+,
VCOM = Open,
Switch ON,
See Figure 14
25°C
COM
ON leakage current
ICOM(ON)
VNO = Open,
VCOM = 0 to V+,
Switch ON,
See Figure 14
25°C
–0.1
0.1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
Full
V+ × 0.7
5.5
V
Full
0
V+ × 0.3
V
Full
Full
Full
Full
5.5 V
0
5.5 V
5.5 V
μA
μA
μA
μA
Digital Control Inputs (IN1, IN2) (2)
Input logic high
VIH
Input logic low
VIL
Input leakage
current
(1)
(2)
6
IIH, IIL
VI = 5.5 V or 0
25°C
Full
5.5 V
0.1
1
μA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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Electrical Characteristics for 5-V Supply(1) (continued)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Dynamic
Turn-on time
tON
VNO = V+ or GND, CL = 50 pF,
RL = 500 Ω,
See Figure 16
25°C
5V
1.5
6.5
Full
4.5 V to 5.5 V
1.5
7
Turn-off time
tOFF
VNO = V+ or GND, CL = 50 pF,
RL = 500 Ω,
See Figure 16
25°C
5V
0.8
3.7
Full
4.5 V to 5.5 V
0.8
7
Break-beforemake time
tBBM
VNO = V+,
RL = 50 Ω,
CL = 50 pF,
See Figure 17
25°C
5V
0.5
Full
4.5 V to 5.5 V
0.5
VGEN = 0,
CL = 0.1 nF,
See Figure 21
25°C
5V
3.4
pC
Charge
injection
QC
ns
ns
ns
NO
OFF capacitance
CNO(OFF)
VNO = V+ or GND,
See Figure 15
Switch OFF,
25°C
5V
4.5
pF
COM
OFF capacitance
CCOM(OFF)
VNO = V+ or GND,
See Figure 15
Switch OFF,
25°C
5V
10.5
pF
NO
ON capacitance
CNO(ON)
VNO = V+ or GND,
See Figure 15
Switch ON,
25°C
5V
17
pF
COM
ON capacitance
CCOM(ON)
VCOM = V+ or
GND,
Switch ON,
See Figure 15
25°C
5V
17
pF
VI = V+ or GND,
See Figure 15
25°C
5V
3
pF
Digital input
capacitance
CI
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 18
25°C 4.5 V to 5.5 V
334
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
See Figure 19
25°C 4.5 V to 5.5 V
–82
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 10 MHz,
Switch ON,
See Figure 20
25°C 4.5 V to 5.5 V
–62
dB
VI = V+ or GND,
Switch ON or
OFF
Supply
Positive supply
current
I+
25°C
Full
5.5 V
1
10
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7.6 Electrical Characteristics for 3.3-V Supply (1)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
Full
3V
MIN
TYP
MAX UNIT
Analog Switch
Peak ON resistance
rpeak
0 ≤ VNO ≤ V+,
ICOM = –24 mA,
VNO = 0 V,
ICOM = 24 mA
ON-state resistance
ron
VNO = 3 V,
ICOM = –24 mA
Switch ON,
See Figure 13
25
25°C
Switch ON,
See Figure 13
Full
25°C
6.5
9
9
20
9
3V
Full
Ω
Ω
20
ON-state resistance
match between
channels
Δron
VNO = 2.1 V,
ICOM = –24 mA,
Switch ON,
See Figure 13
25°C
3V
0.1
Ω
ON-state
resistance flatness
ron(flat)
0 ≤ VNO ≤ V+,
ICOM = –24 mA,
Switch ON,
See Figure 13
25°C
3.3 V
13.5
Ω
NO
OFF leakage current
INO(OFF)
VNO = 0 to V+,
VCOM = V+ to 0
Switch OFF,
See Figure 14
25°C
COM
OFF leakage current
ICOM(OFF)
VCOM = 0 to V+,
VNO = V+ to 0,
Switch OFF,
See Figure 14
25°C
NO
ON leakage current
INO(ON)
VNO = 0 to V+,
VCOM = V+ to 0,
Switch ON,
See Figure 14
25°C
COM
ON leakage current
ICOM(ON)
VNO = Open,
VCOM = 0 to V+,
Switch ON,
See Figure 14
25°C
Full
Full
Full
Full
3.6 V
3.6 V
3.6 V
3.6 V
–0.1
0.1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
μA
μA
μA
μA
Digital Control Inputs (IN1, IN2) (2)
Input logic high
VIH
Full
V+ × 0.7
5.5
V
Input logic low
VIL
Full
0
V+ × 0.3
V
25°C
–1
0.1
Input leakage
current
(1)
(2)
8
IIH, IIL
VI = 5.5 V or 0
Full
3.6 V
1
μA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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Electrical Characteristics for 3.3-V Supply(1) (continued)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX UNIT
25°C
3.3 V
2
9.5
Full
3 V to 3.6 V
2
11
25°C
3.3 V
1.3
5.1
Full
3 V to 3.6 V
1.5
5.5
Dynamic
Turn-on time
tON
VNO = V+ or
GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 16
Turn-off time
tOFF
VNO = V+ or
GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 16
Break-beforemake time
tBBM
VNO = V+,
RL = 50 Ω,
CL = 50 pF,
See Figure 17
25°C
3.3 V
0.5
Full
3 V to 3.6 V
0.5
Charge
injection
QC
VGEN = 0,
CL = 0.1 nF,
See Figure 21
25°C
3.3 V
1.75
pC
CNO(OFF)
VNO = V+ or
GND,
Switch OFF,
See Figure 15
25°C
3.3 V
4.5
pF
VNO = V+ or
CCOM(OFF) GND,
Switch OFF,
See Figure 15
25°C
3.3 V
10.5
pF
VNO = V+ or
GND,
Switch ON,
See Figure 15
25°C
3.3 V
17
pF
VCOM = V+ or
GND,
Switch ON,
See Figure 15
25°C
3.3 V
17
pF
VI = V+ or GND,
See Figure 15
25°C
3.3 V
3
pF
NO
OFF capacitance
COM
OFF capacitance
NO
ON capacitance
CNO(ON)
COM
ON capacitance
CCOM(ON)
Digital input
capacitance
CI
ns
ns
ns
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 18
25°C
3 V to 3.6 V
327
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
See Figure 19
25°C
3 V to 3.6 V
–82
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 10 MHz,
Switch ON,
See Figure 20
25°C
3 V to 3.6 V
–62
dB
VI = V+ or GND,
Switch ON or OFF
Supply
Positive supply
current
I+
25°C
Full
3.6 V
1
10
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7.7 Electrical Characteristics for 2.5-V Supply (1)
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX UNIT
Analog Switch
Analog signal
range
Peak ON
resistance
ON-state
resistance
ON-state
resistance
match between
channels
VCOM, VNO
rpeak
0
0 ≤ VNO ≤ V+,
ICOM = –8 mA,
VNO = 0 V,
ICOM = 8 mA
ron
VNO = 2.3 V,
ICOM = –8 mA
Switch ON,
See Figure 13
Full
2.3 V
25°C
Switch ON,
See Figure 13
Full
25°C
8
V+
V
50
Ω
12
12
2.3 V
11
Full
30
Ω
30
Δron
VNO = 1.8 V,
ICOM = –8 mA,
Switch ON,
See Figure 13
25°C
2.3 V
0.3
Ω
ron(flat)
0 ≤ VNO ≤ V+,
ICOM = –8 mA,
Switch ON,
See Figure 13
25°C
2.5 V
39
Ω
NO
OFF leakage
current
INO(OFF)
VNO = 0 to V+,
VCOM = V+ to 0
Switch OFF,
See Figure 14
COM
OFF leakage
current
ICOM(OFF)
VCOM = 0 to V+,
VNO = V+ to 0,
Switch OFF,
See Figure 14
NO
ON leakage
current
INO(ON)
VNO = 0 to V+,
VCOM = V+ to 0,
Switch ON,
See Figure 14
COM
ON leakage
current
ICOM(ON)
VNO = Open,
VCOM = 0 to V+,
Switch ON,
See Figure 14
ON-state
resistance flatness
25°C
–0.1
0.1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
Full
V+ × 0.75
5.5
V
Full
0
V+ × 0.25
V
Full
2.7 V
25°C
Full
2.7 V
25°C
Full
2.7 V
25°C
Full
2.7 V
μA
μA
μA
μA
Digital Control Inputs (IN1, IN2) (2)
Input logic high
VIH
Input logic low
VIL
Input leakage
current
(1)
(2)
10
IIH, IIL
VI = 5.5 V or 0
25°C
Full
2.7 V
0.1
1
μA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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Electrical Characteristics for 2.5-V Supply(1) (continued)
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX UNIT
25°C
2.5 V
3
15
Full
2.3 V to 2.7 V
3
16.5
25°C
2.5 V
2
7.2
Full
2.3 V to 2.7 V
2
7.8
Dynamic
Turn-on time
tON
VNO = V+ or
GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 16
Turn-off time
tOFF
VNO = V+ or
GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 16
Break-beforemake time
tBBM
VNO = V+,
RL = 50 Ω,
CL = 50 pF,
See Figure 17
25°C
2.5 V
0.5
Full
2.3 V to 2.7 V
0.5
Charge
injection
QC
VGEN = 0,
CL = 0.1 nF,
See Figure 21
25°C
2.5 V
1.15
pC
CNO(OFF)
VNO = V+ or
GND,
Switch OFF,
See Figure 15
25°C
2.5 V
4.5
pF
VNO = V+ or
CCOM(OFF) GND,
Switch OFF,
See Figure 15
25°C
2.5 V
10.5
pF
VNO = V+ or
GND,
Switch ON,
See Figure 15
25°C
2.5 V
17
pF
VCOM = V+ or
GND,
Switch ON,
See Figure 15
25°C
2.5 V
17
pF
VI = V+ or GND,
See Figure 15
25°C
2.5 V
3
pF
NO
OFF capacitance
COM
OFF capacitance
NO
ON capacitance
CNO(ON)
COM
ON capacitance
CCOM(ON)
Digital input
capacitance
CI
ns
ns
ns
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 18
25°C
2.3 V to 2.7 V
320
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
See Figure 19
25°C
2.3 V to 2.7 V
–81
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 10 MHz,
Switch ON,
See Figure 20
25°C
2.3 V to 2.7 V
–61
dB
VI = V+ or GND,
Switch ON or
OFF
Supply
Positive supply
current
I+
25°C
Full
2.7 V
1
10
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7.8 Electrical Characteristics for 1.8-V Supply (1)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX UNIT
Analog Switch
Analog signal
range
Peak ON
resistance
ON-state
resistance
ON-state
resistance
match between
channels
VCOM, VNO
rpeak
0
0 ≤ VNO ≤ V+,
ICOM = –4 mA,
VNO = 0 V,
ICOM = 4 mA
ron
VNO = 1.8 V,
ICOM = –4 mA
Switch ON,
See Figure 13
Full
1.65 V
25°C
Switch ON,
See Figure 13
Full
25°C
10
V+
V
150
Ω
20
20
1.65 V
17
Full
50
Ω
50
Δron
VNO = 1.15 V,
ICOM = –4 mA,
Switch ON,
See Figure 13
25°C
1.65 V
0.3
Ω
ron(flat)
0 ≤ VNO ≤ V+,
ICOM = –4 mA,
Switch ON,
See Figure 13
25°C
1.8 V
140
Ω
NO
OFF leakage
current
INO(OFF)
VNO = 0 to V+,
VCOM = V+ to 0
Switch OFF,
See Figure 14
COM
OFF leakage
current
ICOM(OFF)
VCOM = 0 to V+,
VNO = V+ to 0,
Switch OFF,
See Figure 14
NO
ON leakage
current
INO(ON)
VNO = 0 to V+,
VCOM = V+ to 0,
Switch ON,
See Figure 14
COM
ON leakage
current
ICOM(ON)
VNO = Open,
VCOM = 0 to V+,
Switch ON,
See Figure 14
ON-state
resistance flatness
25°C
–0.1
0.1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
–0.1
0.1
–1
1
Full
V+ × 0.75
5.5
V
Full
0
V+ × 0.25
V
Full
1.95 V
25°C
Full
1.95 V
25°C
Full
1.95 V
25°C
Full
1.95 V
μA
μA
μA
μA
Digital Control Inputs (IN1, IN2) (2)
Input logic high
VIH
Input logic low
VIL
Input leakage
current
(1)
(2)
12
IIH, IIL
VI = 5.5 V or 0
25°C
Full
1.95 V
0.1
1
μA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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Electrical Characteristics for 1.8-V Supply(1) (continued)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX UNIT
Dynamic
Turn-on time
tON
VNO = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 16
Turn-off time
tOFF
VNO = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 16
Break-beforemake time
tBBM
VNO = V+,
RL = 50 Ω,
CL = 50 pF,
See Figure 17
VGEN = 0,
CL = 0.1 nF,
Charge
injection
QC
25°C
1.8 V
5
32
Full
1.65 V to
1.95 V
5
34
25°C
1.8 V
3
14
Full
1.65 V to
1.95 V
3
14.5
ns
ns
25°C
1.8 V
0.5
Full
1.65 V to
1.95 V
0.5
See Figure 21
25°C
1.8 V
0.3
pC
ns
NO
OFF capacitance
CNO(OFF)
VNO = V+ or GND,
Switch OFF,
See Figure 15
25°C
1.8 V
4.5
pF
COM
OFF capacitance
CCOM(OFF)
VNO = V+ or GND,
Switch OFF,
See Figure 15
25°C
1.8 V
10.5
pF
NO
ON capacitance
CNO(ON)
VNO = V+ or GND,
Switch ON,
See Figure 15
25°C
1.8 V
17
pF
COM
ON capacitance
CCOM(ON)
VCOM = V+ or GND,
See Figure 15
Switch ON,
25°C
1.8 V
17
pF
VI = V+ or GND,
See Figure 15
25°C
1.8 V
3
pF
Digital input
capacitance
CI
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 18
25°C
1.65 V to
1.95 V
341
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
See Figure 19
25°C
1.65 V to
1.95 V
–81
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 10 MHz,
Switch ON,
See Figure 20
25°C
1.65 V to
1.95 V
–61
dB
VI = V+ or GND,
Switch ON or
OFF
Supply
Positive supply
current
I+
25°C
Full
1.95 V
1
10
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7.9 Typical Characteristics
°C
°C
Ω
Ω
°C
°C
Figure 1. ron vs VCOM
Figure 2. ron vs VCOM (V+ = 3 V)
°C
Ω
°C
14
°C
Figure 3. ron vs VCOM (V+ = 4.5 V)
Figure 4. Leakage Current vs Temperature (V+ = 5.5 V)
Figure 5. Charge Injection (QC) vs VCOM
Figure 6. tON and tOFF vs V+
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Typical Characteristics (continued)
°C
Figure 7. tON and tOFF vs Temperature (V+ = 5 V)
Figure 8. Logic-Level Threshold vs V+
Figure 9. Frequency Response (V+ = 3 V)
Figure 10. OFF Isolation and Crosstalk vs Frequency
(V+ = 3 V)
Figure 11. Total Harmonic Distortion vs Frequency
(V+ = 5 V)
Figure 12. Power-Supply Current vs Temperature
(V+ = 5 V)
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8 Parameter Measurement Information
Ω
Figure 13. ON-State Resistance (ron)
OFF-State Leakage Current
ON-State Leakage Current
Figure 14. ON- and OFF-State Leakage Current (ICOM(ON), ICOM(OFF), INO(ON), INO(OFF))
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
Figure 15. Capacitance (CI, CCOM(ON), CNO(OFF), CCOM(OFF), CNO(ON))
16
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Parameter Measurement Information (continued)
x
VOH
x
Ω
Ω
VOH + 0.3 V
x
VOL
x
V
VOH – 0.3 V OH
Ω
Ω
A.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
B.
CL includes probe and jig capacitance.
Figure 16. Turn-On (tON) and Turn-Off Time (tOFF)
tr = < 2.5 ns
tf = < 2.5 ns
VOH
Ω
A.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
B.
CL includes probe and jig capacitance.
Figure 17. Break-Before-Make Time (tBBM)
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Parameter Measurement Information (continued)
Ω
Channel ON: NO0 to COM
Network Analyzer Setup
Ω
Source Power = 0 dBM
DC Bias = 350 mV
Figure 18. Bandwidth (BW)
Channel OFF: NO0 to COM
Ω
Ω
Network Analyzer Setup
Source Power = 0 dBM
DC Bias = 350 mV
Ω
Figure 19. OFF Isolation (OISO)
Channel OFF: NO0 to COM
Channel ON: NO0–NO1 to
COM
Ω
Network Analyzer Setup
Ω
Source Power = 0 dBM
DC Bias = 350 mV
Figure 20. Crosstalk (XTALK)
18
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Parameter Measurement Information (continued)
Δ
xΔ
A.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
B.
CL includes probe and jig capacitance.
Figure 21. Charge Injection (QC)
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9 Detailed Description
9.1 Overview
The TS5A3357 is a bidirectional, single-channel, 3:1 analog switch that is designed to operate from 1.65 V to 5.5
V. This device provides a signal switching solution while maintaining excellent signal integrity, which makes the
TS5A3357 suitable for a wide range of applications in various markets including personal electronics, portable
instrumentation, and test and measurement equipment. The device maintains the signal integrity by its low ONstate resistance, excellent ON-state resistance matching, and total harmonic distortion (THD) performance. To
prevent signal distortion during the transferring of a signal from one channel to another, the TS5A3357 device
also has a specified break-before-make feature.
9.2 Functional Block Diagram
1
8
2
7
3
6
Logic
5
4
Control
9.3 Feature Description
Break-before-make
Break-before-make is a safety feature that prevents two inputs from connecting when the TS5A3357 is switching.
The TS5A3357 COM pin first breaks from the on-state switch before making the connection with the next onstate switch. The time delay between the break and the make is known as a break-before-make delay tBBM.
9.4 Device Functional Modes
The digital control pins IN1 and IN2 determine the state of the connection between the COM and NO pins based
on the truth table below.
Table 2. Function Table
20
IN1
IN2
COM TO NO0
COM TO NO1
COM TO NO2
L
L
OFF
OFF
OFF
H
L
ON
OFF
OFF
L
H
OFF
ON
OFF
H
H
OFF
OFF
ON
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10 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
10.2 Typical Application
The TS5A3357 switch is bidirectional, so the NO and COM pins can be used as either inputs or outputs. This
switch is typically used when there is only one signal path that needs to be able to communicate to 3 different
signal paths.
3.3 V
0.1 PF
0.1 PF
System
Controller
Switch
Control
Logic
Signal
Path
VCC
TSA3357
NO0
Device 1
NO1
Device 2
NO2
Device 3
IN1
IN2
COM
GND
Figure 22. Typical Application Schematic
10.2.1 Design Requirements
The TS5A3357 device can be properly operated without any external components. However, TI recommends
connecting unused pins to ground through a 50-Ω resistor to prevent signal reflections back into the device. TI
also recommends pulling up the digital control pins (IN1 and IN2) to VCC or pulling down to GND to avoid
undesired switch positions that could result from the floating pin.
10.2.2 Detailed Design Procedure
Select the appropriate supply voltage to cover the entire voltage swing of the signal passing through the switch
because the TS5A3357 input and output signal swing through NO and COM are dependent on the supply
voltage V+. For example, if the desired signal level to pass through the switch is 5 V, VCC must be greater than
or equal to 5 V. V+ = 3.3 V would not be valid for passing a 5-V signal since the Analog signal voltage cannot
exceed the supply.
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Typical Application (continued)
10.2.3 Application Curves
Ω
°C
Figure 23. ron vs VCOM
11 Power Supply Recommendations
TI recommends proper power-supply sequencing for all CMOS devices. Do not exceed the absolute maximum
ratings, because stresses beyond the listed ratings can cause permanent damage to the device. Always
sequence V+ on first, followed by NO or COM. Although it is not required, power-supply bypassing improves
noise margin and prevents switching noise propagation from the V+ supply to other components. A 0.1-μF
capacitor, connected from VCC to GND, is adequate for most applications.
22
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12 Layout
12.1 Layout Guidelines
TI recommends following common printed-circuit board layout guidelines to ensure reliability of the device.
Bypass capacitors should be used on power supplies. Short trace lengths should be used to avoid excessive
loading.
12.2 Layout Example
V+
= VIA to GND Plane
0603 Cap
To Device 1
NO0
VCC
To System
To Device 2
NO1
COM
To System Controller
To Device 3
NO2
IN1
To System Controller
GND
IN2
Figure 24. Example Layout
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13 Device and Documentation Support
13.1 Device Support
13.2 Documentation Support
13.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
13.4 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.5 Trademarks
E2E is a trademark of Texas Instruments.
13.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
24
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PACKAGE OPTION ADDENDUM
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10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS5A3357DCUR
ACTIVE
VSSOP
DCU
8
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(JA9Q, JA9R)
TS5A3357DCURG4
ACTIVE
VSSOP
DCU
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
JA9R
TS5A3357DCUT
ACTIVE
VSSOP
DCU
8
250
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(JA9Q, JA9R)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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