TS5A3359
SCDS214F – OCTOBER 2005 – REVISED DECEMBER 2021
TS5A3359 1-Ω SP3T Bidirectional Analog Switch
5-V/3.3-V Single-Channel 3:1 Multiplexer and Demultiplexer
1 Features
3 Description
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The TS5A3359 device is a bidirectional, single
channel, single-pole triple-throw (SP3T) analog switch
that is designed to operate from 1.65 V to 5.5 V.
This device provides a signal switching solution while
maintaining excellent signal integrity, which makes the
TS5A3359 suitable for a wide range of applications
in various markets including personal electronics,
test and measurement equipment, and portable
instrumentation. The device maintains the signal
integrity by its low ON-state resistance, excellent
ON-state resistance matching, and total harmonic
distortion (THD) performance. To prevent signal
distortion during the transferring of a signal from one
channel to another, the TS5A3359 device also has
a specified break-before-make feature. The device
consumes very low power and provides isolation
when VCC = 0.
•
Isolation in power-down mode, VCC = 0
Specified break-before-make switching
Low ON-state resistance (1 Ω)
Control inputs are 5.5 V tolerant
Low charge injection (5 pC VCC = 1.8 V)
Excellent ON-state resistance matching
Low total harmonic distortion (THD)
1.65 V to 5.5 V single-supply operation
Latch-up performance exceeds 100 mA per JESD
78, Class II
ESD performance tested per JESD 22
– 2000-V human-body model
(A114-B, Class II)
– 1000-V charged-device model (C101)
2 Applications
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•
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•
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Cell phones
PDAs
Portable instrumentation
Audio and video signal routing
Low-voltage data acquisition systems
Communication circuits
Modems
Hard drives
Computer peripherals
Wireless terminals and peripherals
Device Information(1)
PART NUMBER
TS5A3359
(1)
PACKAGE
BODY SIZE (NOM)
US8 (8)
2.30 mm × 2.00 mm
DSBGA (8)
1.25 mm × 2.25 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
SP3T
NO0
NO1
COM
NO2
IN1
IN2
Logic
Control
Simplified Schematic
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A3359
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SCDS214F – OCTOBER 2005 – REVISED DECEMBER 2021
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics for 5-V Supply.....................5
6.6 Electrical Characteristics for 3.3-V Supply..................7
6.7 Electrical Characteristics for 2.5-V Supply..................9
6.8 Electrical Characteristics for 1.8-V Supply................ 11
6.9 Typical Characteristics.............................................. 13
7 Parameter Measurement Information.......................... 16
8 Detailed Description......................................................22
8.1 Overview................................................................... 22
8.2 Functional Block Diagram......................................... 22
8.3 Feature Description...................................................22
8.4 Device Functional Modes..........................................22
9 Application and Implementation.................................. 23
9.1 Application Information............................................. 23
9.2 Typical Application.................................................... 23
10 Power Supply Recommendations..............................24
11 Layout........................................................................... 25
11.1 Layout Guidelines................................................... 25
11.2 Layout Example...................................................... 25
12 Device and Documentation Support..........................26
12.1 Receiving Notification of Documentation Updates..26
12.2 Support Resources................................................. 26
12.3 Trademarks............................................................. 26
12.4 Electrostatic Discharge Caution..............................26
12.5 Glossary..................................................................26
13 Mechanical, Packaging, and Orderable
Information.................................................................... 26
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (January 2016) to Revision F (December 2021)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Updated the body size for the DSBGA (8) package in the Device Information table..........................................1
Changes from Revision D (May 2015) to Revision E (January 2016)
Page
• Added TJ Junction Temperature to the Absolute Maximum Ratings ................................................................. 4
• Changed Input leakage current UNIT value From: µA To: nA in Electrical Characteristics for 5-V Supply ....... 5
Changes from Revision C (June 2008) to Revision D (May 2015)
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................. 1
• Changed YZP pinout numbering........................................................................................................................ 3
2
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SCDS214F – OCTOBER 2005 – REVISED DECEMBER 2021
5 Pin Configuration and Functions
D1
D2
C1
C2
B1
B2
A1
A2
VCC
VCC
Figure 5-1. YZP Package 8-Pin DSBGA Bottom
View
Figure 5-2. DCU Package 8-Pin US8 Top View
Table 5-1. Pin Functions
PIN
NAME
TYPE(1)
DESCRIPTION
DCU
YZP
NO0
1
A1
I/O
Normally open
NO1
2
B1
I/O
Normally open
NO2
3
C1
I/O
Normally open
GND
4
D1
—
Ground
IN2
5
D2
I
Digital control to connect COM to NO
IN1
6
C2
I
Digital control to connect COM to NO
COM
7
B2
I/O
Common
VCC
8
A2
—
Power supply
(1)
I = input, O = output.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
MAX
UNIT
VCC
Supply voltage(3)
–0.5
6.5
V
VNO
VCOM
Analog voltage(3) (4) (5)
–0.5
VCC + 0.5
V
IK
Analog port diode current
VNO, VCOM < 0
INO
ICOM
On-state switch current
VNO, VCOM = 0 to VCC
VI
Digital input voltage(3) (4)
IIK
Digital input clamp current
ICC
Continuous current through VCC
100
mA
IGND
Continuous current through GND
–100
100
mA
Tstg
Storage temperature
–65
150
°C
TJ
Junction temperature
150
°C
(1)
(2)
(3)
(4)
(5)
–50
mA
–200
200
–400
400
–0.5
6.5
VI < 0
mA
V
–50
mA
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
This value is limited to 5.5-V maximum.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
±2000
Charged device model (CDM), per JEDEC specification JESD22-C101, all
pins(2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC
4
VNO
VCOM
Analog voltage
VI
Digital input voltage
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MIN
MAX
1.65
5.5
UNIT
V
0
VCC
V
0
VCC
V
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SCDS214F – OCTOBER 2005 – REVISED DECEMBER 2021
6.4 Thermal Information
TS5A3359
THERMAL
METRIC(1)
DCU (US8)
YZP (DSBGA)
8 PINS
8 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
204.2
105.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
76.2
1.6
°C/W
RθJB
Junction-to-board thermal resistance
82.9
10.8
°C/W
ψJT
Junction-to-top characterization parameter
7.6
3.1
°C/W
ψJB
Junction-to-board characterization parameter
82.5
10.8
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.5 Electrical Characteristics for 5-V Supply
VCC = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX
UNIT
VCC
V
ANALOG SWITCH
Analog signal
range
VCOM, VNO
Peak ON
resistance
rpeak
0 ≤ (VNO) ≤ VCC,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
25°C
ON-state
resistance
ron
VNO = 2.5 V,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
25°C
VNO = 2.5 V,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
0 ≤ (VNO) ≤ VCC,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
VNO = 1 V, 1.5 V, 2.5
V,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
INO(OFF)
VNO = 1 V or 4.5 V,
VCOM = 1 V to 4.5 V,
Switch OFF,
See Figure 7-2
25°C
INO(PWROFF)
VNO = 0 to 5.5 V,
VCOM = 5.5 V to 0,
Switch OFF,
See Figure 7-2
25°C
INO(ON)
VNO = 1 V or 4.5 V,
VCOM = Open,
Switch ON,
See Figure 7-2
ICOM(OFF)
VNO = 4.5 V or 1 V,
VCOM = 1 V or 4.5 V,
Switch OFF,
See Figure 7-2
25°C
ICOM(PWROFF)
VCOM = 0 to 5.5 V,
VNO = 5.5 V to 0,
Switch OFF,
See Figure 7-2
25°C
ICOM(ON)
VNO = Open,
VCOM = 1 V or 4.5 V,
Switch ON,
See Figure 7-2
ON-state
resistance
Δron
match between
channels
ON-state
resistance
flatness
NO
OFF leakage
current
NO
ON leakage
current
COM
OFF leakage
current
COM
ON leakage
current
ron(flat)
0
Full
Full
0.8
4.5 V
1.5
0.7
4.5 V
0.1
4.5 V
Full
4.5 V
Full
Full
5.5 V
0V
0.1
–20
5.5 V
0V
–1
0.25
0.8
5
Ω
8
25
250
0.1
–50
8
50
5
nA
μA
30
220
–250
–8
1
25
–220
–25
20
150
–25
–30
5.5 V
5
–150
–30
5.5 V
25°C
Full
Ω
0.25
25°C
Full
Ω
0.15
Full
Full
Ω
0.1
0.1
25°C
25°C
0.9
1.1
25°C
Full
1.1
nA
nA
μA
30
–220
220
nA
DIGITAL CONTROL INPUTS (IN1, IN2)(2)
Input logic high VIH
Full
2.4
5.5
V
Input logic low
VIL
Full
0
0.8
V
Input leakage
current
IIH, IIL
VI = 5.5 V or 0
25°C
Full
5.5 V
–2
2
–20
20
nA
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6.5 Electrical Characteristics for 5-V Supply (continued)
VCC = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
2.5
MAX
UNIT
DYNAMIC
Turnon time
tON
VCOM = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-5
25°C
5V
1
Full
4.5 V to 5.5 V
1
Turnoff time
tOFF
VCOM = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-5
25°C
5V
1
Full
4.5 V to 5.5 V
1
Break-beforemake time
tBBM
VNO = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-6
25°C
5V
0.5
Full
4.5 V to 5.5 V
0.5
Charge
injection
QC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 7-10
25°C
5V
20
pC
NO
OFF
capacitance
CNO(OFF)
VNO = VCC or GND,
Switch OFF,
See Figure 7-4
25°C
5V
18
pF
COM
OFF
capacitance
CCOM(OFF)
VCOM = VCC or GND,
Switch OFF,
See Figure 7-4
25°C
2.5 V
54
pF
NO
ON
capacitance
CNO(ON)
VNO = VCC or GND,
Switch ON,
See Figure 7-4
25°C
5V
78
pF
COM
ON
capacitance
CCOM(ON)
VCOM = VCCor GND,
Switch ON,
See Figure 7-4
25°C
5V
78
pF
Digital input
capacitance
CI
VI = VCC or GND,
See Figure 7-4
25°C
5V
2.5
pF
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 7-7
25°C
5V
75
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 1 MHz ,
Switch OFF,
See Figure 7-8
25°C
5V
–64
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 1 MHz ,
Switch ON,
See Figure 7-9
25°C
5V
–64
dB
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 7-11
25°C
5V
0.005%
VI = VCC or GND,
Switch ON or OFF
Total harmonic
THD
distortion
21
23.5
6
10.5
12
8.5
18
23
ns
ns
ns
SUPPLY
Positive supply
ICC
current
(1)
(2)
6
25°C
Full
5.5 V
16
50
1200
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs (SCBA004).
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6.6 Electrical Characteristics for 3.3-V Supply
VCC = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX UNIT
ANALOG SWITCH
Analog signal
range
VCOM, VNO
Peak ON
resistance
rpeak
0 ≤ (VNO) ≤ VCC,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
25°C
ON-state
resistance
ron
VNO = 2 V,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
25°C
ON-state
resistance
match
between
channels
ON-state
resistance
flatness
NO
OFF leakage
current
NO
ON leakage
current
COM
OFF leakage
current
COM
ON leakage
current
0
Full
Full
1.3
3V
VNO = 2 V, 0.8 V,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
0 ≤ (VNO) ≤ VCC,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
VNO = 2 V, 0.8 V,
ICOM = –100 mA,
Switch ON,
See Figure 7-1
25°C
INO(OFF)
VNO = 1 V or 3 V,
VCOM = 1 V to 3 V,
Switch OFF,
See Figure 7-2
25°C
INO(PWROFF)
VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,
Switch OFF,
See Figure 7-2
25°C
INO(ON)
VNO = 1 V or 3 V,
VCOM = Open,
Switch ON,
See Figure 7-2
ICOM(OFF)
VNO = 0 V to 3.6 V,
VCOM = 1 V or
VNO = 3.6 V to 0,
VCOM = 3 V,
Switch OFF,
See Figure 7-2
ICOM(PWROFF)
VCOM = 0 to 3.6 V,
VNO = 3.6 V to 0,
Switch OFF,
See Figure 7-2
ICOM(ON)
VNO = Open,
VCOM = 1 V or 3 V,
Switch ON,
See Figure 7-2
ron(flat)
Full
1.2
3V
0.1
3V
3V
25°C
Full
3.6 V
0V
0.2
–15
0.35
–1
0V
1
10
3
Ω
Ω
3
0.2
1
20
4
μA
nA
15
75
–20
nA
15
40
–75
–15
3.6 V
0.2
–40
–1
15
30
–10
–15
3.6 V
3
–30
–15
3.6 V
25°C
Full
Ω
0.35
25°C
Full
Ω
0.2
25°C
Full
V
0.15
0.15
Full
Full
1.6
1.8
25°C
Full
1.6
2
25°C
Δron
VCC
nA
μA
15
–40
40
nA
DIGITAL CONTROL INPUTS (IN1, IN2)(2)
Input logic high VIH
Full
2
5.5
V
Input logic low VIL
Full
0
0.8
V
Input leakage
current
IIH, IIL
VI = 5.5 V or 0
25°C
Full
3.6 V
–2
2
–20
20
nA
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6.6 Electrical Characteristics for 3.3-V Supply (continued)
VCC = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
16
MAX UNIT
DYNAMIC
Turnon time
tON
VCOM = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-5
25°C
3.3 V
1
Full
3 V to 3.6 V
1
Turnoff time
tOFF
VCOM = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-5
25°C
3.3 V
1
Full
3 V to 3.6 V
1
Break-beforemake time
tBBM
VNO = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-6
25°C
3.3 V
0.5
Full
3 V to 3.6 V
0.5
Charge
injection
QC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 7-10
25°C
3.3 V
12
pC
NO
OFF
capacitance
CNO(OFF)
VNO = VCC or GND,
Switch OFF,
See Figure 7-4
25°C
3.3 V
18
pF
COM
OFF
capacitance
CCOM(OFF)
VCOM = VCC or GND,
Switch OFF,
See Figure 7-4
25°C
3.3 V
55
pF
NO
ON
capacitance
CNO(ON)
VNO = VCC or GND,
Switch ON,
See Figure 7-4
25°C
3.3 V
78
pF
COM
ON
capacitance
CCOM(ON)
VCOM = VCC or GND,
Switch ON,
See Figure 7-4
25°C
3.3 V
78
pF
Digital input
capacitance
CI
VI = VCC or GND,
See Figure 7-4
25°C
3.3 V
2.5
pF
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 7-7
25°C
3.3 V
73
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
See Figure 7-8
25°C
3.3 V
–64
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 1 MHz,
Switch ON,
See Figure 7-9
25°C
3.3 V
–64
dB
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 7-11
25°C
3.3 V
0.01%
VI = VCC or GND,
Switch ON or OFF
Total harmonic
THD
distortion
30.5
34
6
11.5
12.5
13
26
30
ns
ns
ns
SUPPLY
Positive supply
ICC
current
(1)
(2)
8
25°C
Full
3.6 V
2
20
350
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs (SCBA004).
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6.7 Electrical Characteristics for 2.5-V Supply
VCC = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX
UNIT
VCC
V
ANALOG SWITCH
Analog signal
range
VCOM, VNO
Peak ON
resistance
rpeak
0 ≤ (VNO) ≤ VCC,
ICOM = –8 mA,
Switch ON,
See Figure 7-1
25°C
ON-state
resistance
ron
VNO = 1.8 V,
ICOM = –8 mA,
Switch ON,
See Figure 7-1
25°C
VNO = 1.8 V,
ICOM = –8 mA,
Switch ON,
See Figure 7-1
0 ≤ (VNO) ≤ VCC,
ICOM = –8 mA,
Switch ON,
See Figure 7-1
VNO = 0.8 V, 1.8 V
ICOM = –8 mA,
Switch ON,
See Figure 7-1
25°C
ON-state
resistance
Δron
match between
channels
ON-state
resistance
flatness
NO
OFF leakage
current
NO
ON leakage
current
COM
OFF leakage
current
COM
ON leakage
current
ron(flat)
0
Full
Full
1.8
2.3 V
2.7
1.5
2.3 V
2.3 V
0.2
VNO = 0.5 V or 2.3 V,
VCOM = 0.5 V to 2.3 V,
Switch OFF,
See Figure 7-2
INO(PWROFF)
VNO = 0 to 2.7 V,
VCOM = 2.7 V to 0,
Switch OFF,
See Figure 7-2
25°C
INO(ON)
VNO = 0.5 V or 2.3 V,
VCOM = Open,
Switch ON,
See Figure 7-2
ICOM(OFF)
VNO = 0.3 V to 2.3 V,
VCOM = 0.5 V or 2.3 V,
Switch OFF,
See Figure 7-2
25°C
ICOM(PWROFF)
VCOM = 0 to 2.7 V,
VNO = 2.7 V to 0,
Switch OFF,
See Figure 7-2
25°C
ICOM(ON)
VNO = Open,
VCOM = 0.5 V or 2.2 V,
Switch ON,
See Figure 7-2
Full
Full
Full
Full
2.7 V
0V
–15
0.6
1
3
15
–30
–1
2.7 V
0V
0.1
–15
3
Ω
3
15
60
0.1
–10
1
10
3.5
nA
μA
15
35
–60
–1
1
10
–35
–15
2.7 V
30
–10
–15
2.7 V
25°C
Full
Ω
1
25°C
Full
Ω
0.6
2.3 V
Full
INO(OFF)
Ω
0.2
25°C
25°C
2
2.4
25°C
Full
2.5
nA
nA
μA
15
nA
–40
40
Full
1.8
5.5
V
Full
0
0.6
V
25°C
1
1
10
10
DIGITAL CONTROL INPUTS (IN1, IN2)(2)
Input logic high VIH
Input logic low
Input leakage
current
VIL
IIH, IIL
VI = 5.5 V or 0
Full
2.7 V
nA
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6.7 Electrical Characteristics for 2.5-V Supply (continued)
VCC = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
4.5
MAX
UNIT
DYNAMIC
Turnon time
tON
VCOM = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-5
25°C
2.5 V
2
Full
2.3 V to 2.7 V
2
Turnoff time
tOFF
VCOM = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-5
25°C
2.5 V
2
Full
2.3 V to 2.7 V
2
Break-beforemake time
tBBM
VNO = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-6
25°C
2.5 V
0.5
Full
2.3 V to 2.7 V
0.5
Charge
injection
QC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 7-10
25°C
2.5 V
8
pC
NO
OFF
capacitance
CNO(OFF)
VNO = VCC or GND,
Switch OFF,
See Figure 7-4
25°C
2.5 V
18.5
pF
COM
OFF
capacitance
CCOM(OFF)
VCOM = VCC or GND,
Switch OFF,
See Figure 7-4
25°C
2.5 V
55
pF
NO
ON
capacitance
CNO(ON)
VNO = VCC or GND,
Switch ON,
See Figure 7-4
25°C
2.5 V
78
pF
COM
ON
capacitance
CCOM(ON)
VCOM = VCC or GND,
Switch ON,
See Figure 7-4
25°C
2.5 V
78
pF
Digital input
capacitance
CI
VI = VCC or GND,
See Figure 7-4
25°C
2.5 V
3
pF
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 7-7
25°C
2.5 V
73
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 1 MHz,
Switch OFF,
See Figure 7-8
25°C
2.5 V
–64
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 1 MHz,
Switch ON,
See Figure 7-9
25°C
2.5 V
–64
dB
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 7-11
25°C
2.5 V
0.03%
VI = VCC or GND,
Switch ON or OFF
Total harmonic
THD
distortion
43
47.5
8.5
11
12.5
18.5
38.5
43
ns
ns
ns
SUPPLY
Positive supply
ICC
current
(1)
(2)
10
25°C
Full
2.7 V
1
10
250
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs (SCBA004).
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6.8 Electrical Characteristics for 1.8-V Supply
VCC = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX
UNIT
VCC
V
ANALOG SWITCH
Analog signal
range
VCOM, VNO
Peak ON
resistance
rpeak
0 ≤ (VNO) ≤ VCC,
ICOM = –2 mA,
Switch ON,
See Figure 7-1
25°C
ON-state
resistance
ron
VNO = 1.5 V,
ICOM = –2 mA,
Switch ON,
See Figure 7-1
25°C
VNO = 1.5 V,
ICOM = –2 mA,
Switch ON,
See Figure 7-1
0 ≤ (VNO) ≤ VCC,
ICOM = –2 mA,
Switch ON,
See Figure 7-1
VNO = 0.6 V, 1.5 V
ICOM = –2 mA,
Switch ON,
See Figure 7-1
25°C
ON-state
resistance
Δron
match between
channels
ON-state
resistance
flatness
NO
OFF leakage
current
NO
ON leakage
current
COM
OFF leakage
current
ron(flat)
0
Full
Full
30
2
1.65 V
VNO =0.3 V or 1.65 V,
VCOM = 0.3 V to 1.65 V,
Switch OFF,
See Figure 7-2
INO(PWROFF)
VNO = 0 to 1.95 V,
VCOM = 1.95 V to 0,
Switch OFF,
See Figure 7-2
25°C
INO(ON)
VNO =0.3 V or 1.65 V,
VCOM = Open,
Switch ON,
See Figure 7-2
ICOM(OFF)
VNO = 0.3 V to 1.65 V,
VCOM =0.3 V or 1.65 V,
Switch OFF,
See Figure 7-2
25°C
Switch OFF,
See Figure 7-2
25°C
ICOM(PWROFF VCOM = 0 to 1.95 V,
VNO = 1.95 V to 0,
VNO = Open,
VCOM = 0.3 V or 1.65 V,
Switch ON,
See Figure 7-2
0.15
1.65 V
Full
Full
Full
Full
Ω
Ω
4.5
5
1.95 V
0V
–15
1.95 V
0V
–1
0.1
3
3
15
50
0.1
–10
1
10
3
nA
μA
15
30
–50
–1
1
15
–30
–15
15
30
–15
–15
1.95 V
3
–30
–15
1.95 V
25°C
Full
Ω
5
1.65 V
25°C
Full
Ω
0.4
0.4
Full
INO(OFF)
2.5
3.5
25°C
25°C
ICOM(ON)
5
1.65 V
25°C
)
COM
ON leakage
current
Full
nA
nA
μA
15
nA
–30
30
1.5
5.5
V
Full
0
0.6
V
25°C
–2
2
–20
20
DIGITAL CONTROL INPUTS (IN1, IN2)(2)
Input logic high VIH
Input logic low
Input leakage
current
Full
VIL
IIH, IIL
VI = 5.5 V or 0
Full
1.95 V
nA
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6.8 Electrical Characteristics for 1.8-V Supply (continued)
VCC = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
TA
VCC
MIN
TYP
MAX
38.5
85
UNIT
DYNAMIC
Turnon time
tON
VCOM = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-5
25°C
1.8 V
3
Full
1.65 V to 1.95 V
3
Turnoff time
tOFF
VCOM = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-5
25°C
1.8 V
2
Full
1.65 V to 1.95 V
2
Break-beforemake time
tBBM
VNO = VCC,
RL = 50 Ω,
CL = 35 pF,
See Figure 7-6
25°C
1.8 V
1
Full
1.65 V to 1.95 V
1
Charge
injection
QC
VGEN = 0,
RGEN = 0,
CL = 1 nF,
See Figure 7-10
25°C
1.8 V
5
pC
NO
OFF
capacitance
CNO(OFF)
VNO = VCC or GND,
Switch OFF,
See Figure 7-4
25°C
1.8 V
18.5
pF
COM
OFF
capacitance
CCOM(OFF)
VCOM = VCC or GND,
Switch OFF,
See Figure 7-4
25°C
1.8 V
55
pF
NO
C
ON capacitance NO(ON)
VNO = VCC or GND,
Switch ON,
See Figure 7-4
25°C
1.8 V
78
pF
COM
C
ON capacitance COM(ON)
VCOM = VCC or GND,
Switch ON,
See Figure 7-4
25°C
1.8 V
78
pF
Digital input
capacitance
CI
VI = VCC or GND,
See Figure 7-4
25°C
1.8 V
3
pF
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 7-7
25°C
1.8 V
73
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 1 M Hz ,
Switch OFF,
See Figure 7-8
25°C
1.8 V
–64
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 1 MHz,
Switch ON,
See Figure 7-9
25°C
1.8 V
–64
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 7-11
25°C
1.8 V
0.08%
ICC
VI = VCC or GND,
Switch ON or OFF
90
8.5
16
18
33
75
80
ns
ns
ns
SUPPLY
Positive supply
current
(1)
(2)
12
25°C
Full
1.95 V
1
200
nA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, SCBA004.
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6.9 Typical Characteristics
1.4
VCC = 1.8 V
TA = 25°C
1.2
TA = 85°C
ron (Ω)
(Ω)
1.0
VCC = 2.5 V
VCC = 3.3 V
0.8
0.6
TA = –40°C
0.4
0.2
0.0
0.0
Figure 6-1. Ron vs VCOM
1.0
1.5
2.0
VCOM (V)
2.5
3.0
3.5
Figure 6-2. Ron vs VCOM Over Temperature (VCC = 3.3 V)
°C
°C
°C
(Ω)
°C
0.5
°C
Figure 6-3. Ron vs VCOM Over Temperature(VCC = 5 V)
°C
VCOM
Figure 6-4. ICOM(OFF)Leakage Current vs VCOM Over Temperature
(VCC = 5 V)
°C
°C
°C
°C
°C
°C
VCOM
Figure 6-5. INO(OFF)Leakage Current vs VCOM Over Temperature
(VCC = 5 V)
VCOM
Figure 6-6. ICOM(ON)Leakage Current vs VCOM Over Temperature
(VCC = 5 V)
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6.9 Typical Characteristics (continued)
°C
°C
°C
VCOM
Figure 6-7. ICOM(PWROFF)Leakage Current vs VCOM Over
Temperature (VCC = 0 V)
Figure 6-9. tON and tOFF vs Supply Voltage
Figure 6-8. Charge Injection (QC) vs VCOM
(°C)
Figure 6-10. TON and TOFF vs Temperature
V+ to VCC
Figure 6-11. Logic-Level Threshold vs VCC
14
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Figure 6-12. Bandwidth (VCC = 5 V)
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6.9 Typical Characteristics (continued)
Figure 6-14. Total Harmonic Distortion vs Frequency (VCC = 5 V)
0
0
–10
–10
–20
–20
–30
–30
PSRR (dB)
PSRR (dB)
Figure 6-13. Off Isolation (VCC = 5 V)
–40
–50
–60
–40
–50
–60
–70
–70
–80
–80
–90
–90
–100
100 k
10 M
1M
–100
100 k
1M
10 M
Frequency (Hz)
Frequency (Hz)
Figure 6-15. Com Port to No2 PSRR, In1 = VCC, In2 = VCC (VCC =
5 V)
Figure 6-16. Com Port to No0 PSRR, In1 = VCC, In2 = VCC (VCC =
5 V)
0
–10
–20
PSRR (dB)
–30
–40
–50
–60
–70
–80
–90
–100
100 k
1M
10 M
Frequency (Hz)
Figure 6-17. Com Port Hi-Z PSRR, In1 = 0 V, In2 = 0 V (VCC = 5 V)
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7 Parameter Measurement Information
VCC
ron =
VCOM – VNO
ICOM
Ω
Figure 7-1. ON-State Resistance (Ron)
VCC
Current
Figure 7-2. OFF-State Leakage Current (INC(OFF), INO(OFF), INO(PWROFF), ICOM(OFF), ICOM(PWROFF))
VCC
Current
Figure 7-3. ON-State Leakage Current (ICOM(ON), INO(ON))
16
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VCC
Capacitance
Meter
VBIAS = VCC or GND
VI = VCC or GND
Capacitance is measured at NO,
COM, and IN inputs during ON
and OFF conditions.
VBIAS
Figure 7-4. Capacitance (CI, CCOM(ON), CNO(OFF), CCOM(OFF), CNO(ON))
VCC
50 Ω
35 pF
VCC
50 Ω
35 pF
VCC
(B)
CL
VCC
(B)
CL
Logic
(A)
Input
tOFF
A.
B.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
CL includes probe and jig capacitance.
Figure 7-5. Turnon (tON) and Turnoff Time (tOFF)
VCC
VCC
(B)
CL
Logic
(A)
Input
A.
B.
VCC
Ω
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
CL includes probe and jig capacitance.
Figure 7-6. Break-Before-Make Time (tBBM)
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VCC
Ω
Channel ON: NO0 to COM
VI = VCC or GND
NO1–NO2
Network Analyzer Setup
Source Power = 0 dBM
(632-mV P-P at 50-Ω load)
Ω
DC Bias = 350 mV
Figure 7-7. Bandwidth (BW)
VCC
Ω
Channel OFF: NO0 to COM
VI = VCC or GND
Ω
NO1–NO2
Network Analyzer Setup
Source Power = 0 dBM
(632-mV P-P at 50-Ω load)
Ω
DC Bias = 350 mV
Figure 7-8. Off Isolation (OISO)
VCC
Ω
Channel ON: NO0 to COM
Channel OFF: NO0–NO1 to
COM
VI = VCC or GND
NO1–NO2
Ω
Ω
Network Analyzer Setup
Source Power = 0 dBM
(632-mV P-P at 50-Ω load)
DC Bias = 350 mV
Figure 7-9. Crosstalk (XTALK)
18
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VCC
VIH
VIL
ΔVCOM
V+ to VCC
(B)
CL
VGEN = 0 to VCC
RGEN = 0
CL = 1 nF
QC = CL x ΔVCOM
VI = VIH or VIL
Logic
(A)
Input
A.
B.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.
CL includes probe and jig capacitance.
Figure 7-10. Charge Injection (QC)
Ω
VCC P-P
VCC
VCC
10 μF
10 μF
(A)
Ω
Ω
CL
Ω
A.
CL includes probe and jig capacitance.
Figure 7-11. Total Harmonic Distortion (THD)
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Table 7-1. Parameter Description
SYMBOL
DESCRIPTION
VCOM
Voltage at COM
VNO
Voltage at NO
ron
Resistance between COM and NC or COM and NO ports when the channel is ON
rpeak
Peak ON-state resistance over a specified voltage range
Δron
Difference of ron between channels in a specific device
ron(flat)
Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
INO(OFF)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state
INO(PWROFF)
Leakage current measured at the NO port during the power-down condition, VCC = 0.
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output
(COM) open
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (COM to NO or COM to NC) in the ON state
and the output (NC or NO) open
ICOM(OFF)
Leakage current measured at the COM port during the power-down condition, VCC = 0
ICOM(PWROFF)
Leakage current measured at the COM port during the power-down condition, VCC = 0.
VIH
Minimum input voltage for logic high for the control input (IN)
VIL
Maximum input voltage for logic low for the control input (IN)
VI
Voltage at the control input (IN)
IIH, IIL
Leakage current measured at the control input (IN)
tON
Turnon time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.
tOFF
Turnoff time for the switch. This parameter is measured under the specified range of conditions and by the propagation
delay between the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.
tBBM
Break-before-make time. This parameter is measured under the specified range of conditions and by the propagation
delay between the output of two adjacent analog channels (NC and NO) when the control signal changes state.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM)
output. This is measured in coulomb (C) and measured by the total charge induced due to switching of the control
input.Charge injection, QC = CL × ΔVCOM, CL is the load capacitance and ΔVCOM is the change in analog output voltage.
CNO(OFF)
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
CNO(ON)
Capacitance at the NO port when the corresponding channel (NO to COM) is ON
CCOM(ON)
Capacitance at the COM port when the corresponding channel (COM to NO) is ON
CCOM(OFF)
Capacitance at the COM port when the corresponding channel (COM to NO) is OFF
CI
Capacitance of control input (IN)
OISO
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific
frequency, with the corresponding channel (NC to COM or NO to COM) in the OFF state.
XTALK
Crosstalk is a measurement of unwanted signal coupling from an ON channel to an OFF channel (NC to NO or NO to
NC). This is measured in a specific frequency and in dB.
BW
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB less than the DC gain.
THD
Total harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of
root mean square (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental
harmonic.
ICC
Static power-supply current with the control (IN) pin at VCC or GND
20
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Table 7-2. Summary of Characteristics(1)
PARAMETER
CHARACTERISTIC
Configuration
Triple 3:1 Multiplexer/
Demultiplexer (1 × SP3T)
Number of channels
1
ON-state resistance (ron)
1.1 Ω
ON-state resistance match (Δron)
0.1 Ω
ON-state resistance flatness (ron(flat))
Turnon/turnoff time (tON/tOFF)
0.15 Ω
40 ns/35 ns
Break-before-make time (tBBM)
1 ns
Charge injection (QC)
40 pC
Bandwidth (BW)
100 MHz
OFF isolation (OISO)
–65 dB at 10 MHz
Crosstalk (XTALK)
–66 dB at 10 MHz
Total harmonic distortion (THD)
0.01%
Leakage current (ICOM(OFF)/INO(OFF))
±20 μA
Power supply current (ICC)
0.1 μA
Package options
(1)
8-pin DCU or YZP
VCC = 5 V, TA = 25°C
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8 Detailed Description
8.1 Overview
The TS5A3359 is a bidirectional, single-channel, single-pole triple-throw (SP3T) analog switch that is designed
to operate from 1.65 V to 5.5 V. This device provides a signal switching solution while maintaining excellent
signal integrity, which makes the TS5A3359 suitable for a wide range of applications in various markets including
personal electronics, portable instrumentation, and test and measurement equipment. The device maintains
the signal integrity by its low ON-state resistance, excellent ON-state resistance matching, and total harmonic
distortion (THD) performance. To prevent signal distortion during the transferring of a signal from one channel to
another, the TS5A3359 device also has a specified break-before-make feature. The device consumes very low
power and provides isolation when VCC = 0.
8.2 Functional Block Diagram
SP3T
NO0
NO1
COM
NO2
IN1
IN2
Logic
Control
8.3 Feature Description
Isolation in Power-Down Mode, VCC = 0
When power is not supplied to the VCC pin, VCC = 0 , the signal paths NO and COM are high impedance. This
is specificed in the electrical characterisitics table under the COM and NO OFF leakage current when VCC = 0.
Because the device is high impedance when it is not powered, you may connect other signals to the signal chain
without interference of the TS5A3359.
8.4 Device Functional Modes
Table 8-1. Function Table
IN2
22
IN1
COM TO NO,
NO TO COM
L
L
OFF
L
H
COM = NO0
H
L
COM = NO1
H
H
COM = NO2
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The TS5A3359 switch is bidirectional, so the NO and COM pins can be used as either inputs or outputs. This
switch is typically used when there is only one signal path that needs to be able to communicate to 3 different
signal paths.
9.2 Typical Application
3.3 V
0.1 PF
0.1 PF
System
Controller
Switch
Control
Logic
Signal
Path
VCC
TS5A3359
NO0
Device 1
NO1
Device 2
NO2
Device 3
IN1
IN2
COM
GND
COM4
Figure 9-1. Typical Application Schematic
9.2.1 Design Requirements
The TS5A3359 device can be properly operated without any external components. However, TI recommends
connecting unused pins to ground through a 50-Ω resistor to prevent signal reflections back into the device.
TI also recommends pulling up the digital control pins (IN1 and IN2) to VCC or pulling down to GND to avoid
undesired switch positions that could result from the floating pin.
Select the appropriate supply voltage to cover the entire voltage swing of the signal passing through the switch
because the TS5A3359 input and output signal swing through NO and COM are dependent on the supply
voltage VCC. For example, if the desired signal level to pass through the switch is 5 V, VCC must be greater than
or equal to 5 V. VCC = 3.3 V would not be valid for passing a 5-V signal since the Analog signal voltage cannot
exceed the supply.
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9.2.2 Detailed Design Procedure
The TS5A3359 device can be properly operated without any external components. However, TI recommends
connecting unused pins to ground through a 50-Ω resistor to prevent signal reflections back into the device.
TI also recommends pulling up the digital control pins (IN1 and IN2) to VCC or pulling down to GND to avoid
undesired switch positions that could result from the floating pin.
Select the appropriate supply voltage to cover the entire voltage swing of the signal passing through the switch
because the TS5A3359 input/output signal swing through NO and COM are dependant of the supply voltage
VCC.
9.2.3 Application Curve
(Ω)
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
Figure 9-2. Ron vs VCOM
10 Power Supply Recommendations
TI recommends proper power-supply sequencing for all CMOS devices. Do not exceed the absolute maximum
ratings, because stresses beyond the listed ratings can cause permanent damage to the device. Always
sequence VCC on first, followed by NO or COM.
Although it is not required, power-supply bypassing improves noise margin and prevents switching noise
propagation from the VCC supply to other components. A 0.1-μF capacitor, connected from VCC to GND, is
adequate for most applications.
24
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11 Layout
11.1 Layout Guidelines
TI recommends following common printed-circuit board layout guidelines to ensure reliability of the device.
• Bypass capacitors should be used on power supplies.
• Short trace lengths should be used to avoid excessive loading.
11.2 Layout Example
VCC
= VIA to GND Plane
0603 Cap
To Device 1
NO0
VCC
To System
To Device 2
NO1
COM
To System Controller
To Device 3
NO2
IN1
GND
IN2
To System Controller
Figure 11-1. Recommended Layout
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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29-Nov-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS5A3359DCUR
ACTIVE
VSSOP
DCU
8
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(AL, JALR)
JZ
TS5A3359DCUT
ACTIVE
VSSOP
DCU
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(AL, JALR)
JZ
TS5A3359DCUTG4
ACTIVE
VSSOP
DCU
8
250
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(AL, JALR)
JZ
TS5A3359YZPR
ACTIVE
DSBGA
YZP
8
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
J9
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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