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TS5A63157
SCDS203B – DECEMBER 2005 – REVISED MARCH 2019
TS5A63157 12-Ω SPDT analog switch
5-V/3.3-V single-channel 2:1 multiplexer/demultiplexer
1 Features
3 Description
•
•
•
•
•
•
•
•
•
•
The TS5A63157 is a single-pole, double-throw
(SPDT) analog switch designed to operate from
1.65 V to 5.5 V. This device can handle both digital
and analog signals. Signals up to V+ (peak) can be
transmitted in either direction.
1
•
Overshoot and Undershoot Voltage Protection
Isolation in Powered-Off Mode, V+ = 0 V
Specified Break-Before-Make Switching
Low ON-State Resistance (12 Ω)
Control Inputs Are 5-V Tolerant
Low Charge Injection
Excellent ON-State Resistance Matching
Low Total Harmonic Distortion (THD)
1.65-V to 5.5-V Single-Supply Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model (A114-B, Class II)
– 1000-V Charged-Device Model (C101)
TI has integrated overshoot and undershoot
protection circuitry. The TS5A63157 senses
overshoot and undershoot events at the I/Os and
responds by preventing voltage differentials from
developing and turning the switch on.
Device Information(1)
PART NUMBER
TS5A63157
PACKAGE
BODY SIZE (NOM)
SOT-23 (DBV)
2.90 mm x 1.60 mm
SC-70 (DCK)
2.00 mm x 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
2 Applications
•
•
•
•
Sample-and-Hold Circuits
Battery-Powered Equipment
Audio and Video Signal Routing
Communication Circuits
Block Diagram
TS5A63157
NO
COM
NC
IN
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TS5A63157
SCDS203B – DECEMBER 2005 – REVISED MARCH 2019
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
7
8
1
1
1
2
3
4
Absolute Minimum and Maximum Ratings .............. 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 4
Electrical Characteristics for 5-V Supply................... 5
Electrical Characteristics for 3.3-V Supply................ 7
Electrical Characteristics for 2.5-V Supply................ 9
Electrical Characteristics for 1.8-V Supply.............. 11
Typical Characteristics ............................................ 13
Parameter Measurement Information ................ 15
Detailed Description ............................................ 21
8.1 Overview ................................................................. 21
8.2 Functional Block Diagram ....................................... 21
8.3 Feature Description................................................. 21
8.4 Device Functional Modes........................................ 21
9
Application and Implementation ........................ 22
9.1 Application Information............................................ 22
9.2 Typical Application ................................................. 22
10 Power Supply Recommendations ..................... 23
11 Layout................................................................... 23
11.1 Layout Guidelines ................................................. 23
11.2 Layout Example .................................................... 23
12 Device and Documentation Support ................. 24
12.1
12.2
12.3
12.4
12.5
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
24
24
24
24
24
13 Mechanical, Packaging, and Orderable
Information ........................................................... 24
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (August 2009) to Revision B
Page
•
Added Device Information table, ESD Ratings table, Recommended Operating Conditions table, Thermal
Information table, Feature Description section, Device Functional Modes, Application and Implementation section,
Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section. ................................................................................................ 1
•
Deleted the YEP or YZP package option .............................................................................................................................. 3
•
Deleted 2 table notes from the Absolute Minimum and Maximum Ratings : "The input and output voltage ratings..."
and "This value is limited to 5.5 V maximum." ...................................................................................................................... 4
2
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SCDS203B – DECEMBER 2005 – REVISED MARCH 2019
5 Pin Configuration and Functions
DBV or DCK Package
SOT-23 or SC-70 (6 Pin)
Top View
NO
1
6
IN
GND
2
5
V+
NC
3
4
CO M
No t to scale
Pin Functions
PIN
NAME
DESCRIPTION
NO.
NO
1
Normally open
GND
2
Digital ground
NC
3
Normally closed
COM
4
Common
V+
5
Power supply
IN
6
Digital control. Logic H = COM to NO, Logic = L COM to NC
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SCDS203B – DECEMBER 2005 – REVISED MARCH 2019
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6 Specifications
6.1 Absolute Minimum and Maximum Ratings (1)
(2)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
V+
Supply voltage range (3)
–0.5
6.5
V
VNO
VNC
VCOM
Analog voltage range (3)
–0.5
V+ + 0.5
V
IK
Analog port diode current
VNC, VNO, VCOM < 0 or VNO, VNC, VCOM > V+
–50
50
mA
INO
INC
ICOM
On-state switch current
VNC, VNO, VCOM = 0 to V+
–50
50
mA
VI
Digital input voltage range (3)
–0.5
6.5
IIK
Digital input clamp current
I+
Continuous current through V+
–100
100
mA
IGND
Continuous current through GND
–100
100
mA
Tstg
Storage temperature range
–65
150
°C
(1)
(2)
(3)
VI < 0
–50
UNIT
V
mA
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
All voltages are with respect to ground, unless otherwise specified.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
±2000
Charged-device model (CDM), per JEDEC specification JESD22-C101
or V ANSI/ESDA/JEDEC JS-002 (2)
±1000
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
V+
Supply voltage range
1.65
5.5
UNIT
V
VNO VNC VCOM
Analog voltage range
0
V+
V
VI
Digital input voltage range
0
5.5
V
6.4 Thermal Information
TS5A63157
THERMAL METRIC (1)
DBV
DCK
6 PINS
6 PINS
UNIT
RθJA
Junction-to-ambient thermal resistance
209.9
298.8
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
147.1
103.9
°C/W
RθJB
Junction-to-board thermal resistance
82.8
107.0
°C/W
ψJT
Junction-to-top characterization parameter
65.3
2.7
°C/W
ψJB
Junction-to-board characterization parameter
82.5
106.2
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC package thermal metrics application
report.
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SCDS203B – DECEMBER 2005 – REVISED MARCH 2019
6.5 Electrical Characteristics for 5-V Supply
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
range
VCOM, VNO,
VNC
0
Voltage
undershoot
VIKU
0 ≥ (INC, INO, or ICOM) ≥ –50 mA
Peak ON-state
resistance
rpeak
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –30 mA,
ON-state
resistance
ron
Switch ON,
See Figure 13
5.5 V
25°C
Full
VNO or VNC = 0,
ICOM = 30 mA
25°C
VNO or VNC = 2.4 V,
ICOM = –30 mA
25°C
Switch ON,
See Figure 13
Full
4
4.5 V
VNO or VNC = 3.15 V,
ICOM = –30 mA,
Switch ON,
See Figure 13
ON-state
resistance
flatness
ron(flat)
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –30 mA,
Switch ON,
See Figure 13
INC(OFF),
INO(OFF)
VNC or VNO = 0 to V+,
VCOM = V+ to 0
Switch OFF,
See Figure 14
25°C
25°C
INC(PWROFF),
INOPWROFF)
VNC or VNO = 0 to 5.5 V,
VCOM = 5.5 V to 0,
Switch OFF,
See Figure 14
COM
OFF leakage
current
ICOM(PWROFF)
VCOM = 0 to 5.5 V,
VNC or VNO = 5.5 V to 0,
Switch ON,
See Figure 14
NC, NO
ON leakage
current
INC(ON),
INO(ON)
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
See Figure 15
COM
ON leakage
current
ICOM(ON)
VNC or VNO = Open,
VCOM = 0 to V+,
Switch ON,
See Figure 15
Full
Full
10
0.1
0.14
1.5
4.5 V
0.001
5.5 V
0
Ω
Ω
0.03
0.05
0.15
1
μA
5
0.2
0
1
10
0.001
5.5 V
0.003
5.5 V
μA
0.01
0.02
25°C
Full
Ω
2
4
25°C
Full
8
0.15
25°C
Full
Ω
6.5
5.5
4.5 V
25°C
Full
11
12
25°C
Full
V
10
Full
Δron
–2
8
4
25°C
ON-state
resistance
match
between
channels
V
13
Full
VNO or VNC = 4.5 V,
ICOM = –30 mA
NC, NO
OFF leakage
current
4.6
4.5 V
V+
μA
0.03
0.05
μA
Digital Control Input (IN)
Input logic
high
VIH
Full
V+
× 0.7
5.5
V
Input logic low
VIL
Full
0
V+
× 0.3
V
Input leakage
current
IIH, IIL
25°C
VI = 5.5 V or 0
Full
5.5 V
0.05
0.1
0.02
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Electrical Characteristics for 5-V Supply (continued)
V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
25°C
5V
2
3.4
5
Full
4.5 V to
5.5 V
2
25°C
5V
1
Full
4.5 V to
5.5 V
1
UNIT
Dynamic
Turn-on time
tON
VCOM = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 17
Turn-off time
tOFF
VCOM = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 17
Output voltage
during
undershoot
VOUTU
See Figure 18
Output voltage
during
overshoot
VOUTO
See Figure 18
Break-beforemake time
tBBM
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 50 pF,
See Figure 19
Charge
injection
QC
VGEN = 0,
RGEN = 0,
2.5
5.5
2.8
ns
3.4
3.8
VOH
– 0.3
ns
V
VOL
+ 0.3
2
5
12
V
25°C
5V
0.5
Full
4.5 V to
5.5 V
0.5
CL = 0.1 nF,
See Figure 23
25°C
5V
–21
pC
14
ns
NC, NO
OFF
capacitance
CNC(OFF),
CNO(OFF)
VNC or VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
5V
5
pF
NC, NO
ON
capacitance
CNC(ON),
CNO(ON)
VNC or VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
5V
14.5
pF
COM
ON
capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
5V
14.5
pF
Digital input
capacitance
CI
VI = V+ or GND,
See Figure 16
25°C
5V
2.5
pF
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 20
25°C
5V
371
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
See Figure 21
25°C
5V
–61
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 10 MHz,
Switch ON,
See Figure 22
25°C
5V
–61
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 24
25°C
5V
0.06%
VI = V+ or GND,
Switch ON or OFF
Supply
Positive
supply current
6
I+
Submit Documentation Feedback
25°C
Full
5.5 V
0.01
0.1
0.75
μA
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SCDS203B – DECEMBER 2005 – REVISED MARCH 2019
6.6 Electrical Characteristics for 3.3-V Supply
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
range
VCOM, VNO,
VNC
0
Voltage
undershoot
VIKU
0 ≥ (INC, INO, or ICOM) ≥ –50 mA
Peak ON-state
resistance
rpeak
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –24 mA,
ON-state
resistance
VNO or VNC = 3 V,
ICOM = –24 mA
ON-state
resistance
flatness
NC, NO
OFF leakage
current
Switch ON,
See Figure 13
ron
Δron
3.6 V
25°C
Full
Full
25°C
6.4
3V
4.8
3V
6.3
ron(flat)
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –24 mA,
Switch ON,
See Figure 13
INC(OFF),
INO(OFF)
VNC or VNO = 0 to V+,
VCOM = V+ to 0
Switch OFF,
See Figure 14
25°C
Switch OFF,
See Figure 14
25°C
INC(PWROFF),
INOPWROFF)
COM
OFF leakage
current
ICOM(PWROFF)
NC, NO
ON leakage
current
COM
ON leakage
current
VNC or VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,
VCOM = 0 to 3.6 V,
VNC or VNO = 3.6 V to 0,
Switch ON,
See Figure 14
INC(ON),
INO(ON)
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
SeeFigure 15
ICOM(ON)
VNC or VNO = Open,
VCOM = 0 to V+,
Switch ON,
See Figure 15
Full
Full
Full
0.1
3V
2.8
3V
0
3.6 V
0.15
0.50
0.2
0.5
μA
2
0
5
0.001
3.6 V
0.003
3.6 V
μA
0.01
0.02
25°C
Full
Ω
0.03
0.05
0
Ω
4
7
25°C
Full
Ω
0.2
0.2
25°C
Full
12
15
25°C
Full
Ω
8
10
25°C
Switch ON,
See Figure 13
14
18
Full
VNO or VNC = 2.1 V,
ICOM = –24 mA,
V
V
25°C
VNO or VNC = 0,
ICOM = 24 mA
ON-state
resistance
match
between
channels
Switch ON,
See Figure 13
V+
μA
0.03
0.05
μA
Digital Control Input (IN)
Input logic
high
VIH
Full
Input logic low
VIL
Full
Input leakage
current
IIH, IIL
25°C
VI = 5.5 V or 0
Full
3.6 V
V+
× 0.7
5.5
0
V+
× 0.3
0.005
0.01
0.02
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V
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Electrical Characteristics for 3.3-V Supply (continued)
V+ = 3 V to 3.6 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
4.3
6.6
UNIT
Dynamic
Turn-on time
tON
VCOM = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 17
Turn-off time
tOFF
VCOM = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 17
Output voltage
during
undershoot
VOUTU
See Figure 18
Output voltage
during
overshoot
VOUTO
See Figure 18
Break-beforemake time
tBBM
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 50 pF,
See Figure 19
Charge
injection
QC
VGEN = 0,
RGEN = 0,
25°C
3.3 V
2
Full
3 V to
3.6 V
2
25°C
3.3 V
1
Full
3 V to
3.6 V
1
2.5
7
3.3
ns
6.3
7
VOH
– 0.3
ns
V
VOL
+ 0.3
2
7
17
V
25°C
3.3 V
0.5
Full
3 V to
3.6 V
0.5
CL = 0.1 nF,
See Figure 23
25°C
3.3 V
–11.5
pC
19.5
ns
NC, NO
OFF
capacitance
CNC(OFF),
CNO(OFF)
VNC or VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
3.3 V
5
pF
NC, NO
ON
capacitance
CNC(ON),
CNO(ON)
VNC or VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
3.3 V
15
pF
COM
ON
capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
3.3 V
15
pF
Digital input
capacitance
CI
VI = V+ or GND,
See Figure 16
25°C
3.3 V
2.5
pF
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 20
25°C
3.3 V
370
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
See Figure 21
25°C
3.3 V
–60
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 10 MHz,
Switch ON,
See Figure 22
25°C
3.3 V
–60
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 24
25°C
3.3 V
0.1%
VI = V+ or GND,
Switch ON or OFF
Supply
Positive
supply current
8
I+
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25°C
Full
3.6 V
0.05
0.1
0.6
μA
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SCDS203B – DECEMBER 2005 – REVISED MARCH 2019
6.7 Electrical Characteristics for 2.5-V Supply
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
range
VCOM, VNO,
VNC
0
Voltage
undershoot
VIKU
0 mA ≥ (INC, INO, or ICOM) ≥ –50 mA
Peak ON-state
resistance
rpeak
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –8 mA,
ON-state
resistance
ron
VNO or VNC = 2.3 V,
ICOM = –8 mA
Δron
ON-state
resistance
flatness
NC, NO
OFF leakage
current
2.7 V
25°C
Full
Switch ON,
See Figure 13
Full
25°C
9.2
2.3 V
5.4
8.5
8.6
15.5
12
2.3 V
ron(flat)
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –8 mA,
Switch ON,
See Figure 13
INC(OFF),
INO(OFF)
VNC or VNO = 0 to V+,
VCOM = V+ to 0,
Switch OFF,
See Figure 14
25°C
Switch OFF,
See Figure 14
25°C
INC(PWROFF),
INOPWROFF)
VNC or VNO = 0 to 2.7 V,
VCOM = 2.7 V to 0,
COM
OFF leakage
current
ICOM(PWROFF)
VCOM = 0 to 2.7 V,
VNC or VNO = 2.7 V to 0,
Switch ON,
See Figure 14
NC, NO
ON leakage
current
INC(ON),
INO(ON)
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
See Figure 15
COM
ON leakage
current
ICOM(ON)
VNC or VNO = Open,
VCOM = 0 to V+,
Switch ON,
See Figure 15
Full
0.05
2.3 V
Full
Full
5
2.3 V
0
2.7 V
0
0
μA
0.5
1
0.001
2.7 V
0.003
2.7 V
μA
0.01
0.02
25°C
Full
0.50
0.75
0.2
25°C
Full
Ω
0.03
0.05
0.15
Ω
9
15
25°C
Full
Ω
0.3
0.5
25°C
Full
Ω
25
25°C
Switch ON,
See Figure 13
30
35
Full
VNO or VNC = 1.6 V,
ICOM = –8 mA,
V
V
25°C
VNO or VNC = 0,
ICOM = 8 mA
ON-state
resistance
match
between
channels
Switch ON,
See Figure 13
V+
μA
0.03
0.05
μA
Digital Control Input (IN)
Input logic
high
VIH
Full
V+
× 0.75
Input logic low
VIL
Full
0
Input leakage
current
IIH, IIL
25°C
VI = 5.5 V or 0
Full
2.7 V
0.005
5.5
V
V+
× 0.25
V
0.01
0.02
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Electrical Characteristics for 2.5-V Supply (continued)
V+ = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
5.8
9.6
UNIT
Dynamic
Turn-on time
tON
VCOM = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 17
Turn-off time
tOFF
VCOM = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 17
Output voltage
during
undershoot
VOUTU
See Figure 18
Output voltage
during
overshoot
VOUTO
See Figure 18
Break-beforemake time
tBBM
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 50 pF,
See Figure 19
Charge
injection
QC
VGEN = 0,
RGEN = 0,
25°C
2.5 V
3
Full
2.3 V to
2.7 V
3
25°C
2.5 V
1.5
Full
2.3 V to
2.7 V
1.5
2.5
12
4.5
ns
7.3
7.5
VOH
– 0.3
ns
V
VOL
+ 0.3
2
10
25
V
25°C
2.5 V
0.5
Full
2.3 V to
2.7 V
0.5
CL = 0.1 nF,
See Figure 23
25°C
2.5 V
–8
pC
28.5
ns
NC, NO
OFF
capacitance
CNC(OFF),
CNO(OFF)
VNC or VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
2.5 V
5
pF
NC, NO
ON
capacitance
CNC(ON),
CNO(ON)
VNC or VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
2.5 V
15
pF
COM
ON
capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
2.5 V
15
pF
Digital input
capacitance
CI
VI = V+ or GND,
See Figure 16
25°C
2.5 V
2.5
pF
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 20
25°C
2.5 V
367
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
See Figure 21
25°C
2.5 V
–60
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 10 MHz,
Switch ON,
SeeFigure 22
25°C
2.5 V
–60
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 24
25°C
2.5 V
0.15%
VI = V+ or GND,
Switch ON or OFF
Supply
Positive
supply current
10
I+
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25°C
Full
2.7 V
0.05
0.1
0.5
nA
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6.8 Electrical Characteristics for 1.8-V Supply
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
UNIT
Analog Switch
Analog signal
range
VCOM, VNO,
VNC
0
Voltage
undershoot
VIKU
0 ≥ (INC, INO, or ICOM) ≥ –50 mA
Peak ON-state
resistance
rpeak
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –4 mA,
ON-state
resistance
ON-state
resistance
match
between
channels
ON-state
resistance
flatness
NC, NO
OFF leakage
current
Switch ON,
See Figure 13
1.95 V
25°C
Full
ron
VNO or VNC = 1.65 V,
ICOM = –4 mA
Switch ON,
See Figure 13
Full
25°C
13.8
1.65 V
5.9
12.8
Δron
ron(flat)
0 ≤ (VNO or VNC) ≤ V+,
ICOM = –4 mA,
Switch ON,
See Figure 13
INC(OFF),
INO(OFF)
VNC or VNO = 0 to V+,
VCOM = V+ to 0,
Switch OFF,
See Figure 14
25°C
Switch OFF,
See Figure 14
25°C
INC(PWROFF),
INOPWROFF)
COM
OFF leakage
current
ICOM(PWROFF)
NC, NO
ON leakage
current
COM
ON leakage
current
VNC or VNO = 0 to 1.95 V,
VCOM = 1.95 V to 0,
VCOM = 0 to 1.95 V,
VNC or VNO = 1.95 V to 0,
Switch ON,
See Figure 14
INC(ON),
INO(ON)
VNC or VNO = 0 to V+,
VCOM = Open,
Switch ON,
See Figure 15
ICOM(ON)
VNC or VNO = Open,
VCOM = 0 to V+,
Switch ON,
See Figure 15
Full
Full
Full
0.1
1.65 V
26.5
1.65 V
0
1.95 V
0
0.50
μA
0.75
0.2
0
0.5
1
0.001
1.95 V
0.003
1.95 V
μA
0.01
0.02
25°C
Full
Ω
0.03
0.05
0.15
Ω
60
80
25°C
Full
Ω
0.5
0.8
25°C
Full
40
45
25°C
Full
Ω
15
15
1.65 V
25°C
Switch ON,
See Figure 13
60
120
Full
VNO or VNC = 1.15 V,
ICOM = –4 mA,
V
V
25°C
VNO or VNC = 0,
ICOM = 4 mA
V+
μA
0.03
0.05
μA
Digital Control Input (IN)
Input logic
high
VIH
Full
Input logic low
VIL
Full
Input leakage
current
IIH, IIL
25°C
VI = 5.5 V or 0
Full
1.95 V
V+
× 0.75
5.5
V
0
V+
× 0.25
V
0.005
0.01
0.02
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Electrical Characteristics for 1.8-V Supply (continued)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
V+
MIN
TYP
MAX
9.5
23
UNIT
Dynamic
Turn-on time
tON
VCOM = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 17
Turn-off time
tOFF
VCOM = V+ or GND,
RL = 500 Ω,
CL = 50 pF,
See Figure 17
Output voltage
during
undershoot
VOUTU
See Figure 18
Output voltage
during
overshoot
VOUTO
See Figure 18
Break-beforemake time
tBBM
VNC = VNO = V+/2,
RL = 50 Ω,
CL = 50 pF,
See Figure 19
Charge
injection
QC
VGEN = 0,
RGEN = 0,
25°C
1.8 V
Full
1.65 V to
1.95 V
25°C
1.8 V
Full
1.65 V to
1.95 V
24
5.9
10
12
2.5
ns
VOH
– 0.3
ns
V
VOL
+ 0.3
2
18
50
V
25°C
1.8 V
0.5
Full
1.65 V to
1.95 V
0.5
CL = 0.1 nF,
See Figure 23
25°C
1.8 V
–5
pC
55
ns
NC, NO
OFF
capacitance
CNC(OFF),
CNO(OFF)
VNC or VNO = V+ or GND,
Switch OFF,
See Figure 16
25°C
1.8 V
5.5
pF
NC, NO
ON
capacitance
CNC(ON),
CNO(ON)
VNC or VNO = V+ or GND,
Switch ON,
See Figure 16
25°C
1.8 V
15.5
pF
COM
ON
capacitance
CCOM(ON)
VCOM = V+ or GND,
Switch ON,
See Figure 16
25°C
1.8 V
15.5
pF
Digital input
capacitance
CI
VI = V+ or GND,
See Figure 16
25°C
1.8 V
2.5
pF
Bandwidth
BW
RL = 50 Ω,
Switch ON,
See Figure 20
25°C
1.8 V
369
MHz
OFF isolation
OISO
RL = 50 Ω,
f = 10 MHz,
Switch OFF,
See Figure 21
25°C
1.8 V
–60
dB
Crosstalk
XTALK
RL = 50 Ω,
f = 10 MHz,
Switch ON,
See Figure 22
25°C
1.8 V
–60
dB
Total harmonic
distortion
THD
RL = 600 Ω,
CL = 50 pF,
f = 20 Hz to 20 kHz,
See Figure 24
25°C
1.8 V
0.4%
VI = V+ or GND,
Switch ON or OFF
Supply
Positive
supply current
12
I+
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25°C
Full
1.95 V
0.05
0.06
0.3
μA
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60
12
50
10
40
8
30
V+ = 1.8 V
20
2
0
0
1
2
3
VCOM (V)
Figure 1. ron vs VCOM
4
0
0.0
5
Leakage Current (nA)
85°C
8
7
ron (Ω)
6
25°C
5
4
–40°C
3
2
1
0
1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VCOM (V)
Figure 2. ron vs VCOM (V+ = 3 V)
9
0
–40°C
6
4
V+ = 2.5 V
V+ = 3.3 V V = 5 V
+
10
2
3
4
VCOM (V)
Figure 3. ron vs VCOM (V+ = 5 V)
0.00500
0.00450
0.00400
0.00350
0.00300
0.00250
0.00200
0.00150
0.00100
0.00050
0.00000
−0.00050
COM (ON)
NO/NC (OFF)
NO/NC (ON)
−40
5
25
85
TA (°C)
Figure 4. Leakage Current vs Temperature (V+ = 5.5 V)
14
20
V+ = 5 V
V+ = 3.3 V
V+ = 2.5 V
V+ = 1.8 V
10
tON
12
tON/tOFF (ns)
Charge Injection (pC)
85°C
25°C
ron (Ω)
ron (W)
6.9 Typical Characteristics
0
10
8
tOFF
6
4
−10
2
−20
0
0
1
2
3
4
5
Bias Voltage (V)
Figure 5. Charge Injection (QC) vs VCOM
6
0
1
2
Figure 6. tON
3
4
5
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V+ (V)
and tOFF vs Supply Voltage
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Typical Characteristics (continued)
2.5
Logic-Level Threshold (nA)
4
tON
3
tON/tOFF (ns)
tOFF
2
1
0
25
1.5
VIN Falling
1.0
0.5
85
0
TA (°C)
and tOFF vs Temperature (V+ = 5 V)
0
0
−1
−20
Attenuation (dB)
Gain (dB)
Figure 7. tON
−2
−3
−4
−5
−6
0.1
−40
2
3
4
5
V+ (V)
Figure 8. Logic-Level Threshold vs V+
6
Crosstalk
−60
OFF Isolation
−80
1
10
100
Frequency (MHz)
Figure 9. Bandwidth (V+ = 3.3 V)
−120
0.1
1000
250
0.062
200
0.060
150
0.058
1
10
100
1000
Frequency (MHz)
Figure 10. OFF Isolation and Crosstalk (V+ = 3.3 V)
0.064
100
50
0.056
0.054
10
1
−100
ICC+ (nA)
THD + (%)
VIN Rising
0.0
−40
1K
10K
100K
Frequency (Hz)
Figure 11. Total Harmonic Distortion (THD) vs Frequency
(V+ = 3.3 V)
14
2.0
100
0
−60
−40
−20
0
20
40
60
80
100
TA (°C)
Figure 12. Power-Supply Current vs Temperature (V+ = 5 V)
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7 Parameter Measurement Information
Table 1. Parameter Description
SYMBOL
VCOM
DESCRIPTION
Voltage at COM
VNC
Voltage at NC
VNO
Voltage at NO
ron
Resistance between COM and NC or COM and NO ports when the channel is ON
rpeak
Peak on-state resistance over a specified voltage range
Δron
Difference of ron between channels in a specific device
ron(flat)
INC(OFF)
INC(PWROFF)
INO(OFF)
INO(PWROFF)
Difference between the maximum and minimum value of ron in a channel over the specified range of conditions
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the OFF state
Leakage current measured at the NC port during the power-down condition, V+ = 0
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state
Leakage current measured at the NO port during the power-down condition, V+ = 0
INC(ON)
Leakage current measured at the NC port, with the corresponding channel (NC to COM) in the ON state and the output (COM) open
INO(ON)
Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output (COM) open
ICOM(ON)
Leakage current measured at the COM port, with the corresponding channel (COM to NO or COM to NC) in the ON state and the output
(NC or NO) open
ICOM(PWROFF)
Leakage current measured at the COM port during the power-down condition, V+ = 0
VIH
Minimum input voltage for logic high for the control input (IN)
VIL
Maximum input voltage for logic low for the control input (IN)
VI
Voltage at the control input (IN)
IIH, IIL
Leakage current measured at the control input (IN)
tON
Turn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagation delay between the
digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.
tOFF
Turn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagation delay between the
digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.
tBBM
Break-before-make time. This parameter is measured under the specified range of conditions and by the propagation delay between the
output of two adjacent analog channels (NC and NO) when the control signal changes state.
QC
Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM) output. This is
measured in coulomb (C) and measured by the total charge induced due to switching of the control input.Charge injection, QC = CL ×
ΔVCOM, CL is the load capacitance and ΔVCOM is the change in analog output voltage.
CNC(OFF)
Capacitance at the NC port when the corresponding channel (NC to COM) is OFF
CNO(OFF)
Capacitance at the NO port when the corresponding channel (NO to COM) is OFF
CNC(ON)
Capacitance at the NC port when the corresponding channel (NC to COM) is ON
CNO(ON)
Capacitance at the NO port when the corresponding channel (NO to COM) is ON
CCOM(ON)
Capacitance at the COM port when the corresponding channel (COM to NC or COM to NO) is ON
CI
Capacitance of control input (IN)
OISO
OFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific frequency, with the
corresponding channel (NC to COM or NO to COM) in the OFF state.
XTALK
Crosstalk is a measurement of unwanted signal coupling from an ON channel to an OFF channel (NC to NO or NO to NC). This is
measured in a specific frequency and in dB.
BW
Bandwidth of the switch. This is the frequency in which the gain of an ON channel is –3 dB below the DC gain.
THD
Total harmonic distortion is defined as the ratio of the root mean square (RMS) value of the second, third, and higher harmonics to the
magnitude of fundamental harmonic.
I+
Static power-supply current with the control (IN) pin at V+ or GND
VOUTU
Output voltage during an undershoot event. This is measured by turning off a specific channel and applying an undershoot voltage at the
input of the switch.
VOUTO
Output voltage during an overshoot event. This is measured by turning off a specific channel and applying an overshoot voltage at the
input of the switch.
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V+
VNC NC
COM
+
VNO
VCOM
Chann el O N
NO
V COM
r on
I COM
ICOM
VI
V NO or V NC
:
IN
VI
+
V IH or V IL
GND
Figure 13. ON-State Resistance (ron)
V+
VNC NC
COM
+
VNO
VCOM
+
OFF-State L eakage Current
NO
Chann el O FF
VI
IN
VI
+
V IH or V IL
GND
Figure 14. OFF-State Leakage Current
(INC(OFF), INC(PWROFF), INO(OFF), INO(PWROFF), ICOM(OFF), ICOM(PWROFF))
V+
VNC NC
COM
+
VNO
VCOM
ON-State L eakage Current
NO
Chann el O N
VI
+
VI
IN
V IH or V IL
GND
Figure 15. ON-State Leakage Current (ICOM(ON), INC(ON), INO(ON))
16
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V+
VNC NC
Capacitance
Meter
VNO NO
VBIAS
VCOM COM
IN
V BIAS
V
VI
or GND
V
or GND
Capacitance i s measured at NC,
NO, COM, and IN inp uts during
ON and OFF conditions.
VI
GND
Figure 16. Capacitance (CIN, CCOM(ON), CNC(OFF), CNO(OFF), CNC(ON), CNO(ON))
V+
2uV
S1
RL
Ope n
NC or NO
GND
VCOM
CL
COM
CL
VI
RL
NC or NO
RL
IN
Log ic
Input (1)
GND
V+
Log ic In put
(VIN)
50 %
50 %
0V
tPZL
Switch Ou tpu t
(VNC or VNO )
S1 at 2 x V +
tPLZ
VOH
50 %
VOL + 0.3 V
VOL
tPZH
tPHZ
VOH
Switch Ou tpu t
(VNC or VNO )
S1 at G ND
(1)
50 %
VOH ± 0.3 V
0V
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
Figure 17. Turn-On (tON) and Turn-Off (tOFF) Time
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V+
VTR
VNC or VNO
RL
NC or NO
Switch
Input
VCOM
NC or NO
COM
CL
RL
IN
VI
GND
Switch Input a nd Output for Un dershoot Test
Switch Input
VNC or VNO
(Ope n S ocket)
90 %
5.5 V
90 %
2 ns
10 %
2 ns
10 %
-2 V
20 ns
VOH
VOH ± 0.3
Switch Ou tpu t
(VOUTU)
Switch Input a nd Output for Overshoot Test
20 ns
Switch Input
VNC or VNO
(Ope n S ocket)
5.5 V
90 %
10 %
90 %
2 ns
2 ns
10 %
Switch Ou tpu t
(VOUTO)
-2 V
VOL + 0.3
VOL
Figure 18. Undershoot and Overshoot Test
V+
NC or NO
COM
NC or NO
VCOM
CL(2)
IN
V+
Log ic
Input
(VI)
VNC or VNO
RL
50 %
0
Switch
Output
(VCOM)
90 %
tBBM
VI
Log ic
Input (1)
GND
90 %
VNC or VNO = V+/2
RL = 50 Ÿ
CL = 35 pF
(1)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
(2)
CL includes probe and jig capacitance.
Figure 19. Break-Before-Make (tBBM) Time
18
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V+
Networ k Anal yzer
50
VNC
NC
VCOM
COM
Sou rce
Sign al
NO
Chann el O N: NC to COM
VI = V+ or GND
Networ k Anal yzer Setup
50 Ÿ
IN
VI
+
Sou rce Po we r = 0 dBm
(632-mV P-p at 50-Ÿ load)
GND
DC Bia s = 350 mV
Figure 20. Bandwidth (BW)
V+
Networ k Anal yzer
50
VNC
NC
COM
Sou rce
Sign al
50
VCOM
Chann el O FF: NC to COM
VI = V+ or GND
NO
Networ k Anal yzer Setup
IN
VI
50 Ÿ
+
Sou rce Po we r = 0 dBm
(632-mV P-p at 50-Ÿ load)
GND
DC Bia s = 350 mV
Figure 21. OFF Isolation (OISO)
Networ k Anal yzer
50
V+
VNC
NC
VNO
NO
VCOM
Sou rce
Sign al
VI
50 Ÿ
50 Ÿ
IN
+
GND
Chann el O N: NC to COM
Chann el O FF: NC to COM
VI = V+ or GND
Networ k Anal yzer Setup
Sou rce Po we r = 0 dBm
(632-mV P-p at 50-Ÿ load)
DC Bia s = 350 mV
Figure 22. Crosstalk (XTALK)
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V+
RGEN
Log ic
Input
(VI)
NC or NO
COM
VGEN
VCOM
NC or NO
VI
CL(2)
VIH
OFF
ON
OFF
VIL
ûVCOM
VCOM
IN
VGEN = 0 to V +
RGEN = 0
CL = 0.1 nF
QC = CL × ûVCOM
VI = VIH or VIL
Log ic
Input(1)
GND
(1)
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns,
tf < 5 ns.
(2)
CL includes probe and jig capacitance.
Figure 23. Charge Injection (QC)
V+/2
V+
Aud io A nalyze r
RL
NO
Sou rce
Sign al
NC
600
CL(1)
600 Ÿ
VI
IN
GND
600 Ÿ
(1)
CL includes probe and jig capacitance.
Figure 24. Total Harmonic Distortion (THD)
20
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8 Detailed Description
8.1 Overview
The TS5A63157 is a single-pole, double-throw (SPDT) analog switch designed to operate from 1.65 V to 5.5 V.
This device can handle both digital and analog signals. Signals up to V+ (peak) can be transmitted in either
direction.
8.2 Functional Block Diagram
TS5A63157
NO
COM
NC
IN
8.3 Feature Description
8.3.1 Integrated Overshoot and Undershoot Protection Circuitry
The TS5A63157 senses overshoot and undershoot events at the I/Os and responds by preventing voltage
differentials from developing and turning the switch on.
8.3.2 Isolation in Powered-Off Mode, V+ = 0 V
The TS5A63157 provides isolation when the supply voltage is removed (V+ = 0 V). When the TMUX1511 is
powered-off, the I/Os of the device remain in a high-Z state. Powered-off protection minimizes system complexity
by removing the need for power supply sequencing on the signal path.
8.3.3 Break-before-make
Break-before-make delay is a safety feature that prevents two inputs from connecting when the device is
switching. The output first breaks from the on-state switch before making the connection with the next on-state
switch. The time delay between the break and the make is known as break-before-make delay.
8.4 Device Functional Modes
Table 2. Function Table
NC TO COM,
COM TO NC
NO TO COM,
COM TO NO
L
ON
OFF
H
OFF
ON
IN
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TS5A63157 can be used in a variety of customer systems. The TS5A63157 can be used anywhere multiple
analog or digital signals must be selected to pass across a single line.
9.2 Typical Application
5V
V+
IN
NO
MCU or
System Logic
To/From
System
COM
GND
NC
Figure 25. System Schematic for TS5A63157
9.2.1 Design Requirements
In this particular application, V+ was 1.8 V, although V+ is allowed to be any voltage specified in . A decoupling
capacitor is recommended on the V+ pin. See for more details.
9.2.2 Detailed Design Procedure
In this application, IN is, by default, pulled low to GND. Choose the resistor size based on the current driving
strength of the GPIO, the desired power consumption, and the switching frequency (if applicable). If the GPIO is
open-drain, use pullup resistors instead.
9.2.3 Application Curve
9
85°C
8
7
ron (Ω)
6
25°C
5
4
–40°C
3
2
1
0
0
1
2
3
VCOM (V)
4
5
Figure 26. ron vs VCOM, V+ = 5 V
22
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TS5A63157
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SCDS203B – DECEMBER 2005 – REVISED MARCH 2019
10 Power Supply Recommendations
The power supply can be any voltage between the minimum and maximum supply voltage rating located in the .
Each VCC terminal should have a good bypass capacitor to prevent power disturbance. For devices with a single
supply, a 0.1-μF bypass capacitor is recommended. If there are multiple pins labeled VCC, then a 0.01-μF or
0.022-μF capacitor is recommended for each VCC because the VCC pins will be tied together internally. For
devices with dual supply pins operating at different voltages, for example VCC and VDD, a 0.1-µF bypass
capacitor is recommended for each supply pin. It is acceptable to parallel multiple bypass capacitors to reject
different frequencies of noise. 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor
should be installed as close to the power terminal as possible for best results.
11 Layout
11.1 Layout Guidelines
Reflections and matching are closely related to loop antenna theory, but different enough to warrant their own
discussion. When a PCB trace turns a corner at a 90° angle, a reflection can occur. This is primarily due to the
change of width of the trace. At the apex of the turn, the trace width is increased to 1.414 times its width. This
upsets the transmission line characteristics, especially the distributed capacitance and self–inductance of the
trace — resulting in the reflection. It is a given that not all PCB traces can be straight, and so they will have to
turn corners. Below figure shows progressively better techniques of rounding corners. Only the last example
maintains constant trace width and minimizes reflections.
Unused switch I/Os, such as NO, NC, and COM, can be left floating or tied to GND. However, the IN pin must be
driven high or low. Due to partial transistor turnon when control inputs are at threshold levels, floating control
inputs can cause increased ICC or unknown switch selection states.
11.2 Layout Example
BETTER
BEST
2W
WORST
1W min.
W
Figure 27. Trace Example
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
24
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TS5A63157DBVR
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU | SN
Level-1-260C-UNLIM
-40 to 85
(JBEF, JBER)
TS5A63157DBVRG4
ACTIVE
SOT-23
DBV
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
JBEF
TS5A63157DCKR
ACTIVE
SC70
DCK
6
3000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
(J75, J7F, J7R)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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