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TSSOP-VSSOP-ADAPTE

TSSOP-VSSOP-ADAPTE

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

  • 描述:

    UNPOPULATED EVALUATION MODULE FO

  • 数据手册
  • 价格&库存
TSSOP-VSSOP-ADAPTE 数据手册
www.ti.com Abstract User’s Guide TSSOP-VSSOP-ADAPTER-EVM Abstract This user's guide contains support documentation for the TSSOP-VSSOP-ADAPTER evaluation module (EVM). Included in this document is a description of how to use the EVM, the printed circuit board (PCB) layout, and the bill of materials (BOM) for the TSSOP-VSSOP-ADAPTER-EVM. SBOU290 – AUGUST 2022 Submit Document Feedback TSSOP-VSSOP-ADAPTER-EVM Copyright © 2022 Texas Instruments Incorporated 1 Table of Contents www.ti.com Table of Contents Abstract...................................................................................................................................................................................... 1 1 Introduction.............................................................................................................................................................................3 2 How to Use.............................................................................................................................................................................. 3 3 Adapter Options......................................................................................................................................................................4 3.1 A: SOT-23 (DCN/DDF).......................................................................................................................................................4 3.2 B: X2QFN (RUG) Low........................................................................................................................................................5 3.3 C: X2QFN (RUG) High.......................................................................................................................................................5 3.4 D: WSON (DSG)................................................................................................................................................................ 6 3.5 E: SC70 (DCK)...................................................................................................................................................................7 3.6 F: X2SON (DPW)............................................................................................................................................................... 7 3.7 G: SOT-5X3 (DRL)............................................................................................................................................................. 8 3.8 H: WSON (DSE).................................................................................................................................................................8 4 Layout...................................................................................................................................................................................... 9 5 Bill of Materials......................................................................................................................................................................11 List of Figures Figure 3-1. Dual TSSOP-VSSOP to SOT-23 (DCN/DDF)........................................................................................................... 4 Figure 3-2. Dual TSSOP-VSSOP to X2QFN (RUG) Low............................................................................................................ 5 Figure 3-3. Dual TSSOP-VSSOP to X2QFN (RUG) High........................................................................................................... 5 Figure 3-4. Dual TSSOP-VSSOP to WSON (DSG).....................................................................................................................6 Figure 3-5. Single VSSOP to WSON (DSG)................................................................................................................................6 Figure 3-6. Single VSSOP to SC70 (DCK).................................................................................................................................. 7 Figure 3-7. Single VSSOP to X2SON (DPW).............................................................................................................................. 7 Figure 3-8. Single VSSOP to SOT-5X3 (DRL).............................................................................................................................8 Figure 3-9. Single VSSOP to WSON (DSE)................................................................................................................................ 8 Figure 4-1. PCB Top Layer.......................................................................................................................................................... 9 Figure 4-2. PCB Bottom Layer...................................................................................................................................................10 List of Tables Table 3-1. Device Recommendations.......................................................................................................................................... 4 Table 5-1. Bill of Materials.......................................................................................................................................................... 11 Trademarks All trademarks are the property of their respective owners. 2 TSSOP-VSSOP-ADAPTER-EVM SBOU290 – AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Introduction 1 Introduction The TSSOP-VSSOP-ADAPTER-EVM allows for evaluation of 8 different packages onto single and dual-channel TSSOP-VSSOP 8-pin footprints of operational amplifiers on existing PCBs. This permits the user to test op amps in different packages without making changes to the existing PCB. 2 How to Use The TSSOP-VSSOP-ADAPTER-EVM comes depopulated. Devices must be ordered separately. To find a specific device in a specific package, use the Find Product by Package search tool. Solder the IC(s) to the adapter PCB. Parts may be hand soldered or attached with hot air reflow techniques. Gently flex panel at score lines to separate adapter boards. Position the adapter board carefully over the footprint and solder it on. SBOU290 – AUGUST 2022 Submit Document Feedback TSSOP-VSSOP-ADAPTER-EVM Copyright © 2022 Texas Instruments Incorporated 3 Adapter Options www.ti.com 3 Adapter Options The TSSOP-VSSOP-ADAPTER-EVM allows for numerous packages to be adapted to a TSSOP 8-pin or VSSOP 8-pin footprints. Each adapter option has a corresponding letter on the back of the PCB to help better identify them. Table 3-1 shows each corresponding board label, package designator, TI package designator, and pin count. Table 3-1. Device Recommendations Board Labeled on the Back Package Designator TI Package Designator Pin Count A SOT-23 DCN/DDF 8 B X2QFN RUG 10 C X2QFN RUG 10 D WSON DSG 8 E SC70 DCK 5/6 F X2SON DPW 5 G SOT-5X3 DRL 5/6 H WSON DSE 6 3.1 A: SOT-23 (DCN/DDF) As shown in Figure 3-1, a SOT-23 (DCN/DDF) device can be adapted to a dual-channel TSSOP-VSSOP footprint. OUT1 V+ OUT1 V+ IN1- IN1- OUT2 IN1+ IN1+ IN2- IN2- V- IN2+ IN2+ V- OUT2 Figure 3-1. Dual TSSOP-VSSOP to SOT-23 (DCN/DDF) 4 TSSOP-VSSOP-ADAPTER-EVM SBOU290 – AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Adapter Options 3.2 B: X2QFN (RUG) Low As shown in Figure 3-2, a X2QFN (RUG) device can be adapted to a dual-channel TSSOP-VSSOP footprint. The shutdown pins found on the X2QFN packages are all pulled low to V-. V+ OUT2 V+ IN1- OUT1 OUT1 To protect the integrity of the signals V+ and OUT1, vias are used to limit the traces being too close to the score line (breaking point). IN1- OUT2 IN1+ IN2- IN1+ IN2+ SD / V- V- SD / V- V- IN2IN2+ Figure 3-2. Dual TSSOP-VSSOP to X2QFN (RUG) Low 3.3 C: X2QFN (RUG) High As shown in Figure 3-3, a X2QFN (RUG) device can be adapted to a dual-channel TSSOP-VSSOP footprint. The shutdown pins found on the X2QFN packages are all pulled high to V+. V+ OUT2 V+ IN1- OUT1 OUT1 To protect the integrity of the signals V+ and OUT1, vias are used to limit the traces being too close to the score line (breaking point). IN1- OUT2 V- IN2IN2+ SD / V+ V- IN1+ IN2- SD / V+ IN1+ IN2+ Figure 3-3. Dual TSSOP-VSSOP to X2QFN (RUG) High SBOU290 – AUGUST 2022 Submit Document Feedback TSSOP-VSSOP-ADAPTER-EVM Copyright © 2022 Texas Instruments Incorporated 5 Adapter Options www.ti.com 3.4 D: WSON (DSG) The WSON (DSG) board can be used to adapt a dual-channel WSON (DSG) device to dual-channel TSSOPVSSOP footprint and a single-channel WSON (DSG) device to single-channel VSSOP footprint, as shown in Figure 3-4 and Figure 3-5 respectfully. For single-channel WSON (DSG) devices, both the shutdown (SD) and non-shutdown variants are supported. OUT1 IN1- OUT1 V+ IN1- OUT2 V+ OUT2 V- IN1+ IN1+ IN2- V- IN2+ V- IN2IN2+ Figure 3-4. Dual TSSOP-VSSOP to WSON (DSG) SD IN- IN- V+ SD V+ V- IN+ IN+ OUT OUT V- VFigure 3-5. Single VSSOP to WSON (DSG) 6 TSSOP-VSSOP-ADAPTER-EVM SBOU290 – AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Adapter Options 3.5 E: SC70 (DCK) As shown in Figure 3-6, a SC70 (DCK) device can be adapted to a single-channel VSSOP footprint. The 5-pin non-shutdown variant of the SC70 package can use this adapter. SD IN+ V+ V- SD IN- OUT IN- V+ IN+ OUT VFigure 3-6. Single VSSOP to SC70 (DCK) 3.6 F: X2SON (DPW) As shown in Figure 3-7, a X2SON (DPW) device can be adapted to a single-channel VSSOP footprint. IN- IN- OUT V+ V- IN+ IN+ V+ OUT VFigure 3-7. Single VSSOP to X2SON (DPW) SBOU290 – AUGUST 2022 Submit Document Feedback TSSOP-VSSOP-ADAPTER-EVM Copyright © 2022 Texas Instruments Incorporated 7 Adapter Options www.ti.com 3.7 G: SOT-5X3 (DRL) As shown in Figure 3-8, a SOT-5X3 (DRL) device can be adapted to a single-channel VSSOP footprint. The 5-pin non-shutdown variant of the SOT-5X3 package can use this adapter. SD ININ+ IN+ V+ V- SD IN- OUT V+ OUT VFigure 3-8. Single VSSOP to SOT-5X3 (DRL) 3.8 H: WSON (DSE) As shown in Figure 3-9, a WSON (DSE) device can be adapted to a single-channel VSSOP footprint. V+ IN- To protect the integrity of the signal V-, a via is used to limit the trace being too close to the score line (breaking point). OUT OUT IN+ V- V+ IN+ INVFigure 3-9. Single VSSOP to WSON (DSE) 8 TSSOP-VSSOP-ADAPTER-EVM SBOU290 – AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Layout 4 Layout Figure 4-1. PCB Top Layer SBOU290 – AUGUST 2022 Submit Document Feedback TSSOP-VSSOP-ADAPTER-EVM Copyright © 2022 Texas Instruments Incorporated 9 Layout www.ti.com Figure 4-2. PCB Bottom Layer 10 TSSOP-VSSOP-ADAPTER-EVM SBOU290 – AUGUST 2022 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated www.ti.com Bill of Materials 5 Bill of Materials Table 5-1. Bill of Materials Designator PCB Quantity 1 Description Printed-Circuit Board SBOU290 – AUGUST 2022 Submit Document Feedback Part Number TSSOP-VSSOP -ADAPTER-EVM TSSOP-VSSOP-ADAPTER-EVM Copyright © 2022 Texas Instruments Incorporated 11 IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated
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