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TWL6040
SWCS052B – AUGUST 2010 – REVISED AUGUST 2014
TWL6040 8-Channel Low-Power Audio Codec for Portable Applications
1 Device Overview
1.1
Features
• Four Audio Digital-to-Analog Converter (DAC)
Channels
• Stereo Capless Headphone Drivers:
– Up to 104-dB DR
– Power Tune for Performance and Power
Consumption Tradeoff
• Stereo 8 Ω, 1.5 W per Channel Speaker Drivers
• Differential Earpiece Driver
• Stereo Line-Out
• Two Audio Analog-to-Digital Converter (ADC)
Channels:
– 96-dBA SNR
• Four Audio Inputs:
– Three Differential Microphone Inputs
– Stereo Line-In and FM Input
• Two Vibrator and Haptics Feedback Channels:
– Differential H-Bridge Drivers
• Two Low-Noise Analog Microphone Bias Outputs
• Two Digital Microphone Bias Outputs
• Analog Low-Power Loop from Line-in to
Headphone and Speaker Outputs
1.2
•
•
Applications
Mobile and Smart Phones
MP3 Players
1.3
• Dual Phase-Locked Loops (PLLs) for Flexible
Clock Support:
– 32-kHz Sleep Clock Input for System LowPower Playback Mode
– 12-, 19.2-, 26-, and 38.4-MHz System Clock
Input
• Accessory Plug and Unplug Detection, Accessory
Button Press Detection
• Integrated Power Supplies:
– Negative Charge Pump for Capless Headphone
Driver
– Two Low Dropout Voltage Regulators (LDOs)
for High Power Supply Rejection Ratio (PSRR)
2
• I C Control
• Thermal Protection:
– Host Interrupt
• Power Supplies:
– Analog: 2.1 V
– Digital I/O: 1.8 V
– Battery: 2.3 to 5.5 V
• Package 6-mm × 6-mm 120-Pin PBGA
•
Handheld Devices
Description
The TWL6040 device is an audio coder/decoder (codec) with a high level of integration providing analog
audio codec functions for portable applications, as shown in Figure 1-1. The device contains multiple
audio analog inputs and outputs, as well as microphone biases and accessory detection. The device is
connected to the OMAP™ 4 host processor through a proprietary PDM interface for audio data
communication enabling partitioning with optimized power consumption and performance. Multichannel
audio data is multiplexed to a single wire for downlink (PDML) and uplink (PDMUL).
The OMAP4 device provides the TWL6040 device with five PDM audio-input channels (DL0–DL4).
Channels DL0–DL3 are connected to four parallel DAC channels multiplexed to stereo headphone (HSL,
HSR), stereo speaker (HFL, HFR), and earpiece (EAR) or stereo line outputs (AUXL, AUXR).
The stereo headphone path has a low-power (LP) mode operating from a 32-kHz sleep clock to enable
more than 100 hours of MP3 playback time. Very-high dynamic range of 104 dBA is achieved when using
the system clock input and DAC path high-performance (HP) mode. Class-AB headphone drivers provide
a 1-Vrms capability output and are ground centered for capless connection to a headphone, thus enabling
system size and cost reduction. The earpiece driver is a differential class-AB driver with 2 Vrms capability
to a typical 32-Ω load or 1.4 Vrms to a typical 16-Ω load.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCT PREVIEW Information. Product in design phase of
development. Subject to change or discontinuance without notice.
PRODUCT PREVIEW
1
TWL6040
SWCS052B – AUGUST 2010 – REVISED AUGUST 2014
www.ti.com
Stereo speaker path has filterless class-D outputs with 1.5-W capability per channel. Output power
maximization supply connections to an external boost is supported. Speaker drivers also support hearing
aid coil loads. For vibrator and haptic feedback support, the TWL6040 has two PWM channels with
independent input signals from DL4 or inter-integrated circuit (I2C).
Vibrator drivers are differential H-bridge outputs, enabling fast acceleration and deceleration of vibrator
motor. An external driver for a hearing aid coil or a piezo speaker requiring high voltage can be connected
to line outputs.
The TWL6040 supports three differential microphone inputs (MMIC, HMIC, and SMIC) and a stereo lineinput (AFML, AFMR) multiplexed to two parallel ADCs. The PDM output from the ADCs is transmitted to
the OMAP4 processor through UL0 and UL1. AFML, AFMR inputs can also be looped to analog outputs
(LB0, LB1).
Two LDOs provide a voltage of 2.1 V to bias analog microphones (MBIAS and HBIAS). The maximum
output current is 2 mA for each analog bias, allowing up to two microphones on one bias. Two LDOs
provide a voltage of 1.8 V/1.85 V to bias digital microphones (DBIAS1 and DBIAS2). One bias generator
can bias several digital microphones at the same time, with a total maximum output current of 10 mA.
PRODUCT PREVIEW
The TWL6040 has an integrated negative charge pump (NCP) and two LDOs (HS LDO and LS LDO) for
high PSRR. The only external supply needed is 2.1 V, which is available from the 2.1-V DC-DC of the
TWL6030 power-management IC (PMIC) in the OMAP4 system. By powering audio from low-noise 2.1-V
DC-DC of low power consumption, high dynamic range and high output swing at headset output are
achieved. All other supply inputs can be directly connected to battery or system 1.8-V I/O.
Two integrated PLLs enable operation from a 12-, 19.2-, 26-, and 38.4-MHz system clock (MCLK) or, in
LP playback mode, from a 32-kHz sleep clock (CLK32K). The frequency plan is based on a 48-kS/s audio
data rate for all channels, and host processor uses sample-rate converters to interface with different
sample rates (for example, 44.1 kHz). In the specific case of low-power audio playback, the TWL6040
supports the 44.1-kS/s and 48-kS/s rates. Transitions between sample rates or input clocks are seamless.
Accessory plug and unplug detections are supported (PLUGDET). Some headsets have a manual switch
for submitting send/end signal to the terminal through the microphone input pin. This feature is supported
by a periodic accessory button press detection to minimize current consumption in sleep mode. Detection
cycle properties can be programmed according to system requirements.
Table 1-1. Device Information (1)
PACKAGE
BODY SIZE (NOM)
TWL6040A2
PART NUMBER
ZQZ (120)
6.00 mm × 6.00 mm
TWL6040A3
ZQZ (120)
6.00 mm × 6.00 mm
(1)
2
For more information, see Section 3, Mechanical Packaging and Orderable Information.
Device Overview
Copyright © 2010–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TWL6040
TWL6040
www.ti.com
1.4
SWCS052B – AUGUST 2010 – REVISED AUGUST 2014
Functional Block Diagram
Figure 1-1 shows the system block diagram of the TWL6040 device.
HBIAS
HMBIAS
MBIAS
HMICP
HMICN
0:30 dB
MMBIAS
VDDUL
Uplink
VDDDMBIAS
DBIAS1
MMICN
ADCL
1
GNDAMIC
MMICP
MicAmpL
AAFL
VDDAMBIAS
VSSUL
MicAmpR
AAFR
DMBIAS1
GNDDMIC
ADCR
1
SMICP
SMICN
DBIAS2
DMBIAS2
0:30 dB
LineInAmpR
UL0
UL1
DL0
PDMUP
PDMCLK
PDM
interface
PDMCLKLB
SDA
SCL
AFMR
LineInAmpL
DL1
DL2
LB0
AFML
DL3
–18:24 dB
DL4
PDMFRAME
GPO1(2,3)
LB1
EarDrv
GNDVCM
PRODUCT PREVIEW
PDMDN
VDDEAR
EARP
Interface
EARN
–24:6 dB
HSLDrv
2
I C
registers
VSSEAR
HSL
PBKG
1
HSDACL
–30:0 dB
VDDV2V1
VDDLDO
HSRDrv
HSR
LS LDO
1
HSDACR
VDDDL
–30:0 dB
GNDLDO
AUXLN
CFLYP
CFLYN
Negative
charge
pump
AUXRP
Downlink
AUXRN
PGAL
NCPOUT
HFLDrv
NCPFB
VDDHFL
HFLP
Power
REF
REFP
REFN
VSSDL
AUXLP
VDDREGNCP
GNDNCP
VSSHS
GNDHS
HS LDO
VSSLDOIN
VSSLDO
VDDHS
1
Reference
temp
sense
HFLN
HFDACL
GNDHFL
–52:6 dB
PGAR
GNDREF
HFRDrv
VDDHFR
HFRP
PLUGDET
ACCONN
VDDVIO
Accessory
connector
detection
1
MCLK
1 PCM
8
8
HP PLL
PCM
to
PWM
8
CLK32K
VSSPLL
GNDHFR
–52:6 dB
PDM
to
VDDPLL
HFRN
HFDACR
VIBLDrv
VDDVIBL
VIBLP
1
VIBLN
1
GNDVIBL
LP PLL
Clock system
8
8
Osc
8
PCM
to
PWM
VIBRDrv
VDDVIBR
VIBRP
1
1
VIBRN
GNDVIBR
SWCS044-001
Figure 1-1. Simplified Block Diagram
Device Overview
Copyright © 2010–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TWL6040
3
TWL6040
SWCS052B – AUGUST 2010 – REVISED AUGUST 2014
www.ti.com
For the complete TWL60xx data sheet (SWCS044), contact your TI sales representative.
PRODUCT PREVIEW
4
Device Overview
Copyright © 2010–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TWL6040
TWL6040
www.ti.com
SWCS052B – AUGUST 2010 – REVISED AUGUST 2014
2 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (January 2012) to Revision B
Changed document to standard TI format
........................................................................................
1
PRODUCT PREVIEW
•
Page
Revision History
Copyright © 2010–2014, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: TWL6040
5
TWL6040
SWCS052B – AUGUST 2010 – REVISED AUGUST 2014
www.ti.com
3 Mechanical Packaging and Orderable Information
3.1
Packaging Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and
revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PRODUCT PREVIEW
6
Mechanical Packaging and Orderable Information
Submit Documentation Feedback
Product Folder Links: TWL6040
Copyright © 2010–2014, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
26-May-2021
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TWL6040A3ZBHR
ACTIVE
NFBGA
ZBH
120
2500
RoHS & Green
SNAGCU
Level-3-260C-168 HR
-40 to 85
6040A3ZBH
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of