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TXS0104E-Q1
SCES853C – NOVEMBER 2013 – REVISED JANUARY 2017
TXS0104E-Q1 4-Bit Bidirectional Voltage-Level Translator
for Open-Drain and Push-Pull Applications
1 Features
3 Description
•
•
The TXS0104E-Q1 device connects an incompatible
logic communication from chip-to-chip due to voltage
mismatch. This auto-direction translator can be
conveniently used to bridge the gap without the need
of direction control from the host. Each channel can
be mixed and matched with different output types
(open-drain or push-pull) and mixed data flows
(transmit or receive) without intervention from the
host. This 4-bit noninverting translator uses two
separate configurable power-supply rails. The A and
B ports are designed to track VCCA and VCCB
respectively. The VCCB pin accepts any supply
voltage from 2.3 V to 5.5 V while the VCCA pin
accepts any supply voltage from 1.65 V to 3.6 V such
that VCCA is less than or equal to VCCB. This tracking
allows for low-voltage bidirectional translation
between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V
voltage nodes.
1
•
•
•
•
•
•
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
– Device Temperature Grade 1: –40°C to
+125°C Ambient Operating Temperature
Range
– Device HBM ESD Classification Level 2
– Device CDM ESD Classification Level C6
No Direction-Control Signal Required
Maximum Data Rates
– 24 Mbps Maximum (Push Pull)
– 2 Mbps (Open Drain)
1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B
port (VCCA ≤ VCCB)
No Power-Supply Sequencing Required—VCCA or
VCCB Can Be Ramped First
ESD Protection Exceeds JESD 22
– A Port
– 2000-V Human-Body Model (A114-B)
– 1000-V Charged-Device Model (C101)
– B Port
– 15-kV Human-Body Model (A114-B)
– 1000-V Charged-Device Model (C101)
IEC 61000-4-2 ESD (B Port)
– ±8-kV Contact Discharge
– ±10-kV Air-Gap Discharge
2 Applications
•
•
The TXS0104E-Q1 device is designed so that the OE
input circuit is supplied by VCCA.
To ensure the high-impedance state during power up
or power down, the OE pin must be tied to the GND
pin through a pulldown resistor; the minimum value of
the resistor is determined by the current-sourcing
capability of the driver.
Device Information(1)
PART NUMBER
PACKAGE
TXS0104E-Q1
BODY SIZE (NOM)
TSSOP (14)
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Transfer Characteristics of an N-Channel
Transistor
Output Voltage (V)
•
Automotive infotainment, advance driver
assistance systems (ADAS)
Isolates and Level Translates Between Main
Processor and Peripheral Modules
I2C or 1-Wire Voltage-Level Translation
When the output-enable (OE) input is low, all outputs
are placed in the high-impedance state.
3.4
3.2
3
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
VGATE
4.3VV
VGATE ==4.3
VGATE
3.5VV
VGATE ==3.5
VGATE ==2.8
VGATE
2.8VV
VGATE ==2.5
VGATE
2.5VV
VGATE ==2.2
VGATE
2.2VV
0
1
2
3
Input Voltage (V)
4
5
C001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TXS0104E-Q1
SCES853C – NOVEMBER 2013 – REVISED JANUARY 2017
www.ti.com
Table of Contents
1
2
3
4
5
6
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
7
1
1
1
2
3
4
Absolute Maximum Ratings ..................................... 4
ESD Ratings.............................................................. 4
Recommended Operating Conditions....................... 4
Thermal Information .................................................. 5
Electrical Characteristics .......................................... 5
Timing Requirements—VCCA = 1.8 V ± 0.15 V ......... 6
Timing Requirements—VCCA = 2.5 V ± 0.2 V .......... 6
Timing Requirements—VCCA = 3.3 V ± 0.3 V ........... 6
Switching Characteristics—VCCA = 1.8 V ± 0.15 V ... 7
Switching Characteristics—VCCA = 2.5 V ± 0.2 V ... 8
Switching Characteristics—VCCA = 3.3 V ± 0.3 V . 10
Typical Characteristics .......................................... 11
Parameter Measurement Information ................ 12
7.1 Load Circuits ........................................................... 12
7.2 Voltage Waveforms................................................. 13
8
Detailed Description ............................................ 14
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
14
15
16
16
Application and Implementation ........................ 17
9.1 Application Information............................................ 17
9.2 Typical Application .................................................. 17
10 Power Supply Recommendations ..................... 18
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example .................................................... 19
12 Device and Documentation Support ................. 20
12.1
12.2
12.3
12.4
12.5
12.6
Documentation Support ........................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
20
13 Mechanical, Packaging, and Orderable
Information ........................................................... 20
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (May 2014) to Revision C
Page
•
Changed the type of the OE pin from output (O) to input (I) in the Pin Functions table ........................................................ 3
•
Moved Tstg back to the Absolute Maximum Ratings table and changed the Handling Ratings table to ESD Ratings........... 4
•
Added the Documentation Support, Receiving Notification of Documentation Updates, and Community Resources
sections ................................................................................................................................................................................ 20
Changes from Revision A (April 2014) to Revision B
•
2
Page
Changed device status from Product Preview to Production Data ........................................................................................ 1
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SCES853C – NOVEMBER 2013 – REVISED JANUARY 2017
5 Pin Configuration and Functions
PW Package
14-Pin TSSOP
Top View
VCCA
1
14
VCCB
A1
2
13
B1
A2
3
12
B2
A3
4
11
B3
A4
5
10
B4
NC
GND
6
9
7
8
NC
OE
NC - No internal connection
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
A1
2
I/O
Input-output 1 for the A port. This pin is referenced to VCCA.
A2
3
I/O
Input-output 2 for the A port. This pin is referenced to VCCA.
A3
4
I/O
Input-output 3 for the A port. This pin is referenced to VCCA.
A4
5
I/O
Input-output 4 for the A port. This pin is referenced to VCCA.
B1
13
I/O
Input-output 1 for the B port. This pin is referenced to VCCB.
B2
12
I/O
Input-output 2 for the B port. This pin is referenced to VCCB.
B3
11
I/O
Input-output 3 for the B port. This pin is referenced to VCCB.
B4
10
I/O
Input-output 4 for the B port. This pin is referenced to VCCB.
GND
7
—
Ground
—
No connection
NC
6
9
8
I
Tri-state output-mode enable. Pull the OE pin low to place all outputs in tri-state mode. This pin is
referenced to VCCA.
VCCA
1
I
A-port supply voltage. 1.65 V ≤ VCCA ≤ 3.6 V and VCCA ≤ VCCB.
VCCB
14
I
B-port supply voltage. 2.3 V ≤ VCCB ≤ 5.5 V.
OE
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SCES853C – NOVEMBER 2013 – REVISED JANUARY 2017
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Supply voltage
Input-output pin voltage, VIO
(2)
MIN
MAX
VCCA
–0.5
4.6
VCCB
–0.5
6.5
UNIT
V
A1, A2, A3, A4
A port
–0.5
4.6
B1, B2, B3, B4
B port
–0.5
6.5
Voltage range applied to any output in the highimpedance or power-off state (2)
A port
–0.5
4.6
B port
–0.5
6.5
Voltage range applied to any output in the high or
low state (2) (3)
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
Output voltage, VO
V
V
V
Input clamp current, IIK
VI < 0
–50
mA
Output clamp current, IOK
VO < 0
–50
mA
±50
mA
±100
mA
150
°C
Continuous output current, IO
Continuous current through each VCCA, VCCB, or GND
Storage temperature range, Tstg
(1)
(2)
(3)
–65
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCCA and VCCB are provided in the recommended operating conditions table.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002
(1)
Charged-device model (CDM), per AEC Q100-011
UNIT
±2500
V
±1500
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCCA
Supply voltage (1)
VCCA
1.65
3.6
VCCB
Supply voltage (1)
2.3
5.5
VIH(Ax)
High-level input voltage
A-port I/Os
VCCA – 0.2
VCCA
VCCA – 0.4
VCCA
VIH(Bx)
High-level input voltage
B-port I/Os
VCCB – 0.4
VCCB
VIH(OE)
High-level input voltage
OE input
VCCA × 0.65
5.5
VIL(Ax)
Low-level input voltage
A-port I/Os
0
0.15
VIL(Bx)
Low-level input voltage
B-port I/Os
VIL(OE)
Low-level input voltage
OE input
Δt/Δv(Ax)
Input transition rise or fall rate
A-port I/Os,
push-pull driving
Δt/Δv(Bx)
Input transition rise or fall rate
B-port I/Os,
push-pull driving
Δt/Δv(OE)
Input transition rise or fall rate
OE input
TA
Operating free-air temperature
(1)
4
1.65 to 1.95 V
2.3 to 3.6 V
VCCB
2.3 to 5.5 V
1.65 to 3.6 V
2.3 to 5.5 V
1.65 to 3.6 V
2.3 to 5.5 V
0
0.15
0
VCCA × 0.35
UNIT
V
V
V
10
1.65 to 3.6 V
2.3 to 5.5 V
10
ns/V
10
–40
125
°C
VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
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SCES853C – NOVEMBER 2013 – REVISED JANUARY 2017
6.4 Thermal Information
over operating free-air temperature range (unless otherwise noted)
TXS0104E-Q1
THERMAL METRIC
(1)
PW (TSSOP)
UNIT
14 PINS
RθJA
Junction-to-ambient thermal resistance
120.1
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
49.1
°C/W
RθJB
Junction-to-board thermal resistance
61.8
°C/W
ψJT
Junction-to-top characterization parameter
6.2
°C/W
ψJB
Junction-to-board characterization parameter
61.2
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
(1)
VCCA
VCCB
VOH(Ax)
High-level output voltage,
A port
IOH = –20 μA,
VI(Bx) ≥ VCCB – 0.4 V
MIN
TYP
1.65 to 3.6 V
2.3 to 5.5 V
VOL(Ax)
Low-level output voltage,
A port
IOL = 1 mA,
VI(Bx) ≤ 0.15 V
1.65 to 3.6 V
2.3 to 5.5 V
VOH(Bx)
High-level output voltage,
B port
IOH = –20 μA,
VI(Ax) ≥ VCCA – 0.2 V
1.65 to 3.6 V
2.3 to 5.5 V
VOL(Bx)
Low-level output voltage,
B port
IOL = 1 mA,
VI(Ax) ≤ 0.15 V
1.65 to 3.6 V
2.3 to 5.5 V
II(OE)
Input current, OE
1.65 to 3.6 V
2.3 to 5.5 V
IOZ
OE = VIL
Off-state output current, A or
OE = VIL,
B port
TA = 25°C
1.65 to 3.6 V
2.3 to 5.5 V
1.65 to VCCB
2.3 to 5.5 V
ICCA
Supply current, A port
3.6 V
0
2.2
0
5.5 V
–1
1.65 to VCCB
2.3 to 5.5 V
21
3.6 V
0
–1
0
5.5 V
5
1.65 V to VCCB
2.3 to 5.5 V
25
3.3 V
3.3 V
VCCA × 0.75
ICCB
Supply current, B port
ICCA+ICCB
Supply current, A port plus
B port supply current
CI(OE)
Input capacitance, OE
0.4
VCCB × 0.75
CIO(Ax)
Input-output capacitance, A
port
CIO(Bx)
Input-output capacitance, B
port
(1)
V
V
0.4
V
±2
±1
μA
±3
VI = VO = Open,
IO = 0
VI = VO = Open,
IO = 0
VI = VO = Open,
IO = 0
TA = 25°C
UNIT
V
VI = VCCI or GND
VI = VCCI or GND,
TA = 25°C
MAX
±1
μA
4
4
2.5
μA
μA
μA
pF
6.5
TA = 25°C
3.3 V
TA = 25°C
3.3 V
5
16.5
pF
12
VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
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6.6 Timing Requirements—VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
Push-pull driving
Data rate
Open-drain driving
VCCB = 2.5 V ± 0.2 V
18
VCCB = 3.3 V ± 0.3 V
21
VCCB = 5 V ± 0.5 V
23
VCCB = 2.5 V ± 0.2 V
2
VCCB = 3.3 V ± 0.3 V
2
VCCB = 5 V ± 0.5 V
Push-pull driving
tw
Pulse duration, data
inputs
See Figure 7
UNIT
Mbps
2
VCCB = 2.5 V ± 0.2 V
55
VCCB = 3.3 V ± 0.3 V
47
VCCB = 5 V ± 0.5 V
Open-drain driving
MAX
43
VCCB = 2.5 V ± 0.2 V
500
VCCB = 3.3 V ± 0.3 V
500
VCCB = 5 V ± 0.5 V
500
ns
6.7 Timing Requirements—VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
Push-pull driving
Data rate
Open-drain driving
VCCB = 2.5 V ± 0.2 V
20
VCCB = 3.3 V ± 0.3 V
22
VCCB = 5 V ± 0.5 V
24
VCCB = 2.5 V ± 0.2 V
2
VCCB = 3.3 V ± 0.3 V
2
VCCB = 5 V ± 0.5 V
Push-pull driving
tw
Pulse duration, data
inputs
See Figure 7
UNIT
Mbps
2
VCCB = 2.5 V ± 0.2 V
50
VCCB = 3.3 V ± 0.3 V
45
VCCB = 5 V ± 0.5 V
Open-drain driving
MAX
41
VCCB = 2.5 V ± 0.2 V
500
VCCB = 3.3 V ± 0.3 V
500
VCCB = 5 V ± 0.5 V
500
ns
6.8 Timing Requirements—VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted)
MIN
Push-pull driving
Data rate
Open-drain driving
tw
6
Pulse duration, Data
inputs
See Figure 7
Push-pull driving
Open-drain driving
MAX
VCCB = 3.3 V ± 0.3 V
22
VCCB = 5 V ± 0.5 V
24
VCCB = 3.3 V ± 0.3 V
2
VCCB = 5 V ± 0.5 V
Mbps
2
VCCB = 3.3 V ± 0.3 V
45
VCCB = 5 V ± 0.5 V
41
VCCB = 3.3 V ± 0.3 V
500
VCCB = 5 V ± 0.5 V
500
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UNIT
ns
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6.9 Switching Characteristics—VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Push-pull driving
tPHL(A-B)
Propagation delay time (high to low), from
A (input) to B (output)
See Figure 8
Open-drain driving
Push-pull driving
tPHL(B-A)
Propagation delay time (high to low), from
B (input) to A (output)
See Figure 8
Open-drain driving
MIN
6
VCCB = 3.3 V ± 0.3 V
5.8
VCCB = 5 V ± 0.5 V
5.8
VCCB = 2.5 V ± 0.2 V
8.8
VCCB = 3.3 V ± 0.3 V
9.6
VCCB = 5 V ± 0.5 V
10
VCCB = 2.5 V ± 0.2 V
4.4
VCCB = 3.3 V ± 0.3 V
4.5
VCCB = 5 V ± 0.5 V
4.7
VCCB = 2.5 V ± 0.2 V
5.3
VCCB = 3.3 V ± 0.3 V
4.4
VCCB = 5 V ± 0.5 V
Push-pull driving
tPLH(A-B)
Propagation delay time (low to high), from
A (input) to B (output)
See Figure 8
Push-pull driving
tPLH(B-A)
Propagation delay time (low to high), from
B (input) to A (output)
See Figure 8
Open-drain driving
7.7
VCCB = 3.3 V ± 0.3 V
6.8
tdis(OE-A)
tdis(OE-B)
Enable time, from OE (input) to A
or B (output)
Disable time, from OE (input) to A
or B (output)
50
VCCB = 3.3 V ± 0.3 V
26
VCCB = 5 V ± 0.5 V
33
VCCB = 2.5 V ± 0.2 V
5.3
VCCB = 3.3 V ± 0.3 V
4.5
VCCB = 5 V ± 0.5 V
0.5
VCCB = 2.5 V ± 0.2 V
36
VCCB = 3.3 V ± 0.3 V
16
tr(Ax)
200
VCCB = 3.3 V ± 0.3 V
200
VCCB = 5 V ± 0.5 V
200
VCCB = 2.5 V ± 0.2 V
200
VCCB = 3.3 V ± 0.3 V
200
VCCB = 5 V ± 0.5 V
200
Open-drain driving
Push-pull driving
tr(Bx)
VCCB = 2.5 V ± 0.2 V
9.5
VCCB = 3.3 V ± 0.3 V
9.3
VCCB = 5 V ± 0.5 V
Rise time, A port
15
VCCB = 2.5 V ± 0.2 V
38
199
VCCB = 3.3 V ± 0.3 V
30
150
VCCB = 5 V ± 0.5 V
22
Open-drain driving
10.8
VCCB = 3.3 V ± 0.3 V
9.1
7.6
VCCB = 2.5 V ± 0.2 V
34
186
VCCB = 3.3 V ± 0.3 V
23
112
VCCB = 5 V ± 0.5 V
10
58
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ns
ns
ns
109
VCCB = 2.5 V ± 0.2 V
VCCB = 5 V ± 0.5 V
Rise time, B port
ns
20
VCCB = 2.5 V ± 0.2 V
Push-pull driving
ns
7
VCCB = 2.5 V ± 0.2 V
VCCB = 5 V ± 0.5 V
ten(OE-A)
ten(OE-B)
UNIT
4
VCCB = 2.5 V ± 0.2 V
VCCB = 5 V ± 0.5 V
Open-drain driving
MAX
VCCB = 2.5 V ± 0.2 V
ns
7
TXS0104E-Q1
SCES853C – NOVEMBER 2013 – REVISED JANUARY 2017
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Switching Characteristics—VCCA = 1.8 V ± 0.15 V (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
VCCB = 2.5 V ± 0.2 V
Push-pull driving
tf(Ax)
Push-pull driving
tf(Bx)
Channel-to-channel skew
13.3
VCCB = 2.5 V ± 0.2 V
6.9
VCCB = 3.3 V ± 0.3 V
6.4
VCCB = 5 V ± 0.5 V
6.1
VCCB = 2.5 V ± 0.2 V
7.6
VCCB = 3.3 V ± 0.3 V
7.5
VCCB = 5 V ± 0.5 V
Fall time, B port
Open-drain driving
tsk
6
VCCB = 5 V ± 0.5 V
Open-drain driving
13.8
VCCB = 3.3 V ± 0.3 V
16.2
VCCB = 5 V ± 0.5 V
16.2
1
VCCB = 3.3 V ± 0.3 V
1
VCCB = 5 V ± 0.5 V
1
Maximum data rate
Open-drain driving
ns
8.8
VCCB = 2.5 V ± 0.2 V
VCCB = 2.5 V ± 0.2 V
Push-pull driving
UNIT
5.9
VCCB = 3.3 V ± 0.3 V
Fall time, A port
MAX
VCCB = 2.5 V ± 0.2 V
18
VCCB = 3.3 V ± 0.3 V
21
VCCB = 5 V ± 0.5 V
23
VCCB = 2.5 V ± 0.2 V
2
VCCB = 3.3 V ± 0.3 V
2
VCCB = 5 V ± 0.5 V
2
ns
Mbps
6.10 Switching Characteristics—VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Push-pull driving
tPHL(A-B)
Propagation delay time (high to low), from
A (input) to B (output)
See Figure 8
Open-drain driving
MIN
3.2
VCCB = 3.3 V ± 0.3 V
3.3
VCCB = 5 V ± 0.5 V
3.4
VCCB = 2.5 V ± 0.2 V
6.3
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Push-pull driving
tPHL(B-A)
Propagation delay time (high to low), from
B (input) to A (output)
See Figure 8
Open-drain driving
Push-pull driving
tPLH(A-B)
Open-drain driving
Push-pull driving
tPLH(B-A)
Propagation delay time (low to high), from
B (input) to A (output)
See Figure 8
Open-drain driving
3
VCCB = 3.3 V ± 0.3 V
3.6
VCCB = 5 V ± 0.5 V
4.3
VCCB = 2.5 V ± 0.2 V
4.7
VCCB = 3.3 V ± 0.3 V
4.2
8
3.5
VCCB = 3.3 V ± 0.3 V
4.1
VCCB = 5 V ± 0.5 V
4.4
VCCB = 2.5 V ± 0.2 V
3.5
VCCB = 3.3 V ± 0.3 V
4.1
VCCB = 5 V ± 0.5 V
4.4
VCCB = 2.5 V ± 0.2 V
2.5
VCCB = 3.3 V ± 0.3 V
1.6
VCCB = 5 V ± 0.5 V
0.7
VCCB = 2.5 V ± 0.2 V
2.5
VCCB = 3.3 V ± 0.3 V
1.6
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ns
4
VCCB = 2.5 V ± 0.2 V
VCCB = 5 V ± 0.5 V
UNIT
6
5.8
VCCB = 2.5 V ± 0.2 V
VCCB = 5 V ± 0.5 V
Propagation delay time (low to high), from
A (input) to B (output)
See Figure 8
MAX
VCCB = 2.5 V ± 0.2 V
ns
1
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Switching Characteristics—VCCA = 2.5 V ± 0.2 V (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
ten(OE-A)
ten(OE-B)
tdis(OE-A)
tdis(OE-B)
Enable time, from OE (input) to A or B
(output)
Disable time, from OE (input) to A or B
(output)
TEST CONDITIONS
VCCB = 3.3 V ± 0.3 V
200
VCCB = 5 V ± 0.5 V
200
VCCB = 2.5 V ± 0.2 V
200
VCCB = 3.3 V ± 0.3 V
200
VCCB = 5 V ± 0.5 V
200
Push-pull driving
Rise time, B port
Push-pull driving
Fall time, A port
6.6
5.6
VCCB = 2.5 V ± 0.2 V
34
180
VCCB = 3.3 V ± 0.3 V
28
150
VCCB = 5 V ± 0.5 V
24
105
VCCB = 2.5 V ± 0.2 V
8.3
VCCB = 3.3 V ± 0.3 V
7.2
6.1
VCCB = 2.5 V ± 0.2 V
35
170
VCCB = 3.3 V ± 0.3 V
24
120
VCCB = 5 V ± 0.5 V
12
Push-pull driving
Fall time, B port
Open-drain driving
5.7
VCCB = 3.3 V ± 0.3 V
5.5
VCCB = 5 V ± 0.5 V
5.3
Channel-to-channel skew
VCCB = 5 V ± 0.5 V
5.8
VCCB = 2.5 V ± 0.2 V
7.8
VCCB = 3.3 V ± 0.3 V
6.7
VCCB = 5 V ± 0.5 V
6.6
VCCB = 2.5 V ± 0.2 V
8.8
VCCB = 3.3 V ± 0.3 V
1
1
VCCB = 5 V ± 0.5 V
1
Open-drain driving
ns
ns
ns
VCCB = 2.5 V ± 0.2 V
20
VCCB = 3.3 V ± 0.3 V
22
VCCB = 5 V ± 0.5 V
24
VCCB = 2.5 V ± 0.2 V
2
VCCB = 3.3 V ± 0.3 V
2
VCCB = 5 V ± 0.5 V
2
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ns
9.4
VCCB = 3.3 V ± 0.3 V
Maximum data rate
ns
10.4
VCCB = 2.5 V ± 0.2 V
Push-pull driving
ns
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
tsk
UNIT
64
VCCB = 2.5 V ± 0.2 V
VCCB = 2.5 V ± 0.2 V
Open-drain driving
tf(Bx)
7.4
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
Open-drain driving
tf(Ax)
VCCB = 2.5 V ± 0.2 V
VCCB = 5 V ± 0.5 V
Rise time, A port
Open-drain driving
tr(Bx)
MAX
200
Push-pull driving
tr(Ax)
MIN
VCCB = 2.5 V ± 0.2 V
ns
Mbps
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6.11 Switching Characteristics—VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
Propagation delay time (high to low),
tPHL(A-B) from A (input) to B (output)
See Figure 8
Propagation delay time (high to low),
tPHL(B-A) from B (input) to A (output)
See Figure 8
Propagation delay time (low to high),
tPLH(A-B) from A (input) to B (output)
See Figure 8
Propagation delay time (low to high),
tPLH(B-A) from B (input) to A (output)
See Figure 8
TEST CONDITIONS
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
Push-pull driving
Open-drain driving
MIN
MAX
VCCB = 3.3 V ± 0.3 V
2.4
VCCB = 5 V ± 0.5 V
3.1
VCCB = 3.3 V ± 0.3 V
4.2
VCCB = 5 V ± 0.5 V
4.6
VCCB = 3.3 V ± 0.3 V
2.5
VCCB = 5 V ± 0.5 V
3.3
VCCB = 3.3 V ± 0.3 V
124
VCCB = 5 V ± 0.5 V
97
VCCB = 3.3 V ± 0.3 V
4.2
VCCB = 5 V ± 0.5 V
4.4
VCCB = 3.3 V ± 0.3 V
4.2
VCCB = 5 V ± 0.5 V
4.4
VCCB = 3.3 V ± 0.3 V
2.5
VCCB = 5 V ± 0.5 V
2.6
VCCB = 3.3 V ± 0.3 V
2.5
VCCB = 5 V ± 0.5 V
VCCB = 3.3 V ± 0.3 V
200
VCCB = 5 V ± 0.5 V
200
tdis(OE-A) Disable time,from OE (input) to A or B
tdis(OE-B) (output)
VCCB = 3.3 V ± 0.3 V
200
VCCB = 5 V ± 0.5 V
200
Push-pull driving
tr(Ax)
Rise time, A port
Open-drain driving
Push-pull driving
tr(Bx)
Rise time, B port
Open-drain driving
Push-pull driving
tf(Ax)
Fall time, A port
Open-drain driving
Push-pull driving
tf(Bx)
Fall time, B port
Open-drain driving
tsk
Channel-to-channel skew
5
VCCB = 3.3 V ± 0.3 V
25
140
VCCB = 5 V ± 0.5 V
19
102
VCCB = 3.3 V ± 0.3 V
7.4
VCCB = 3.3 V ± 0.3 V
26
VCCB = 5 V ± 0.5 V
14
VCCB = 3.3 V ± 0.3 V
ns
ns
130
ns
75
5.4
VCCB = 5 V ± 0.5 V
5
VCCB = 3.3 V ± 0.3 V
6.1
VCCB = 5 V ± 0.5 V
5.7
VCCB = 3.3 V ± 0.3 V
7.4
VCCB = 5 V ± 0.5 V
7.6
VCCB = 3.3 V ± 0.3 V
7.6
VCCB = 5 V ± 0.5 V
8.3
1
VCCB = 3.3 V ± 0.3 V
22
VCCB = 5 V ± 0.5 V
24
VCCB = 3.3 V ± 0.3 V
2
VCCB = 5 V ± 0.5 V
2
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ns
6.4
VCCB = 5 V ± 0.5 V
1
Open-drain driving
ns
5.6
VCCB = 5 V ± 0.5 V
VCCB = 5 V ± 0.5 V
Maximum data rate
10
VCCB = 3.3 V ± 0.3 V
VCCB = 3.3 V ± 0.3 V
Push-pull driving
ns
3.3
Enable time, from OE (input) to A or B
(output)
ten(OE-A)
ten(OE-B)
UNIT
ns
ns
ns
Mbps
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700
700
600
600
Low-Level Output Voltage (mV)
Low-Level Output Voltage (mV)
6.12 Typical Characteristics
500
400
300
200
VCCB = 2.7 V
VCCB = 3.3 V
VCCB = 5 V
100
500
400
300
200
100
VCCB = 3.3 V
VCCB = 5 V
0
0
0
2
4
VCCA = 1.8 V
6
8
10
12
14
Low-Level Current (mA)
16
18
20
0
2
4
D001
VIL(A) = 150 mV
6
8
10
12
14
Low-Level Current (mA)
VCCA = 2.7 V
Figure 1. Low-Level Output Voltage (VOL(Ax))
vs Low-Level Current (IOL(Ax))
16
18
20
D003
VIL(A) = 150 mV
Figure 2. Low-Level Output Voltage (VOL(Ax))
vs Low-Level Current (IOL(Ax))
Low-Level Output Voltage (mV)
700
600
500
400
300
200
100
VCCB = 3.3 V
0
0
2
4
6
8
10
12
14
Low-Level Current (mA)
VCCA = 3.3 V
16
18
20
D002
VIL(A) = 150 mV
Figure 3. Low-Level Output Voltage (VOL(Ax)) vs Low-Level Current (IOL(Ax))
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7 Parameter Measurement Information
7.1 Load Circuits
VCCI
VCCI
VCCO
VCCO
DUT
DUT
IN
IN
OUT
15 pF
OUT
15 pF
1M
Figure 4. Data Rate, Pulse Duration, Propagation
Delay, Output Rise-Time and Fall-Time
Measurement Using a Push-Pull Driver
1M
Figure 5. Data Rate, Pulse Duration, Propagation
Delay, Output Rise-Time and Fall-Time
Measurement Using an Open-Drain Driver
2 × VCCO
50 k
From Output
Under Test
15 pF
S1
Open
50 k
TEST
S1
tPZL / tPLZ
(tdis)
2 × VCCO
tPHZ / tPZH
(ten)
Open
Figure 6. Load Circuit for Enable-Time and Disable-Time Measurement
1.
2.
3.
4.
12
tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
VCCI is the VCC associated with the input port.
VCCO is the VCC associated with the output port.
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7.2 Voltage Waveforms
tw
VCCI
Input
VCCI
VCCI / 2
VCCI / 2
0V
Input
VCCI / 2
VCCI / 2
tPLH
0V
tPHL
VCCO / 2
Output
0.1 × VCCO
tr
Figure 7. Pulse Duration
0.9 × VCCO
VOH
VCCO / 2
VOL
tf
Figure 8. Propagation Delay Times
1.
CL includes probe and jig capacitance.
2.
Waveform 1 in Figure 9 is for an output with internal such that the output is high, except when OE is high (see
Figure 6). Waveform 2 in Figure 9 is for an output with conditions such that the output is low, except when OE is
high.
3.
All input pulses are supplied by generators having the following characteristics: PRR≤ 10 MHz, ZO = 50 Ω, dv/dt
≥ 1 V/ns.
4.
The outputs are measured one at a time, with one transition per measurement.
5.
tPLZ and tPHZ are the same as tdis.
6.
tPZL and tPZH are the same as ten.
7.
tPLH and tPHL are the same as tpd.
8.
VCCI is the VCC associated with the input port.
9.
VCCO is the VCC associated with the output port.
VCCA
VCCA / 2
OE input
VCCA / 2
0V
tPLZ
tPZL
VOH
Output
Waveform 1
S1 at 2 × VCCO
VCCO / 2
VOH × 0.1
(see Note 2)
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note 2)
VOL
VOH × 0.9
VOH
VCCO / 2
0V
Figure 9. Enable and Disable Times
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8 Detailed Description
8.1 Overview
The TXS0104E-Q1 device is a directionless voltage-level translator specifically designed for translating logic
voltage levels. The A port is able to accept I/O voltages ranging from 1.65 V to 3.6 V, while the B port can accept
I/O voltages from 2.3 V to 5.5 V. The device is a pass gate architecture with edge rate accelerators (one shots)
to improve the overall data rate. 10-kΩ pullup resistors, commonly used in open drain applications, have been
conveniently integrated so that an external resistor is not needed. While this device is designed for open drain
applications, the device can also translate push-pull CMOS logic outputs.
14
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8.2 Functional Block Diagram
VCCA
VCCB
OE
One-Shot
Accelerator
One-Shot
Accelerator
Gate Bias
10 k
10 k
A
B
One-Shot
Accelerator
One-Shot
Accelerator
Gate Bias
10 k
10 k
A
B
One-Shot
Accelerator
One-Shot
Accelerator
Gate Bias
10 k
10 k
A
B
One-Shot
Accelerator
10 k
One-Shot
Accelerator
Gate Bias
A
10 k
B
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8.3 Feature Description
8.3.1 Architecture
The TXS0104E-Q1 architecture (see Figure 10) does not require a direction-control signal in order to control the
direction of data flow from A to B or from B to A.
VCCB
VCCA
T1
One-shot
One-shot
T2
10 kΩ
10 kΩ
Gate Bias
A
B
Figure 10. Architecture of a TXS01xx Cell
Each A-port I/O has an internal 10-kΩ pullup resistor to VCCA, and each B-port I/O has an internal 10-kΩ pullup
resistor to VCCB. The output one-shots detect rising edges on the A or B ports. During a rising edge, the one-shot
turns on the PMOS transistors (T1, T2) for a short duration which speeds up the low-to-high transition.
8.3.2 Input Driver Requirements
The fall time (tfA, tfB) of a signal depends on the output impedance of the external device driving the data I/Os of
the TXS0104E-Q1 device. Similarly, the tPHL and maximum data rates also depend on the output impedance of
the external driver. The values for tfA, tfB, tPHL, and maximum data rates in the data sheet assume that the output
impedance of the external driver is less than 50 Ω.
8.3.3 Power Up
During operation, ensure that VCCA ≤ VCCB at all times. During power-up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be ramped up first.
8.3.4 Enable and Disable
The TXS0104E-Q1 device has an OE input that disables the device by setting OE low, which places all I/Os in
the high-impedance state. The disable time (tdis) indicates the delay between the time when the OE pin goes low
and when the outputs actually enter the high-impedance state. The enable time (ten) indicates the amount of time
the user must allow for the one-shot circuitry to become operational after the OE pin is taken high.
8.3.5 Pullup and Pulldown Resistors on I/O Lines
Each A-port I/O has an internal 10-kΩ pullup resistor to VCCA, and each B-port I/O has an internal 10-kΩ pullup
resistor to VCCB. If a smaller value of pullup resistor is required, an external resistor must be added from the I/O
to VCCA or VCCB (in parallel with the internal 10-kΩ resistors).
8.4 Device Functional Modes
The TXS0104E-Q1 device has two functional modes, enabled and disabled. To disable the device set the OE
input low, which places all I/Os in a high impedance state. Setting the OE input high will enable the device.
16
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9 Application and Implementation
9.1 Application Information
The TXS0104E-Q1 device can be used in level-translation applications for interfacing devices or systems
operating at different interface voltages with one another. The TXS0104E-Q1 device is ideal for use in
applications where an open-drain driver is connected to the data I/Os. The TXS0104E-Q1 device can also be
used in applications where a push-pull driver is connected to the data I/Os, but the TXB0104-Q1 device might be
a better option for such push-pull applications.
9.2 Typical Application
1.8 V
3.3 V
0.1 µF
VCCA
0.1 µF
VCCB
OE
1.8-V
System
Controller
TXS0104E-Q1
A1
A2
A3
A4
Data
GND
B1
B2
B3
B4
3.3-V
System
Data
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Figure 11. Application Schematic
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
1.65 to 3.6 V
Output voltage range
2.3 to 5.5 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
– Use the supply voltage of the device that is driving the TXS0104E-Q1 device to determine the input
voltage range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low
the value must be less than the VIL of the input port.
• Output voltage range
– Use the supply voltage of the device that the TXS0104E-Q1 device is driving to determine the output
voltage range.
– The TXS0104E-Q1 device has 10-kΩ internal pullup resistors. External pullup resistors can be added to
reduce the total RC of a signal trace if necessary.
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•
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An external pulldown resistor decreases the output VOH and VOL. Use Equation 1 to calculate the VOH as a
result of an external pull down resistor.
VOH = VCCx × RPD / (RPD + 10 kΩ)
where
•
•
VCCx is the supply voltage on either VCCA or VCCB
RPD is the value of the external pull down resistor
(1)
9.2.3 Application Curve
2 V/div
5V
2V
10 ns/div
VCCA = 1.8 V
VCCB = 5 V
Figure 12. Level-Translation of a 2.5-MHz Signal
10 Power Supply Recommendations
The TXS0104E-Q1 device uses two separate configurable power-supply rails, VCCA and VCCB. VCCB accepts any
supply voltage from 2.3 V to 5.5 V and VCCA accepts any supply voltage from 1.65 V to 3.6 V as long as Vs is
less than or equal to VCCB. The A port and B port are designed to track VCCA and VCCB respectively allowing for
low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The TXS0104E-Q1 device does not require power sequencing between VCCA and VCCB during power-up so the
power-supply rails can be ramped in any order. A VCCA value greater than or equal to VCCB (VCCA ≥ VCCB) does
not damage the device, but during operation, VCCA must be less than or equal to VCCB (VCCA ≤ VCCB) at all times.
The output-enable (OE) input circuit is designed so that it is supplied by VCCA and when the (OE) input is low, all
outputs are placed in the high-impedance state. To ensure the high-impedance state of the outputs during power
up or power down, the OE input pin must be tied to GND through a pulldown resistor and must not be enabled
until VCCA and VCCB are fully ramped and stable. The minimum value of the pulldown resistor to ground is
determined by the current-sourcing capability of the driver.
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11 Layout
11.1 Layout Guidelines
To
•
•
•
•
ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
Bypass capacitors should be used on power supplies.
Short trace lengths should be used to avoid excessive loading.
PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one shot duration, approximately 30 ns, ensuring that any reflection encounters low impedance at the
source driver.
Placing pads on the signal paths for loading capacitors or pullup resistors to help adjust rise and fall times of
signals depending on the system requirements
11.2 Layout Example
LEGEND
VIA to Power Plane
Polygonal Copper Pour
VIA to GND Plane (Inner Layer)
VCCA
VCCB
Bypass Capacitors
Pads on signal paths for
potential rise and fall time
adjustments
To Controller
To System
1
VCCA
2
A1
VCCB 14
B1
13
To Controller
To System
3
A2
B2
12
4
A3
B3
11
To Controller
5
A4
B4
10
To System
To Controller
6
NC
NC
9
To System
7
GND
OE
8
Keep OE low until VCCA and
VCCB are powered up
Figure 13. TXS0104E-Q1 Layout Example
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12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
For related documentation see the following:
Introduction to Logic
12.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
29-Apr-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TXS0104EQPWRQ1
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
04EQ1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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