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TXS0108E-Q1
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
TXS0108E-Q1面
面向开漏和推挽应用的
8 位双向电压电平转换 转换器
1 特性
•
1
•
•
•
•
•
•
•
3 说明
符合汽车类应用的 AEC-Q100 标准
– 器件温度等级 1：-40°C 至 125°C
– 器件人体放电模式 (HBM) 静电放电 (ESD) 分类
等级 2
– 器件组件充电模式 (CDM) ESD 分类等级 C6
无需方向控制信号
最大数据速率
– 110Mbps（推挽）
– 1.2Mbps（开漏）
A 端口 1.4V 至 3.6V；B 端口 1.65V 至 5.5V (VCCA
≤ VCCB)
无需电源排序 - VCCA 或 VCCB 均可优先斜升
锁断性能超过 100mA，符合
JESD 78 II 类规范的要求
静电放电 (ESD) 保护性能超过 JESD 22 规范的要
求（A 端口）
– 2000V 人体放电模式 (A114-B)
– 1000V 充电器件模型 (C101)
IEC 61000-4-2 ESD（B 端口）
– ±8kV 接触放电
– ±6kV 气隙放电
这款 8 位非反向转换器使用两个独立的可配置电源
轨。A 端口跟踪 VCCA 引脚的电源电压。VCCA 引脚可
接受 1.4V 到 3.6V 范围内的任意电源电压。B 端口跟
踪 VCCB 引脚的电源电压。VCCB 引脚可接受 1.65V 到
5.5V 范围内的任意电源电压。这两个输入电源引脚可
实现 1.5V、1.8V、2.5V、3.3V 和 5V 电压节点之间的
任意低压双向转换。
输出使能 (OE) 输入为低电平时，所有输出均将置于高
阻抗 (Hi-Z) 状态。
为确保输出在上电或断电期间处于 Hi-Z 状态，需通过
一个下拉电阻将 OE 接至 GND。该电阻的最小值取决
于驱动器的拉电流能力。
.
器件信息(1)
器件型号
TXS0108E-Q1
封装尺寸（标称值）
TSSOP (20)
6.50mm x 6.40mm
(1) 如需了解所有可用封装，请参见数据表末尾的可订购产品附
录。
.
2 应用
•
封装
.
汽车
简化应用
1.8 V
3.3 V
0.1 PF
0.1 PF
OE
VCCA
VCCB
1.8-V
System
Controller
Data
3.3-V
System
Controller
A1
A2
A3
A4
A5
A6
A7
A8
TXS0108E-Q1
GND
B1
B2
B3
B4
B5
B6
B7
B8
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SCES861
TXS0108E-Q1
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
www.ti.com.cn
目录
1
2
3
4
5
6
特性 ..........................................................................
应用 ..........................................................................
说明 ..........................................................................
修订历史记录 ...........................................................
Pin Configuration and Functions .........................
Specifications.........................................................
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
6.12
6.13
6.14
7
1
1
1
2
3
4
Absolute Maximum Ratings ..................................... 4
ESD Ratings ............................................................ 4
Recommended Operating Conditions ...................... 5
Thermal Information .................................................. 5
Electrical Characteristics .......................................... 6
Timing Requirements: VCCA = 1.5 V ± 0.1 V ............ 6
Timing Requirements: VCCA = 1.8 V ± 0.15 V .......... 7
Timing Requirements: VCCA = 2.5 V ± 0.2 V ............ 7
Timing Requirements: VCCA = 3.3 V ± 0.3 V ............ 7
Switching Characteristics: VCCA = 1.5 V ± 0.1 V .... 8
Switching Characteristics: VCCA = 1.8 V ± 0.15 V .. 9
Switching Characteristics: VCCA = 2.5 V ± 0.2 V .. 10
Switching Characteristics: VCCA = 3.3 V ± 0.3 V .. 11
Typical Characteristics .......................................... 12
7.1 Load Circuits ........................................................... 13
7.2 Voltage Waveforms................................................. 14
8
Detailed Description ............................................ 15
8.1
8.2
8.3
8.4
9
Overview .................................................................
Functional Block Diagram .......................................
Feature Description.................................................
Device Functional Modes........................................
15
15
15
17
Application and Implementation ........................ 18
9.1 Application Information............................................ 18
9.2 Typical Application ................................................. 18
10 Power Supply Recommendations ..................... 20
11 Layout................................................................... 20
11.1 Layout Guidelines ................................................. 20
11.2 Layout Example .................................................... 20
12 器件和文档支持 ..................................................... 21
12.1
12.2
12.3
12.4
社区资源................................................................
商标 .......................................................................
静电放电警告.........................................................
Glossary ................................................................
21
21
21
21
13 机械、封装和可订购信息 ....................................... 21
Parameter Measurement Information ................ 13
4 修订历史记录
Changes from Original (June 2015) to Revision A
Page
•
已更改引脚功能 ...................................................................................................................................................................... 1
2
Copyright © 2015–2016, Texas Instruments Incorporated
TXS0108E-Q1
www.ti.com.cn
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
5 Pin Configuration and Functions
PW PACKAGE
20-PIN TSSOP
(TOP VIEW)
A1
VCCA
1
20
2
19
A2
A3
A4
A5
A6
A7
A8
OE
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
B1
VCCB
B2
B3
B4
B5
B6
B7
B8
GND
Pin Functions
PIN
NAME
NO.
TYPE (1)
DESCRIPTION
A1
1
I/O
Input/output 1. Referenced to VCCA
A2
3
I/O
Input/output 2. Referenced to VCCA
A3
4
I/O
Input/output 3. Referenced to VCCA
A4
5
I/O
Input/output 4. Referenced to VCCA
A5
6
I/O
Input/output 5. Referenced to VCCA
A6
7
I/O
Input/output 6. Referenced to VCCA
A7
8
I/O
Input/output 7. Referenced to VCCA
A8
9
I/O
Input/output 8. Referenced to VCCA
B1
20
I/O
Input/output 1. Referenced to VCCB
B2
18
I/O
Input/output 2. Referenced to VCCB
B3
17
I/O
Input/output 3. Referenced to VCCB
B4
16
I/O
Input/output 4. Referenced to VCCB
B5
15
I/O
Input/output 5. Referenced to VCCB
B6
14
I/O
Input/output 6. Referenced to VCCB
B7
13
I/O
Input/output 7. Referenced to VCCB
B8
12
I/O
Input/output 8. Referenced to VCCB
GND
11
G
Ground
OE
10
I
3-state output-mode enable. Pull OE low to place all outputs in 3-state mode. Referenced to VCCA.
VCCA
2
I
A-port supply voltage. 1.5 V ≤ VCCA ≤ 3.6 V, VCCA ≤ VCCB.
VCCB
19
I
B-port supply voltage. 1.65 V ≤ VCCB ≤ 5.5 V.
(1)
I = Input, O = Output, I/O = Bi-directional, G = Ground
Copyright © 2015–2016, Texas Instruments Incorporated
3
TXS0108E-Q1
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
VCCA
VCCB
Supply voltage
VI
Input voltage (2)
VO
Voltage range applied to any output
in the high-impedance or power-off state (2)
VO
Voltage range applied to any output in the high or low state (2)
IIK
Input clamp current
IOK
Output clamp current
IO
Continuous output current
(3)
Continuous current through VCCA, VCCB, or GND
Tstg
(1)
(2)
(3)
Storage temperature
MIN
MAX
–0.5
4.6
V
V
–0.5
5.5
A port
–0.5
4.6
B port
–0.5
6.5
A port
–0.5
4.6
B port
–0.5
6.5
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
UNIT
V
V
V
VI < 0
–50
mA
VO < 0
–50
mA
–50
50
mA
–100
100
mA
–65
150
°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative Voltage ratings may be exceeded if the input and output current ratings are observed.
The value of VCCA and VCCB are provided in the recommended operating conditions table.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
4
Electrostatic
discharge
Human-body model (HBM), per AEC Q100-002
(1)
Charged-device model (CDM), per AEC Q100-011
±2000
±1000
UNIT
V
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
Copyright © 2015–2016, Texas Instruments Incorporated
TXS0108E-Q1
www.ti.com.cn
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1) (2)
VCCA (V)
VCCA
VCCB
High-level input
voltage
B-Port I/Os
OE
A-Port I/Os
Low-level input
voltage
VIL
B-Port I/Os
OE
Δt/Δv
A-Port I/Os Push-pull
Input transition rise or
B-Port I/Os Push-pull
fall rate
Control input
TA
Operating free-air temperature
(1)
(2)
(3)
MIN
MAX
1.4
3.6
1.65
5.5
1.4 to 1.95
VCCI – 0.2
VCCI
1.95 to 3.6
VCCI – 0.4
VCCI
VCCI – 0.4
VCCI
Supply voltage (3)
A-Port I/Os
VIH
VCCB (V)
1.4 to 3.6
1.4 to 1.95
1.95 to 3.6
1.65 to 5.5
1.4 to 3.6
VCCA × 0.65
5.5
0
0.15
0
0.15
0
0.15
0
VCCA × 0.35
1.4 to 3.6
–40
UNIT
V
V
V
10
ns/V
125
°C
VCCI is the VCC associated with the data input port.
VCCO is the VCC associated with the output port.
VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
6.4 Thermal Information
TXS0108E-Q1
THERMAL METRIC (1)
PW (TSSOP)
UNIT
20 PINS
RθJA
Junction-to-ambient thermal resistance
101.5
RθJC(top)
Junction-to-case (top) thermal resistance
35.9
RθJB
Junction-to-board thermal resistance
52.4
ψJT
Junction-to-top characterization parameter
2.3
ψJB
Junction-to-board characterization parameter
51.9
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
(1)
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
Copyright © 2015–2016, Texas Instruments Incorporated
5
TXS0108E-Q1
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
www.ti.com.cn
6.5 Electrical Characteristics (1) (2) (3)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
IOH = –20 μA,
VIB ≥ VCCB – 0.4 V
VOHA
VOLA
VOLB
VCCB (V)
1.4 to 3.6
1.65 to 5.5
IOL = 180 μA, VIB ≤ 0.15 V
1.4
IOL = 220 μA, VIB ≤ 0.15 V
1.65
IOL = 300 μA, VIB ≤ 0.15 V
2.3
IOL = 400 μA, VIB ≤ 0.15 V
3
IOH = –20 μA,
VIA ≥ VCCA – 0.2 V
VOHB
VCCA (V)
1.4 to 3.6
IOZ
A or
B port
ICCA
MIN
MAX
VCCA × 0.67
0.4
0.4
1.65 to 5.5
0.4
1.65 to 5.5
VCCB × 0.67
V
0.4
3
0.55
VI = VCCI or GND
VI = VO = Open, IO = 0
V
0.55
2.3
1.4 to 3.6
UNIT
V
1.65
VI = VO = Open, IO = 0
ICCB
MAX
IOL = 300 μA, VIA ≤ 0.15 V
IOL = 620 μA, VIA ≤ 0.15 V
OE
TA = –40°C to 125°C
TYP
IOL = 220 μA, VIA ≤ 0.15 V
IOL = 400 μA, VIA ≤ 0.15 V
II
TA = 25°C
MIN
0.4
4.5
V
0.55
2
μA
2
μA
1.4
1.65 to 5.5
–1
1
1.4
1.65 to 5.5
–1
1
1.4 to 3.6
2.3 to 5.5
3.6
0
2
0
5.5
–1
1.4 to 3.6
2.3 to 5.5
6
3.6
0
–1
0
5.5
1.5
–2
2
μA
μA
ICCA + ICCB
VI = VCCI or GND,
IO = 0
1.4 to 3.6
2.3 to 5.5
8
μA
ICCZA
VI = VO = Open,
IO = 0, OE = GND
1.4 to 3.6
1.65 to 5.5
2
μA
ICCZB
VI = VO = Open,
IO = 0, OE = GND
1.4 to 3.6
1.65 to 5.5
6
μA
3.3
3.3
4.5
6.75
pF
6
7.6
5.5
6.9
Ci
Cio
(1)
(2)
(3)
OE
A port
3.3
B port
3.3
pF
VCCO is the VCC associated with the output port.
VCCI is the VCC associated with the input port.
VCCA must be less than or equal to VCCB, and VCCA must not exceed 3.6 V.
6.6 Timing Requirements: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
VCC B = 1.8 V
± 0.15 V
MIN
Data rate
tw
6
Pulse duration
MAX
VCC B = 2.5 V
± 0.2 V
MIN
MAX
VCC B= 3.3 V
± 0.3 V
MIN
MAX
VCC B= 5 V
± 0.5 V
MIN
UNIT
MAX
Push-pull
40
60
60
60
Open-drain
0.8
0.8
1
1
Push-pull
Open-drain
Data inputs
25
16.7
16.7
16.7
1250
1250
1000
1000
Mbps
ns
Copyright © 2015–2016, Texas Instruments Incorporated
TXS0108E-Q1
www.ti.com.cn
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
6.7 Timing Requirements: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
VCC B = 1.8 V
± 0.15 V
MIN
Data rate
tw
Pulse duration
MAX
VCC B = 2.5 V
± 0.2 V
VCC B= 3.3 V
± 0.3 V
MIN MAX
MIN MAX
VCC B= 5 V
± 0.5 V
MIN
UNIT
MAX
Push-pull
45
65
70
70
Open-drain
0.8
0.8
0.8
1
Push-pull
Data inputs
Open-drain
22.2
15.3
15.3
15.3
1250
1250
1250
1000
Mbps
ns
6.8 Timing Requirements: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
VCCB = 2.5 V
± 0.2 V
MIN
Data rate
tw
Pulse duration
VCCB = 3.3 V
± 0.3 V
MAX
MIN
VCC = 5 V
± 0.5 V
MAX
MIN
UNIT
MAX
Push-pull
80
95
100
Open-drain
0.8
0.8
1
Push-pull
Open-drain
Data inputs
12.5
10.5
10
1250
1250
1000
Mbps
ns
6.9 Timing Requirements: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
VCCB = 3.3 V
± 0.3 V
MIN
Data rate
tw
Pulse duration
VCC = 5 V
± 0.5 V
MAX
MIN
UNIT
MAX
Push-pull
100
110
Open-drain
0.8
1.2
Push-pull
Open-drain
Copyright © 2015–2016, Texas Instruments Incorporated
Data inputs
10
9.1
1250
833
Mbps
ns
7
TXS0108E-Q1
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
www.ti.com.cn
6.10 Switching Characteristics: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
PARA
METER
FROM
(INPUT)
TO
(OUTPUT)
VCCB = 1.8 V
± 0.15 V
MIN
Push-pull
tPHL
A
B
tPLH
Open-drain
2.5
A
tPLH
ten
OE
A or B
tdis
OE
A or B
trA
A-port rise time
trB
B-port rise time
tfA
A-port fall time
tfB
B-port fall time
tSK(O)
Channel-to-channel skew
Open-drain
MAX
MIN
14.4
0.9
720
2
13.2
MAX
MIN
12.8
0.9
554
2
9.6
MAX
MIN
12.2
1
473
1.9
8.5
12
9.7
1.5
11
2.3
UNIT
MAX
8.6
9.8
11.1
2.6
VCCB = 5 V
± 0.5 V
8.6
10
12.7
3.4
VCCB = 3.3 V
± 0.3 V
9.2
12
Push-pull
B
VCCB = 2.5 V
± 0.2 V
11
Push-pull
Open-drain
tPHL
8
TEST
CONDITIO
N
(DRIVING)
ns
384
12
2
7.5
ns
Push-pull
9.5
6.2
5.1
4.2
Open-drain
745
603
519
407
480
480
480
480
ns
400
400
400
400
ns
Push-pull
Push-pull
Open-drain
3
13.1
2.4
9.8
2
9
2
8.9
220
982
180
716
140
592
100
481
Push-pull
2.6
11.4
1.6
7.4
1
6
0.7
5
Open-drain
220
1020
150
756
100
653
40
370
Push-pull
2.3
9.9
1.7
7.7
1.6
6.8
1.7
6
Open-drain
2.4
10
1.8
8.2
1.7
9
1.5
9.15
Push-pull
2
8.7
1.3
5.5
1
3.8
1
3.1
Open-drain
2
11.5
1.3
8.6
1
9.6
1
7.7
Push-pull
1
1
1
1
ns
ns
ns
ns
Copyright © 2015–2016, Texas Instruments Incorporated
TXS0108E-Q1
www.ti.com.cn
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
6.11 Switching Characteristics: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT
)
A
B
tPLH
Open-drain
MAX
2.1
11.4
B
A
ten
OE
A or B
tdis
OE
A or B
tPLH
trA
A-port rise time
trB
B-port rise time
tfA
A-port fall time
B-port fall time
Channel-to-channel
skew
MIN
8.2
0.15
729
12.1
MAX
MIN
9.9
0.2
584
8.5
MAX
MIN
9.3
0.3
466
7.3
8.9
6.3
0.3
346
1.8
6.2
7.4
1.9
UNIT
MAX
5.6
1.5
6.5
8
2
VCCB = 5 V
± 0.5 V
5.7
1.6
5.6
9.8
3.19
VCCB = 3.3 V
± 0.3 V
6.4
1.7
9
Push-pull
Open-drain
VCCB = 2.5 V
± 0.2 V
MIN
Push-pull
Open-drain
tPHL
tSK(O)
VCCB = 1.8 V
± 0.15 V
Push-pull
tPHL
tfB
TEST
CONDITION
(DRIVING)
ns
7
ns
Push-pull
10.2
7
5.8
5
Open-drain
733
578
459
323
100
100
100
100
ns
410
ns
Push-pull
410
410
410
Push-pull
2.7
11.9
2
8.6
1.9
7.8
1.8
7.4
Open-drain
250
996
200
691
150
508
110
365
Push-pull
2.5
10.5
1.7
7.4
1.1
5.3
60
4.7
Open-drain
250
1001
170
677
120
546
32
323
Push-pull
2.1
8.8
1.6
7.1
1.4
6.8
1.4
6.06
Open-drain
2.2
9
1.7
7.2
1.4
6.8
1.2
6.1
Push-pull
2
8.3
1.3
5.4
0.9
3.9
0.7
3
Open-drain
2
10.5
1
10.7
1
9.6
0.6
7.8
Push-pull
Copyright © 2015–2016, Texas Instruments Incorporated
1
1
1
1
ns
ns
ns
ns
9
TXS0108E-Q1
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
www.ti.com.cn
6.12 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
A
B
tPLH
MIN
B
A
OE
A or B
tPLH
OE
A or B
trA
A-port rise time
trB
B-port rise time
tfA
A-port fall time
tfB
B-port fall time
tSK(O)
Channel-to-channel
skew
MAX
MIN
VCCB = 5 V
± 0.5 V
MAX
MIN
UNIT
MAX
5
4
3.7
6.2
6.3
5.8
Push-pull
5.2
4.3
3.9
5
17.5
15.5
Push-pull
5.4
4.7
4.2
Open-drain
7.3
6
4.9
Push-pull
5.9
4.4
3.5
Open-drain
ten
VCCB = 3.3 V
± 0.3 V
Open-drain
Open-drain
tPHL
10
VCCB = 2.5 V
± 0.2 V
Push-pull
tPHL
tdis
TEST
CONDITION
(DRIVING)
Push-pull
Push-pull
Open-drain
Push-pull
5
5
5
100
100
ns
400
ns
400
400
1.89
7.3
1.6
6.4
1.5
5.8
110.00
692
157
529
116
377
1.70
6.5
1.3
5.1
0.9
4.32
693
140
483
77
304
Push-pull
1.50
5.7
1.2
4.7
1.3
3.8
Open-drain
1.50
5.6
1.2
4.7
1.1
4.2
Push-pull
1.40
5.4
0.9
4.1
0.7
3
Open-drain
0.40
14.2
0.5
19.4
0.4
3
Push-pull
ns
100
107.00
Open-drain
ns
1
1
1
ns
ns
ns
ns
Copyright © 2015–2016, Texas Instruments Incorporated
TXS0108E-Q1
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ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
6.13 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
PARAME
TER
FROM
(INPUT)
TO
(OUTPUT)
tPHL
A
B
tPLH
TEST
CONDITION
(DRIVING)
VCCB = 3.3 V
± 0.3 V
MIN
A
ten
OE
A or B
tdis
OE
A or B
tPLH
A-port rise time
trB
B-port rise time
tfA
A-port fall time
tfB
B-port fall time
tSK(O)
Channel-to-channel skew
Copyright © 2015–2016, Texas Instruments Incorporated
UNIT
MAX
3.8
3.28
5.3
4.8
Push-pull
3.9
3.5
Open-drain
Push-pull
Open-drain
trA
MIN
Open-drain
Push-pull
B
MAX
Push-pull
Open-drain
tPHL
VCCB = 5 V
± 0.5 V
Push-pull
5
12.5
4.2
3.8
5.5
4.5
4.32
4.3
ns
5
5
100
100
ns
400
ns
400
Push-pull
1.5
5.7
1.4
5
Open-drain
129
446
99.6
337
Push-pull
1.35
5
1
4.24
Open-drain
129
427
77
290
Push-pull
1.4
4.5
1.3
3.5
Open-drain
1.4
4.4
1.2
3.7
Push-pull
1.3
4.2
1.1
3.1
Open-drain
1.3
4.2
1.1
3.1
Push-pull
ns
1
1
ns
ns
ns
ns
11
TXS0108E-Q1
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
www.ti.com.cn
0.6
0.6
0.5
0.5
Low-Level Output Voltage (V)
Low-Level Output Voltage (V)
6.14 Typical Characteristics
0.4
0.3
0.2
TA ± ƒ&
TA = 25°C
TA = 125°C
0.1
0
0.4
0.3
0.2
TA ± ƒ&
TA = 25°C
TA = 125°C
0.1
0
0
100
200
VCCA = 2.3 V
300 400 500 600 700
Low-Level Current (µA)
VCCB = 2.7 V
800
900 1000
0
VIL(A) = 0.15 V
0.6
0.6
0.5
0.5
Low-Level Output Voltage (V)
Low-Level Output Voltage (V)
300 400 500 600 700
Low-Level Current (µA)
VCCB = 5.5 V
800
900 1000
D001
VIL(A) = 0.15 V
Figure 2. Low-Level Output Voltage (VOL(Bx))
vs Low-Level Current (IOL(Bx))
0.4
0.3
0.2
TA ± ƒ&
TA = 25°C
TA = 125°C
0
0.4
0.3
0.2
TA ± ƒ&
TA = 25°C
TA = 125°C
0.1
0
0
100
VCCA = 1.65 V
200
300
400
Low-Level Current (µA)
VCCB = 1.95 V
500
600
0
100
200
300
400
Low-Level Current (µA)
D001
VIL(A) = 0.15 V
Figure 3. Low-Level Output Voltage (VOL(Bx))
vs Low-Level Current (IOL(Bx))
12
200
VCCA = 3 V
Figure 1. Low-Level Output Voltage (VOL(Bx))
vs Low-Level Current (IOL(Bx))
0.1
100
D001
VCCA = 1.65 V
VCCB = 5.5 V
500
600
D001
VIL(A) = 0.15 V
Figure 4. Low-Level Output Voltage (VOL(Bx))
vs Low-Level Current (IOL(Bx))
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TXS0108E-Q1
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ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
7 Parameter Measurement Information
7.1 Load Circuits
Figure 5 shows the push-pull driver circuit used for measuring data rate, pulse duration, propagation delay,
output rise-time and fall-time. Figure 6 shows the open-drain driver circuit used for measuring data rate, pulse
duration, propagation delay, output rise-time and fall-time.
VCCI
VCCI
VCCO
VCCO
DUT
DUT
IN
IN
OUT
15 pF
OUT
15 pF
1M
Figure 5. Data Rate, Pulse Duration, Propagation
Delay, Output Rise-Time and Fall-Time
Measurement Using a Push-Pull Driver
1M
Figure 6. Data Rate (10 pF), Pulse Duration (10 pF),
Propagation Delay, Output Rise-Time and FallTime Measurement Using an Open-Drain Driver
2 × VCCO
50 k
From Output
Under Test
15 pF
S1
Open
50 k
TEST
S1
tPZL / tPLZ
(tdis)
2 × VCCO
tPHZ / tPZH
(ten)
Open
Figure 7. Load Circuit for Enable-Time and Disable-Time Measurement
1.
2.
3.
4.
tPLZ and tPHZ are the same as tdis.
tPZL and tPZH are the same as ten.
VCCI is the VCC associated with the input port.
VCCO is the VCC associated with the output port.
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7.2 Voltage Waveforms
VCCI
tW .
Input
VCCI/2
VCCI/2
0V
VCCI
Input
VOHA/VOHB
VOHA/VOHB
tPLH
tPHL
0V
Output
VCCO/2
0.9
VCCO
0.1
VCCO
VOH
VCCO/2
VOL
tr
Figure 8. Pulse Duration (Push-Pull)
tf
Figure 9. Propagation Delay Times
•
CL includes probe and jig capacitance.
•
Waveform 1 in Figure 10 is for an output with internal such that the output is high, except when OE is high (see
Figure 7). Waveform 2 in Figure 10 is for an output with conditions such that the output is low, except when OE is
high.
•
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, dv/dt
≥ 1 V/ns.
•
The outputs are measured one at a time, with one transition per measurement.
•
tPLZ and tPHZ are the same as tdis.
•
tPZL and tPZH are the same as ten.
•
tPLH and tPHL are the same as tpd.
•
VCCI is the VCC associated with the input port.
•
VCCO is the VCC associated with the output port.
VCCA
VCCA / 2
OE input
VCCA / 2
0V
tPLZ
tPZL
VOH
Output
Waveform 1
S1 at 2 × VCCO
VCCO / 2
VCCO × 0.2
(see Note 2)
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note 2)
VOL
VOH × 0.9
VCCO
VCCO / 2
0V
Figure 10. Enable and Disable Times
14
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8 Detailed Description
8.1 Overview
The TXS0108E-Q1 device is a directionless voltage-level translator specifically designed for translating logic
voltage levels. The A-port accepts I/O voltages ranging from 1.4 V to 3.6 V. The B-port accepts I/O voltages from
1.65 V to 5.5 V. The device uses pass gate architecture with edge rate accelerators (one shots) to improve the
overall data rate. The pull-up resistors, commonly used in open-drain applications, have been conveniently
integrated so that an external resistor is not needed. While this device is designed for open-drain applications,
the device can also translate push-pull CMOS logic outputs.
8.2 Functional Block Diagram
VCCA
VCCB
OE
One-Shot
Accelerator
Gate Bias
One-Shot
Accelerator
RPUA
RPUB
B1
A1
One-Shot
Accelerator
Gate Bias
One-Shot
Accelerator
RPUA
RPUB
A2
B2
A3
A4
A5
A6
B3
B4
B5
B6
One-Shot
Accelerator
Gate Bias
One-Shot
Accelerator
RPUA
RPUB
A7
B7
One-Shot
Accelerator
RPUA
A8
Gate Bias
One-Shot
Accelerator
RPUB
B8
Each A-port I/O has a pull-up resistor (RPUA) to VCCA and each B-port I/O has a pull-up resistor (RPUB) to VCCB.
RPUA and RPUB have a value of 40 kΩ when the output is driving low. RPUA and RPUB have a value of 4 kΩ when
the output is driving high. RPUA and RPUB are disabled when OE = Low.
8.3 Feature Description
8.3.1 Architecture
Figure 11 describes semi-buffered architecture design this application requires for both push-pull and open-drain
mode. This application uses edge-rate accelerator circuitry (for both the high-to-low and low-to-high edges), a
high-on-resistance N-channel pass-gate transistor (on the order of 300 Ω to 500 Ω) and pull-up resistors (to
provide DC-bias and drive capabilities) to meet these requirements. This design needs no direction-control signal
(to control the direction of data flow from A to B or from B to A). The resulting implementation supports both lowspeed open-drain operation as well as high-speed push-pull operation.
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Feature Description (continued)
VCCA
VCCB
RPUA
Translator
T1
A
Bias
One-Shot
Accelerator
OS3
P2
One-Shot
Accelerator
OS4
N2
R1
RPUB
B
R2
Npass
P1
N1
One-Shot
Accelerator
OS1
One-Shot
Accelerator
OS2
Translator
T2
Figure 11. Architecture of a TXS0108E-Q1 Cell
When transmitting data from A-ports to B-ports, during a rising edge the one-shot circuit (OS3) turns on the
PMOS transistor (P2) for a short-duration which reduces the low-to-high transition time. Similarly, during a falling
edge, when transmitting data from A to B, the one-shot circuit (OS4) turns on the N-channel MOSFET transistor
(N2) for a short-duration which speeds up the high-to-low transition. The B-port edge-rate accelerator consists of
one-shot circuits OS3 and OS4. Transistors P2 and N2 and serves to rapidly force the B port high or low when a
corresponding transition is detected on the A port.
When transmitting data from B- to A-ports, during a rising edge the one-shot circuit (OS1) turns on the PMOS
transistor (P1) for a short-duration which reduces the low-to-high transition time. Similarly, during a falling edge,
when transmitting data from B to A, the one-shot circuit (OS2) turns on NMOS transistor (N1) for a short-duration
and this speeds up the high-to-low transition. The A-port edge-rate accelerator consists of one-shots OS1 and
OS2, transistors P1 and N1 components and form the edge-rate accelerator and serves to rapidly force the A
port high or low when a corresponding transition is detected on the B port.
8.3.2 Input Driver Requirements
The continuous DC-current sinking capability is determined by the external system-level open-drain (or push-pull)
drivers that are interfaced to the TXS0108E-Q1 I/O pins. Because the high bandwidth of these bidirectional I/O
circuits is used to facilitate this fast change from an input to an output and an output to an input, they have a
modest DC-current sourcing capability of hundreds of micro-amperes, as determined by the internal pull-up
resistors.
The fall time (tfA, tfB) of a signal depends on the edge-rate and output impedance of the external device driving
TXS0108E-Q1 data I/Os, as well as the capacitive loading on the data lines.
Similarly, the tPHL and maximum data rates also depend on the output impedance of the external driver. The
values for tfA, tfB, tPHL, and maximum data rates in the data sheet assume that the output impedance of the
external driver is less than 50 Ω.
16
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Feature Description (continued)
8.3.3 Output Load Considerations
TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading
and to ensure that proper one-shot triggering takes place. PCB signal trace-lengths should be kept short enough
such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity
by ensuring that any reflection sees a low impedance at the driver. The one-shot circuits have been designed to
stay on for approximately 30 ns. The maximum capacitance of the lumped load that can be driven also depends
directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is
driven fully to the positive rail. The one-shot duration has been set to best optimize trade-offs between dynamic
ICC, load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to
the capacitance of the TXS0108E-Q1 output. Therefore, TI recommends that this lumped-load capacitance is
considered in order to avoid one-shot retriggering, bus contention, output signal oscillations, or other adverse
system-level affects.
8.3.4 Enable and Disable
The TXS0108E-Q1 has an OE pin input that is used to disable the device by setting the OE pin low, which
places all I/Os in the Hi-Z state. The disable time (tdis) indicates the delay between the time when the OE pin
goes low and when the outputs actually get disabled (Hi-Z). The enable time (ten) indicates the amount of time
the design must allow for the one-shot circuitry to become operational after the OE pin goes high.
8.3.5 Pull-up or Pull-down Resistors on I/O Lines
The TXS0108E-Q1 has the smart pull-up resistors dynamically change value based on whether a low or a high is
being passed through the I/O line. Each A-port I/O has a pull-up resistor (RPUA) to VCCA and each B-port I/O has
a pull-up resistor (RPUB) to VCCB. RPUA and RPUB have a value of 40 kΩ when the output is driving low. RPUA and
RPUB have a value of 4 kΩ when the output is driving high. RPUA and RPUB are disabled when OE = Low. This
feature provides lower static power consumption (when the I/Os are passing a low), and supports lower VOL
values for the same size pass-gate transistor, and helps improve simultaneous switching performance.
8.4 Device Functional Modes
The TXS0108E-Q1 device has two functional modes, enabled and disabled. To disable the device set the OE pin
input low, which places all I/Os in a high impedance state. Setting the OE pin input high enables the device.
Copyright © 2015–2016, Texas Instruments Incorporated
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TXS0108E-Q1 can be used in level-translation applications for interfacing devices or systems operating at
different interface voltages with one another. The device is ideal for use in applications where an open-drain
driver is connected to the data I/Os. The device is appropriate for applications where a push-pull driver is
connected to the data I/Os, but the TXB0104 device, (SCES650) 4-Bit Bidirectional Voltage-Level Translator
might be a better option for such push-pull applications. The device is a semi-buffered auto-direction-sensing
voltage translator design is optimized for translation applications (for example, MMC Card Interfaces) that require
the system to start out in a low-speed open-drain mode and then switch to a higher speed push-pull mode.
9.2 Typical Application
1.8 V
3.3 V
0.1 PF
0.1 PF
VCCA
OE
VCCB
1.8-V
System
Controller
3.3-V
System
Controller
A1
A2
A3
A4
A5
A6
A7
A8
Data
TXS0108E-Q1
GND
B1
B2
B3
B4
B5
B6
B7
B8
Figure 12. Typical Application Circuit
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 1. Ensure that VCCA ≤ VCCB.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage range
1.4 V to 3.6 V
Output voltage range
1.65 V to 5.5 V
9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
– Use the supply voltage of the device that is driving the TXS0108E-Q1 device to determine the input
voltage range. For a valid logic high the value must exceed the VIH of the input port. For a valid logic low
the value must be less than the VIL of the input port.
18
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TXS0108E-Q1
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•
•
ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
Output voltage range
– Use the supply voltage of the device that the TXS0108E-Q1 device is driving to determine the output
voltage range.
– The TXS0108E-Q1 device has smart internal pull-up resistors. External pull-up resistors can be added to
reduce the total RC of a signal trace if necessary.
An external pull-down resistor decreases the output VOH and VOL. Use Equation 1 to calculate the VOH as a
result of an external pull-down resistor.
VOH = VCCx × RPD / (RPD + 4 kΩ)
(1)
9.2.3 Application Curves
VCCA = 1.8 V
VCCB = 3.3 V
Figure 13. Level-Translation of a 2.5-MHz Signal
Copyright © 2015–2016, Texas Instruments Incorporated
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www.ti.com.cn
10 Power Supply Recommendations
During operation, ensure that VCCA ≤ VCCB at all times. The sequencing of each power supply will not damage the
device during the power up operation, so either power supply can be ramped up first. The output-enable (OE)
input circuit is designed so that it is supplied by VCCA and when the (OE) input is low, all outputs are placed in the
high-impedance state. To ensure the high-impedance state of the outputs during power up or power down, the
OE input pin must be tied to GND through a pull-down resistor and must not be enabled until VCCA and VCCB are
fully ramped and stable. The minimum value of the pull-down resistor to ground is determined by the currentsourcing capability of the driver.
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
• Bypass capacitors should be used on power supplies. Place the capacitors as close as possible to the VCCA,
VCCB pin and GND pin.
• Short trace lengths should be used to avoid excessive loading.
• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one shot duration, approximately 30 ns, ensuring that any reflection encounters low impedance at the
source driver.
11.2 Layout Example
LEGEND
Polygonal Copper Pour
VIA to Power Plane
VIA to GND Plane (Inner Layer)
TXS0108E-Q1PWR
To Controller
1
A1
B1
20
Bypass capacitor 0.1
0.1 µF
µF
0.1
0.1 µF
µF Bypass capacitor
2
VCCA
VCCB
19
3
A2
B2
18
4
A3
B3
17
5
A4
B4
16
6
A5
B5
15
7
A6
B6
14
8
A7
B7
13
9
A8
B8
12
10
OE
GND
11
To system
To Controller
To Controller
To system
To Controller
To Controller
To system
To system
To system
To Controller
To Controller
To system
To system
To system
To Controller
Keep OE low until VCCA and VCCB are powered up
Figure 14. Layout Example
20
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ZHCSDZ8A – JUNE 2015 – REVISED FEBRUARY 2016
12 器件和文档支持
12.1 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.2 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
12.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2015–2016, Texas Instruments Incorporated
21
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TXS0108EQPWRQ1
ACTIVE
TSSOP
PW
20
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
YF08EQ1
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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