UC2838AN




 SLUS221A – APRIL 2000 – REVISED MAY 2001        FEATURES D Independent 1% Reference D Two Uncommitted, Identical Operational D D D DESCRIPTION The UC3838 and the UC3838A family of magnetic amplifier controllers contains the circuitry to generate and amplify a low-level analog error signal along with a high voltage-compliant current source. This source provides the reset current necessary to enable a magnetic amplifier to regulate and control a power supply output in the range of 2 A to 20 A. Amplifiers 100-mA Reset Current Source With –120-V Capability 5-V to 40-V Analog Operation 5-W DIP Package The UC3838A originally was a parametric improvement version of the UC3838 which since has been used for both versions. There is no difference between the UC3838A and UC3838 version. BLOCK DIAGRAM VCC VREF 10 9 11 2.5 V REFERENCE 5 kΩ 1 kΩ VM 20 Ω 3.5 V INV. IN 6 N.I. IN 7 E/A OUT 8 INV. IN 3 – E/A + 14 RESET 15 DR 1 N.I. IN 2 C/L OUT 1 16 DR 2 – C/L + 4 5 12 13 GND GND GND GND UDG-97174 By controlling the reset current to a magnetic amplifier, this device defines the amount of volt-seconds the magnetic amplifier blocks before switching to the conducting state. Magnetic amplifiers are ideal for post-regulators for multiple-output power supplies where each output can be independently controlled with efficiencies up to 99%. With a square or pulse-width modulated input voltage, a magnetic amplifier blocks a portion of this input waveform, allowing just enough to pass to provide a regulated output. With the UC3838/A, only the magnetic amplifier coil, three diodes, and an output L-C filter are necessary to implement a complete closed-loop regulator. AVAILABLE OPTIONS Packaged Devices TA = TJ –20°C 20°C to 85°C 0°C to 70°C SOIC Wide (DW) PDIP (N) PLCC (Q) UC2838DW UC2838N UC2838Q UC2838ADW UC2838AN UC2838AQ UC3838DW UC3838N UC3838Q UC3838ADW UC3838AN UC3838AQ 
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 SLUS221A – APRIL 2000 – REVISED MAY 2001 description (continued) The UC3838/A contains a precision 2.5-V reference, two uncommitted high-gain operational amplifier and a high-gain PNP-equivalent current source which can deliver up to 100 mA of magnetic amplifier reset current and with –120-V capability. These devices are available in a plastic batwing DIP (N), wide body SOIC (DW), and PLCC (Q) package for operation over a –20°C to 85°C temperature range. Q PACKAGE (TOP VIEW) DR2 2 1 20 19 DR1 N/C 3 C/L INV.IN 4 18 RESET GND 5 17 N/C N/C 6 16 N/C N/C 7 15 GND E/A INV.IN 8 14 VM VCC 10 11 12 13 VREF 9 N/C DR2 DR1 RESET GND GND VM VCC VREF C/LOUT 16 15 14 13 12 11 10 9 E/A OUT 1 2 3 4 5 6 7 8 E/A N.I.IN C/L OUT C/L N.I. IN C/L INV. IN GND GND E/A INV. IN E/A N.I. IN E/A OUT C/LN.I.IN DW AND N PACKAGES (TOP VIEW) absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V Magnetic amplifier source voltage, VM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 V Reset output voltage, VR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –120 V Total current source voltage, VM – VR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –140 V Amplifier input range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VCC Reset input current, DR1 and DR2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 mA Power dissipation at TA = 25°C Q, N, DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 W Power dissipation at T (leads/case) = 25°C Q, N, DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 W Operating temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Lead temperature (soldering, 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ All voltages are with respect to ground pins. All currents are positive into the specified terminal. Consult packaging section of data book for thermal limitations and considerations of package. 2 www.ti.com 



 SLUS221A – APRIL 2000 – REVISED MAY 2001 electrical characteristics, TA = –20°C to 85°C for the UC2838/A, and TA = 0°C to 70°C for the UC3838/A, VCC = 20 V, VM = 5 V, TA = TJ, (unless otherwise stated) reference UC2838/UC2838A PARAMETER Supply current Reference output Line regulation TEST CONDITIONS VCC = VM = 40 V TA = 25°C MIN 2.47 UC3838/UC3838A TYP MAX 4 8 2.50 2.53 1 5 MIN 2.45 UNITS TYP MAX 4 8 2.50 2.55 1 10 mV mA V Load regulation VCC = 5 V to 30 V IO = 0 mA to –2 mA 5 20 5 20 mV Short-circuit current VREF = 0 V –30 –60 –30 –60 mA Temperature stability See Note 1 15 25 10 25 mV NOTE: 1.These parameters are ensured by design but not 100% tested in production. amplifier (each amplifier) UC2838/UC2838A PARAMETER Offset voltage Input bias current TEST CONDITIONS MIN TYP VCM = 2.5 V VIN = 0 V Input offset voltage Output source current MIN TYP MAX 0.4 VO = 5 V VO = 0 V UNITS 5 10 mV –1 –1 µA 100 nA 100 Minimum output swing Output sink current UC3838/UC3838A MAX 18 0.4 1 1 10 30 –20 18 V 10 30 mA –20 mA –1 –10 –1 –10 AVOL (open loop gain) CMRR (common mode rejection ratio) VO = 1 V to 11 V 100 120 100 120 dB VIN = 1 V to 11 V 70 80 70 80 dB PSRR (power supply rejection ratio) Gain bandwidth VCC = 10 V to 20 V See Note 1 70 100 70 100 dB 0.6 0.8 0.6 0.8 MHz NOTE: 1.These parameters are ensured by design but not 100% tested in production. reset drive UC2838/UC2838A PARAMETER Input leakage Output leakage Input current TEST CONDITIONS MIN TYP VDR = 40 V VR = –120 V Maximum reset current IR = –50 mA IDR = –3 mA Transconductance IR = –10 mA to –50 mA UC3838/UC3838A MAX MIN TYP 10 10 –2 –100 –120 –200 0.03 0.042 0.055 www.ti.com UNITS µA –100 µA –1 –2 mA –100 –120 –200 mA 0.03 0.042 0.055 A/V –100 –1 MAX 3 



 SLUS221A – APRIL 2000 – REVISED MAY 2001 typical application 45 TURNS 50B10–1D CORE 100 µ H UES2403 0.02 Ω +V O MAGNETIC AMPLIFIER UES1003 UES2403 300 Ω 1W 100 Ω 15 k Ω 0.1 100 Ω 14 9.1 kΩ 12 V SECONDARY WINDING 15 3 + 1 2 0.47 20 Ω 15 V AUXILLIARY SUPPLY 11 16 4.7 k Ω 3.6 kΩ 7 2 kΩ 2.5 V 10 1000 6 + 8 + 12 kΩ 9 REF UC3838/A 2.4 kΩ 4, 5, 12, 13 GND NOTE: 12 V, 4 A output with switching frequency = 50 kHz. APPLICATION INFORMATION GAIN MAGNITUDE vs SIGNAL FREQUENCY GAIN MAGNITUDE/PHASE vs SIGNAL FREQUENCY –120 140 120 180 100 225 –100 80 270 60 315 40 Gain VIN 2.5 V 20 –80 T J = 25 C –60 –40 VO + Gain = 20 Log 0 360 Reset Current – mA Phase Phase – C Gain Magnitude – dB T J = 125 C T J = –55 C –20 VO VIN 0 0.1 1.0 10 100 1k 10 k 0.1 M 1M 0 Signal Frequency – Hz –0.4 –0.6 –0.8 Input Current – mA Figure 1. 4 –0.2 Figure 2. www.ti.com –1.0 –1.2 –1.4 



 SLUS221A – APRIL 2000 – REVISED MAY 2001 APPLICATION INFORMATION GAIN MAGNITUDE/PHASE vs SIGNAL FREQUENCY RESET CURRENT vs RESET VOLTAGE –120 5 TJ = 25 C PHASE 0 I B = 1.0 mA –80 Gain Magnitude – dB Reset Current – mA I B = 1.2 mA I B = 0.8 mA –60 I B = 0.6 mA –40 –5 180 GAIN 225 –10 270 5V –15 –20 RI = 10 I B = 0.4 mA VO VIN 360 VO IO(dc) = 50 mA IO(ac) = 10 mA –25 –20 315 GAIN = 20 LOG VIN Phase – C –100 –30 0 0 –20 –60 –40 –80 1k –100 10 k 100 k 1M 10 M Signal Frequency – Hz Reset Voltage – V Figure 3. Figure 4. RESET CURRENT vs INPUT CURRENT REFERENCE VOLTAGE OUTPUT vs JUNCTION TEMPERATURE –120 VM = 5 V 2.55 Reference Voltage Output – V VIN Reset Current – mA –100 –80 IR –60 T J = –55 C T J = 125 C –40 2.54 2.53 2.52 2.51 2.50 2.49 2.48 2.47 T J = 25 C –20 2.46 2.45 0 0 –1 –2 –3 –4 –5 –6 –50 0 50 100 150 Junction Temperature – °C Input Voltage – V Figure 6. Figure 5. www.ti.com 5 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) (4) UC2838AJ NRND CDIP J 16 TBD Call TI Call TI -40 to 85 UC2838AN OBSOLETE PDIP N 16 TBD Call TI Call TI -40 to 85 UC2838ANG4 OBSOLETE PDIP N 16 TBD Call TI Call TI -40 to 85 UC2838AQ NRND PLCC FN 20 TBD Call TI Call TI -40 to 85 UC2838AQTR OBSOLETE PLCC FN 20 TBD Call TI Call TI -40 to 85 UC3838ADW OBSOLETE SOIC DW 16 TBD Call TI Call TI 0 to 70 UC2838AN (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 OTHER QUALIFIED VERSIONS OF UC3838A : • Military: UC1838A NOTE: Qualified Version Definitions: • Military - QML certified for Military and Defense Applications Addendum-Page 2 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you (individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms of this Notice. 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