UC1903
UC2903
UC3903
www.ti.com ........................................................................................................................................ SLUS233A – OCTOBER 1999 – REVISED SEPTEMBER 2008
Quad Supply and Line Monitor
FEATURES
DESCRIPTION
1
•
•
•
•
•
•
•
•
Inputs for Monitoring up to Four Separate
Supply Voltage Levels
Internal Inverter for Sensing a Negative Supply
Voltage
Line/Switch Sense Input for Early Power
Source Failure Warning
Programmable Under- and Over-Voltage Fault
Thresholds with Proportional Hysteresis
A Precision 2.5-V Reference
General Purpose Op-Amp for Auxiliary Use
Three High Current, >3 0mA, Open-Collector
Outputs Indicate Over-Voltage, Under-Voltage
and Power OK Conditions
8-V to 40-V Supply Operation with 7-mA
Stand-By Current
The UC1903 family of quad supply and line monitor
integrated circuits will respond to under- and
over-voltage conditions on up to four continuously
monitored voltage levels. An internal op-amp inverter
allows at least one of these levels to be negative. A
separate line/switcher sense input is available to
provide early warning of line or other power source
failures.
The fault window adjustment circuit on these devices
provides easy programming of under- and
over-voltage thresholds. The thresholds, centered
around a precision 2.5-V reference, have an input
hysteresis that scales with the window width for
precise, glitch-free operation. A reference output pin
allows the sense input fault windows to be scaled
independently using simple resistive dividers.
The three open collector outputs on these devices
sink in excess of 30 mA of load current when active.
The under- and over-voltage outputs respond after
separate, user defined, delays to respective fault
conditions. The third output is active during any fault
condition including under- and over-voltage,
line/switcher faults, and input supply under-voltage.
The off state of this output indicates a "power OK"
situation.
BLOCK DIAGRAM
Note: Pin numbers refer to J, N and DW packages.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2008, Texas Instruments Incorporated
UC1903
UC2903
UC3903
SLUS233A – OCTOBER 1999 – REVISED SEPTEMBER 2008 ........................................................................................................................................ www.ti.com
DESCRIPTION (CONT.)
An additional, uncommitted, general purpose op-amp is also included. This op-amp, capable of sourcing 20 mA
of output current, can be used for a number of auxiliary functions including the sensing and amplification of a
feedback error signal when the 2.5-V output is used as a system reference.
These parts operate over an 8-V to 40-V input supply range and require a typical stand-by current of only 7 mA.
CONNECTION DIAGRAMS
DIL-18, SOIC-18
J or N, DW PACKAGE
(TOP VIEW)
6
13
7
12
8
11
9
10
LINE/SWITCHER SENSE
POWER OK
UV DELAY
UV FAULT
OV FAULT
OV DELAY
3
2
G.P. OP-AMP N.I.
14
1 20 19
18 G.P. OP-AMP OUT
GND 4
17 LINE/SWITCHER
WINDOW ADJUST 5
NC 6
SENSE 4 INVERT 7
INPUT
SENSE 4 8
SENSE
16 POWER OK
15 UV DELAY
14 UV FAULT
9 10 11 12 13
OV FAULT
5
OV DELAY
15
+VIN
16
4
G.P. OP-AMP INV
3
VREF (2.5 V)
GND
WINDOW ADJUST
SENSE 4
INVERT INPUT
SENSE 4
SENSE 3
SENSE 2
SENSE 1
G.P. OP-AMP INV.
G.P. OP-AMP N.I.
G.P. OP-AMP OUT
SENSE 2
17
SENSE 1
18
2
GND
1
SENSE 3
+VIN
VREF (2.5 V)
PLCC-20, LCC-20
Q, L PACKAGE
(TOP VIEW)
ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
+VIN
VALUE
UNIT
Supply Voltage
+40
V
Open Collector Output Voltages.
+40
V
Open Collector Output Currents.
50
mA
Sense 1-4 Input Voltages
–0.3 to +20
V
Line/Switcher Sense Input Voltage
–0.3 to +40
V
Op-Amp and Inverter Input Voltages
–0.3 to +40
V
Op-Amp and Inverter Output Currents .
–40
mA
Window Adjust Voltage.
0.0 to +10
V
Delay Pin Voltages
0.0 to +5
V
Reference Output Current
–40
mA
Power Dissipation at TA = 25°C (1)
1000
mW
Power Dissipation at TC = 25°C (1)
2000
mW
Operating Junction Temperature
–55 to +150
°C
Storage Temperature
–65 to +150
C
300
°C
Lead Temperature (Soldering, 10 Seconds)
(1)
2
Voltages are referenced to ground (Pin 3). Currents are positive into, negative out of, the specified terminals. Consult Packaging Section
of Databook for thermal limitations and considerations of package.
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UC2903
UC3903
www.ti.com ........................................................................................................................................ SLUS233A – OCTOBER 1999 – REVISED SEPTEMBER 2008
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, these specifications apply for TA = –55°C to +125°C for the UC1903; –40°C to +85°C for the
UC2903; and 0°C to +70°C for the UC3903; +VIN = 15V; Sense Inputs (Pins 6–9 and Pin 15) = 2.5V; VPIN 4 = 1.0V, TA = TJ.
PARAMETER
TEST CONDITIONS
UC1903 / UC2903
MIN
UC3903
TYP
MAX
7
9
MIN
UNIT
TYP
MAX
7
11
mA
SUPPLY
Input Supply Current
No Faults
UV, OV and Line Fault
Supply Under Voltage Threshold
(VSUV)
Fault Outputs Enabled
6.0
Minimum Supply to Enable Power
OK Output
10
15
7.0
7.5
3.0
4.0
2.5
2.515
2.470
2.535
2.465
5.5
10
18
mA
7.0
8.0
V
3.0
4.0
V
2.5
2.530
V
REFERENCE
Output Voltage (VREF)
TJ = 25°C
2.485
Over Temperature
2.465
Load Regulation
IL = 0 to 10mA
Line Regulation
+VIN = 8 to 40V
Short Circuit Current
TJ = 25°C
1
10
1
4
40
2.535
V
1
15
mV
1
8
mV
40
mA
FAULT THRESHOLDS (1)
OV Threshold Adj.
Offset from VREF as a function of VPIN
4 Input = Low to High, 0.5V ≤ VPIN 4 ≤ 2.5V
0.230
0.25
0.270
0.230
0.25
0.270
V/V
UV Threshold Adj.
Offset from VREF as a function of VPIN
4 Input = High to Low, 0.5V ≤ VPIN 4 ≤ 2.5V
–0.270
–0.25
–0.230
–0.270
–0.25
–0.270
V/V
OV & UV Threshold Hyst.
0.5V ≤ VPIN 4 ≤ 2.5V
20
30
10
OV & UV Threshold Supply
Sensitivity
+VIN = 8V to 40V
0.002
0.01
Adjust Pin (Pin 4) Input Bias Current
0.5V ≤ VPIN 4 ≤ 2.5V
Line Sense Threshold
Input = High to Low
Line Sense Threshold Hyst.
10
20
30
mV/V
0.002
0.02
%/V
µA/V
±1
±10
±1
±12
1.94
2.0
2.06
1.9
2.0
2.1
V
125
175
225
100
175
250
mV
SENSE INPUTS
Sense 1-4 Input Bias Current
Line Sense Input Bias Current
Input = 2.8V (2)
Input = 2.2 (2)
Input = 2.3V (2)
1
3
1
6
µA
–1
–3
–1
-6
µA
1
3
1
6
µA
OV AND UV FAULT DELAY
Charging Current
(1)
(2)
µA
60
60
Threshold Voltage
Delay Pin = Low to High
1.8
1.8
V
Threshold Hysteresis
TJ = 25°C
250
250
mV
Delay
Ratio of Threshold Voltage to Charging
Current
20
30
50
20
30
50
ms/µF
Reference to pin numbers in this specification pertain to 18 pin DIL N and J packages and 18 pin SOIC DW package.
These currents represent maximum input bias currents required as the sense inputs cross appropriate thresholds.
Copyright © 1999–2008, Texas Instruments Incorporated
Product Folder Link(s): UC1903 UC2903 UC3903
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UC2903
UC3903
SLUS233A – OCTOBER 1999 – REVISED SEPTEMBER 2008 ........................................................................................................................................ www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise stated, these specifications apply for TA = –55°C to +125°C for the UC1903; –40°C to +85°C for the
UC2903; and 0°C to +70°C for the UC3903; +VIN = 15V; Sense Inputs (Pins 6–9 and Pin 15) = 2.5V; VPIN 4 = 1.0V, TA = TJ.
PARAMETER
TEST CONDITIONS
UC1903 / UC2903
MIN
TYP
30
70
UC3903
MAX
MIN
TYP
30
70
MAX
UNIT
FAULT OUTPUTS (OV, UV, AND POWER 0K)
Maximum Current
VOUT = 2V
mA
Saturation Voltage
IOUT = 12mA
0.25
0.40
0.25
0.40
V
Leakage Current
VOUT = 40 V
3
25
3
25
µA
2
8
2
10
mV
0.1
2
0.1
4
µA
SENSE 4 INVERTER (3)
Input Offset Voltage
Input Bias Current
Open Loop Gain
PSRR
+VIN = 8 to 40 V
65
80
65
80
65
100
65
100
Unity Gain Frequency
Slew Rate
Short Circuit Current
dB
dB
1
1
MHz
0.4
0.4
V/µs
40
40
mA
TJ = 2°C
G.P. OP-AMP (3)
Input Offset Voltage
Input Bias Voltage
Input Offset Current
Open Loop Gain
1
5
1
8
mV
0.1
2
0.1
4
µA
0.01
.5
0.01
1.0
µA
65
120
65
120
dB
dB
CMRR
VCM = 0 to +VIN = 2.0V
65
100
65
100
PSRR
+VIN = 8 to 40V
65
100
65
100
Unity Gain Frequency
Slew Rate
Short Circuit Current
(3)
4
dB
1
1
MHz
0.4
0.4
V/µs
40
40
mA
TJ = 25°C
When either the G.P. OP-Amp, or the Sense 4 Inverter, are configured for sensing a negative supply voltage, the divider resistance at
the inverting input should be chosen such that the nominal divider current is ≤1.4mA. With the divider current at or below this level
possible latching of the circuit is avoided. Proper operation for currents at or below 1.4mA is 100% tested in production.
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UC1903
UC2903
UC3903
www.ti.com ........................................................................................................................................ SLUS233A – OCTOBER 1999 – REVISED SEPTEMBER 2008
Block Diagram
UC1903
+VIN
REFERENCE
CIRCUIT
IOA
IOB
Q4
1.25 V
Q2
Q1
OV THRESHOLD
Q3
2.5 V
OUTPUT
15 W
R1
2.5 kW
R2
2.5 kW
R3
RA
VADJ RS
A.
TO
OV HYSTERESIS
CONTROL
1.84 kW
R5
VADJ
IO = R4
0.16 kW
R7
0.16 kW
R8
1.84 kW
FAULT WINDOW
THREAHOLD and HYSTERESIS
CIRCUITS
UV THRESHOLD
R4
8 kW
BIAS
CANCELLATION
AND MIRROR
CIRCUITS
R6
IOD
IOC
Q5
TO
UV HYSTERESIS
CONTROL
The UC1903 fault window circuitry generates OV and UV thresholds centered around the 2.5-V reference. Window
magnitude and threshold hysteresis are proportional to the window adjust input voltage at Pin 4.
Figure 1. Operation and Application Information
Typical Characteristics
Typical 2.5 V Reference
vs
Temperature Characteristic
Typical Fault Delay
vs
Temperature Characteristic (CDELAY ≥270 pF)
0.2
0.1
40
- 0.1
35
Delay - ms/mF
Reference Change - %
0
- 0.2
- 0.3
- 0.4
30
- 0.5
25
- 0.6
- 0.7
- 55
- 35 - 15
5
25
45
65
85
TJ - Junction Temperature - °C
105
125
20
- 55
- 35 - 15
5
25
45
65
85
TJ - Junction Temperature - °C
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105
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125
5
UC1903
UC2903
UC3903
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OPERATION AND APPLICATION INFORMATION
Setting a Fault Window
The fault thresholds on the UC1903 are generated by creating positive and negative offsets, equal in magnitude,
that are referenced to the chip’s 2.5-V reference. The resulting fault window is centered around 2.5 V and has a
magnitude equal to that of the applied offsets. Simplified schematics of the fault window and reference circuits
are shown in Figure 1 along with the Typical Characteristics diagrams. The magnitude of the offsets is
determined by the voltage applied at the window adjust pin, Pin 4. A bias cancellation circuit keeps the input
current required at Pin 4 low, allowing the use of a simple resistive divider off the reference to set the adjust pin
voltage.
The adjust voltage at Pin 4 is internally applied across R4, and an 8-kΩ resistor. The resulting current is mirrored
four times to generate current sources IOA, IOB, IOC, and IOD, all equal in magnitude. When all four of the sense
inputs are inside the fault window, a no-fault condition, Q4 and Q5 are turned on. In combination with D1 and D2
this prevents LOB and LOD from affecting the fault thresholds. In this case, the OV and UV thresholds are equal to
VREF + IOA(R5 + R6) and VREF – IOC(R7 + R8) respectively. The fault window can be expressed as:
2.5 V ±
VADJ
4
(1)
In terms of a sensed nominal voltage level, VS, the window as a percent variation is:
VS ± (10 × VADJ )%
(2)
3.125
25
3
20
2.875
15
Hysteresis
2.750
10
2.625
5
Fault
Window
2.5
0
-5
2.375
-10
2.25
No Fault
Supply Fault Window - %
Fault Window at Sense Inputs - V
When a sense input moves outside the fault window given in Equation 1, the appropriate hysteresis control signal
turns off Q4 or Q5. For the under-voltage case, Q5 is disabled and current source IOB flows through D2. The net
current through R7 becomes zero as IOB cancels IOC, giving an 8% reduction in the UV threshold offset. The
overvoltage case is the same, with Q4 turning off, allowing IOD to cancel the current flow, IOA, through R6. The
result is a hysteresis at the sense inputs which is always 8% of the window magnitude. This is shown graphically
in Figure 2.
-15
2.125
Fault
2
-20
Fault
Window
1.875
0
1.5
2
0.5
1
Window Adjust Voltage (VADJ) at Pin 4
-25
2.5
Figure 2. Fault Window and Threshold Hysteresis Scale as a Function of the Voltage Applied at Pin 4
6
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UC2903
UC3903
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Fault Windows Scaled Independently
In many applications, it may be desirable to monitor various supply voltages, or voltage levels, with varying fault
windows. Using the reference output and external resistive dividers this is easily accomplished with the UC1903.
Figure 3 and Figure 4 illustrate how the fault window at any sense input can be scaled independently of the
remaining inputs.
Monitored
Supply Voltage
VS
UC1903
R1
SENSE 1-4 INPUT
R2
R3
2.5 V
REF.
Fault window for the Sense Input,
in percent, is:
R 3 + R 1R 2 /(R1 + R 2)
–10 (VADJ) •
,
R3
for:
VS (NOM) •
A.
R2
= 2.5V
R1 + R2
Using the reference output and a resistive divider, a sense input with an independently wider fault window can be
generated.
Figure 3. UC1903 Sense Input with an Independently Wider Fault Window
UC1903
R1
G.P. OP-AMP
SENSE
INPUT
R2
2.5 V
REF.
SENSE 1-4 INPUT
Fault window for the sense input, in percent, is:
±10 (VADJ) •
A.
R2
R1 + R2
The general purpose op-amp on the UC1903 can be used to create a sense input with an independently tighter fault
window.
Figure 4. UC1903 Sense Input with an Independently Tighter Fault Window
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Figure 4 demonstrates one of many auxiliary functions that the uncommitted op-amp on the UC1903 can be used
for. Alternatively, this op-amp can be used to buffer high impedance points, perform logic functions, or for
sensing and amplification. For example, the G.P. op-amp, combined with the 2.5-V reference, can be used to
produce and buffer an optically coupled feedback signal in isolated supplies with primary side control. The output
stage of this op-amp is detailed in Figure 5. The NPN emitter follower provides high source current capability.
≥20 mA while the substrate device, Q3, provides good transient sinking capability.
+VIN
75 mA
Q1
Q2
R1
10 kW
UC1903
G.P. OP-AMP D1
OUTPUT STAGE
Q6
R2
15 W
R3
150 W
TO OP-AMP
INPUT STAGE
Q3
Q5
Q4
R4
500 W
A.
16
OUTPUT
150 mA
The G.P. op-amp on the UC1903 has a high source current (20 mA) capability and enhanced transient sinking
capability through substrate device Q3.
Figure 5. The G.P. Op-Amp on the UC1903
Sensing a Negative Voltage Level
The UC1903 has a dedicated inverter coupled to the sense 4 input. With this inverter, a negative voltage level
can be sensed as shown in Figure 6. The output of the inverter is an unbiased emitter follower. By tying the
inverting input, Pin 5, high the output emitter follower will be reverse biased, leaving the sense 4 input in a high
impedance state. In this manner, the sense 4 input can be used, as the remaining sense inputs would be, for
sensing positive voltage levels.
UC1903
SENSE 4 INPUT
2.5 V
R1
VS
R2
SENSE 4
INVERTER
GROUND
NEGATIVE
SUPPLY (-VS)
VS (NOM) = 2.5 V
Note: A similar scheme w/the G.P. op-amp will allow a second negative supply to be monitored.
Figure 6. Inverting the Sense 4 Input for Monitoring a Negative Supply, Accommodated with the
Dedicated Inverter
8
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UC2903
UC3903
www.ti.com ........................................................................................................................................ SLUS233A – OCTOBER 1999 – REVISED SEPTEMBER 2008
Using The Line/Switcher Sense Output
The line switcher sense input to the UC1903 can be used for early detection of line, switcher, or other power
source, failures. Internally referenced to 2.0 V, the line sense comparator will cause the POWER OK output to
indicate a fault (active low) condition when the LINE/SWITCHER SENSE input goes from above to below 2.0 V.
The line sense comparator has approximately 175 mV of hysteresis requiring the line/switcher input to reach
2.175 V before the POWER OK output device can be turned off, allowing a no-fault indication. In Figure 7 an
example showing the use of the LINE/SWITCHER SENSE input for early switcher-fault detection is detailed. A
sample signal is taken from the output of the power transformer, rectified and filtered, and used at the
line/switcher input. By adjusting the R2C time constant with respect to the switching frequency of the supply and
the hold up time of the output capacitor, switcher faults can be detected before supply outputs are significantly
affected.
POWER
LINE
INPUT TRANSFORMER FILTER
Figure 7. Line/Switcher Sense Input Used for Early Line or Switcher Fault Indication
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OV and UV Comparators Maintain Accurate Thresholds
The structure of the OV and UV comparators, shown in Figure 8 results in accurate fault thresholds even in the
case where multiple sense inputs cross a fault threshold simultaneously. Unused sense inputs can be tied either
to the 2.5-V reference, or to another, utilized, sense input. The four under- and over-voltage sense inputs on the
UC1903 are clamped as detailed on the Sense 1 input in Figure 8. The series 2-kΩ resistor, R1, and zener diode
Z1, prevent extreme under- and over-voltage conditions from inverting the outputs of the fault comparators. A
parasitic diode, D1, is present at the inputs as well. Under normal operation it is advisable to insure that voltage
levels at all of the sense inputs stay above –0.3 V. The same type of input protection exists at the line sense
input, Pin 15, except a 5-kΩ series resistor is used.
The fault delay circuitry on the UC1903 is also shown in Figure 8. In the case of an over-voltage condition at one
of the sense inputs Q20 is turned off, allowing the internal 60-mA current source to charge the user-selected
delay capacitor. When the capacitor voltage reaches 1.8 V, the OV and POWER OK outputs become active low.
When the fault condition goes away Q20 is turned back on, rapidly discharging the delay capacitor. Operation of
the under- voltage delay is, with appropriate substitutions, the same.
6.4 V
6.4 V
EXT.
OV DELAY
CAPACITOR
60 mA
Q6
Q7
Q8
Q9
Q20
1.8 V
OV COMPARATOR
Q1
Q2
Q3
Q4
SENSE 1
2 kW
100 mA
R1
D1
OV
TO OV
HYSTERESIS
THRESHOLD CONTROL
VOLTAGE
Z1
5.7 V
6.4 V
50 mA
SENSE 2
SENSE 3
SENSE 4
Q10
Q11
Q12
Q13
UV COMPARATOR
TO UV
THRESHOLD
UV
VOLTAGE HYSTERESIS
Q14
CONTROL
Q16 Q17
VREF
EXT.
UV DELAY
CAPACITOR
6.4 V
60 mA
Q19
Q15
A.
Q5
OV FAULT
INDICATION
TO OUTPUT
LOGIC
Q18
1.8 V
UV FAULT
INDICATION
TO OUTPUT
LOGIC
The OV and UV comparators on the UC1903 trigger respective fault delay circuits when one or more of the sense
inputs move outside the fault window. Input clamps insure proper operation under extreme fault conditions.
Terminating the UV delay capacitor to VREF assures correct logic at power up.
Figure 8. OV and UV Comparators on the UC1903
Start Latch and Supply Under-Voltage Sense Allow Predictable Power-Up
At power-Up, while the +VIN input supply is below 3 V, all open collector outputs are off. With +VIN greater than 3
V the POWER OK output will be driven low and the UV OV FAULT outputs are disabled. Once +VIN rises above
the VSUV threshold of 7 V the fault outputs will be enabled. As would be expected, the SENSE 1-4 voltages at
power up may be below the UVFAULT window and the UVFAULT output may be driven low.
10
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PACKAGE OPTION ADDENDUM
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24-Aug-2018
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
5962-88697012A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
596288697012A
UC1903L/
883B
5962-8869701VA
ACTIVE
CDIP
J
18
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8869701VA
UC1903J/883B
UC1903J
ACTIVE
CDIP
J
18
1
TBD
A42
N / A for Pkg Type
-55 to 125
UC1903J
UC1903J883B
ACTIVE
CDIP
J
18
1
TBD
A42
N / A for Pkg Type
-55 to 125
5962-8869701VA
UC1903J/883B
UC1903L
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
UC1903L
UC1903L883B
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
596288697012A
UC1903L/
883B
UC2903DW
ACTIVE
SOIC
DW
18
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
UC2903DW
UC2903DWG4
ACTIVE
SOIC
DW
18
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
UC2903DW
UC2903DWTR
ACTIVE
SOIC
DW
18
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
-40 to 85
UC2903DW
UC2903Q
NRND
PLCC
FN
20
46
Green (RoHS
& no Sb/Br)
CU SN
Level-2-260C-1 YEAR
-40 to 85
UC2903Q
UC3903DW
ACTIVE
SOIC
DW
18
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
0 to 70
UC3903DW
UC3903DWTR
ACTIVE
SOIC
DW
18
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
0 to 70
UC3903DW
UC3903Q
NRND
PLCC
FN
20
46
Green (RoHS
& no Sb/Br)
CU SN
Level-2-260C-1 YEAR
0 to 70
UC3903Q
UC3903QG3
NRND
PLCC
FN
20
46
Green (RoHS
& no Sb/Br)
CU SN
Level-2-260C-1 YEAR
0 to 70
UC3903Q
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
24-Aug-2018
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
