UC3543N

UC1543,, UC1544 UC2543, UC2544 UC3543, UC3544 www.ti.com SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007 Power Supply Supervisory Circuit FEATURES • • • • • • • Both over- and under-voltage sensing circuits can be externally programmed for minimum time duration of fault before triggering. All functions contain open collector outputs which can be used independently or wire-or’ed together, and although the SCR trigger is directly connected only to the over-voltage sensing circuit, it may be optionally activated by any of the other outputs, or from an external signal. The O.V. circuit also includes an optional latch and external reset capability. Includes Over-Voltage, Under-Voltage, and Current Sensing Circuits Internal 1% Accurate Reference Programmable Time Delays SCR “Crowbar” Drive of 300 mA Remote Activation Capability Optional Over-Voltage Latch Uncommitted Comparator Inputs for Low Voltage Sensing (UC1544 Series Only) DESCRIPTION The monolithic integrated circuits contain all the functions necessary to monitor and control the output of a sophisticated power supply system. Over-voltage (O.V.) sensing with provision to trigger an external SCR “crowbar” shutdown; an undervoltage (U.V.) circuit which can be used to monitor either the output or to sample the input line voltage; and a third op amp/comparator usable for current sensing (C.L.) are all included in this device, together with an independent, accurate reference generator. The UC1544/2544/3544 devices have the added versatility of completely uncommitted inputs to the voltage sensing comparators so that levels less than 2.5 V may be monitored by dividing down the internal reference voltage. The current sense circuit may be used with external compensation as a linear amplifier or as a highgain comparator. Although nominally set for zero input offset, a fixed threshold may be added with an external resistor. Instead of current limiting, this circuit may also be used as an additional voltage monitor. The reference generator circuit is internally trimmed to eliminate the need for external potentiometers and the entire circuit may be powered directly from either the output being monitored or from a separate bias voltage. BLOCK DIAGRAM NOTE: For each terminal, first number refers to 1543 series, second to 1544 series. *On 1543 series, this function is internally connected to VREF. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1997–2007, Texas Instruments Incorporated UC1543,, UC1544 UC2543, UC2544 UC3543, UC3544 www.ti.com SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007 Connection Diagrams UC 1543 UC 2543 UC 3543 DIL-16, SOIC-16 (TOP VIEW) J or N, DW Package (Also W Package for the UC1543 Only) DIL-18, SOIC-18 (TOP VIEW) J or N, DW Package SCR Trigger SCR Trigger 1 16 VIN Remote Activate 2 15 VREF Reset 3 14 Ground O.V. Indicate 4 13 C.L. Output O.V. Delay 5 12 Offset/Comp O.V. Input 6 11 C.L. N.I. Input U.V. Input 7 10 C.L. INV. Input U.V. Delay 8 9 U.V. Indicate PLCC-20, LCC-20 (TOP VIEW) Q or L Package 3 2 1 20 PACKAGE PIN FUNCTION FUNCTION PIN 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 N/C SCR Trigger Remote Activate Reset O.V. Indicate N/C O.V. Delay O.V. Input N/C N/C U.V. Input U.V. Delay U.V. Indicate C.L. INV. Input C.L. N.I. Input Offset/Comp C.L. Output Ground VREF VIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 UC 1544 UC 2544 UC 3544 1 18 VIN Remote Activate 2 17 VREF Reset 3 16 Ground O.V. Indicate 4 15 C.L. Output O.V. Delay 5 14 Offset/Comp O.V. N.I. Input 6 13 C.L. N.I. Input O.V. Inv. Input 7 12 C.L. INV. Input U.V. N.I. Input 8 11 U.V. Indicate U.V. Inv. Input 9 10 U.V. Delay PLCC-20, LCC-20 (TOP VIEW) Q or L Package 3 2 1 20 PACKAGE PIN FUNCTION FUNCTION PIN 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 N/C SCR Trigger Remote Activate Reset O.V. Indicate N/C O.V. Delay O.V. N.I. Input O.V. INV. Input U.V. N.I. Input U.V. INV. Input U.V. Delay U.V. Indicate C.L. INV. Input C.L. N.I. Input Offset/Comp C.L. Output Ground VREF VIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VALUE VIN Input supply voltage 40 Sense inputs, voltage range SCR trigger current 0 to VIN (2) -600 Tstg (1) (2) 2 V mA Indicator output voltage 40 V Indicator output sink current 50 mA 1000 mW Power dissipation (package limitation) TJ UNIT Operating temperature range UC1543, UC1544 -55 to 125 UC2543, UC2544 -25 to 85 UC3543, UC3544 0 to 70 Storage temperature range -65 to 150 Currents are positive-into, negative-out of the specified terminal. At higher input voltages, a dissipation limiting resistor, RG, is required. Submit Documentation Feedback °C UC1543,, UC1544 UC2543, UC2544 UC3543, UC3544 www.ti.com SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS Unless otherwise stated, these specifications apply for TA = -55°C to 125°C for theUC1543 and UC1544; -25°C to 85°C for the UC2543 and UC2544; and 0°C to 70°C for the UC3543 and UC3544. Electrical tests are performed with VIN = 10 V and 2-kΩ pull-up resistors on all indicator outputs. All electrical specifications for the UC1544, UC2544, and UC3544 devices are tested with the inverting over-voltage input and the non-inverting under-voltage input externallyconnected to the 2.5 V reference. TA = TJ. PARAMETER TEST CONDITIONS UC1543/UC1544/UC2543/ UC2544 MIN VIN Input voltage range ICC Supply current TYP UC3543/UC3544 MAX MIN TYP UNIT MAX TJ = 25°C to TMAX 4.5 40 4.5 40 TMIN to TMAX 4.7 40 4.7 40 VIN = 40 V, output open, TJ = 25°C 7 TMIN≤ TJ≤ TMAX 10 7 15 10 V mA 15 Reference Section VOUT Output voltage TJ = 25°C 2.48 Over temperature range 2.45 2.5 2.52 2.45 2.55 2.40 2.50 2.55 2.60 Line regulation VIN = 5 to 30 V 1 5 1 5 Load regulation IREF = 0 to 10 mA 1 10 1 10 Short circuit current VREF = 0 -20 -40 -20 -40 -10 Temperature stability -12 50 50 V mV mA ppm/°C SCR Trigger Section Peak output current VIN = 5V, RG = 0, VO = 0 Peak output voltage VIN = 15 V, IO = -100 mA -100 -300 12 13 -600 -100 -300 12 13 Output OFF voltage VIN = 40 V Remote activate current R/A Pin = GND Remote activate voltage R/A Pin Open Reset current Reset = GND, R/A = GND Reset voltage Reset open, R/A = GND Output current rise time RL = 50, TJ = 25°C, CD = 0 400 400 Prop. delay from R/A RL = 50, TJ = 25°C, CD = 0 300 300 Prop. delay from O/V input RL = 50, TJ = 25°C, CD = 0 500 500 -600 0 0.1 0 0.1 -0.4 -0.8 -0.4 -0.8 2 6 2 6 -0.4 -0.8 -0.4 -0.8 2 6 2 6 mA V mA V mA V mA/µs ns Comparator Section Input threshold (Input voltage rising on O.V. and falling on U.V.) TJ = 25°C 2.45 Over temperature range 2.40 Input hysteresis Input bias current 2.50 2.55 2.40 2.60 2.35 25 Sense input = 0 V 2.50 2.60 2.65 25 mV -0.3 -1.0 -0.3 -1.0 Delay saturation 0.2 0.5 0.2 0.5 Delay high level 6 7 6 7 V µA VO = 0 -250 -300 -250 -300 Indicate saturation IL = 10 mA 0.2 0.5 0.2 0.5 V Indicate leakage VIND = 40 V 0.01 1.0 0.01 1.0 µA Input over drive = 200 mV, TJ = 25°C, CD = 0 400 400 ns Input over drive = 200 mV, TJ = 25°C, CD = 1 µF 10 10 ms Submit Documentation Feedback -200 µA Delay charging current Propagation delay -200 V 3 UC1543,, UC1544 UC2543, UC2544 UC3543, UC3544 www.ti.com SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS (continued) Unless otherwise stated, these specifications apply for TA = -55°C to 125°C for theUC1543 and UC1544; -25°C to 85°C for the UC2543 and UC2544; and 0°C to 70°C for the UC3543 and UC3544. Electrical tests are performed with VIN = 10 V and 2-kΩ pull-up resistors on all indicator outputs. All electrical specifications for the UC1544, UC2544, and UC3544 devices are tested with the inverting over-voltage input and the non-inverting under-voltage input externallyconnected to the 2.5 V reference. TA = TJ. Current Limit Section Input voltage range Input Bias Current Input offset voltage VIN -3V V Offset pin open, VCM = 0 0 -0.3 VIN -3V -1.0 0 -0.3 -1.0 µA Offset pin open, VCM = 0 0 10 0 10 120 80 100 120 10k from offset pin to GND 80 100 CMRR 0 ≤ VCM≤ 12 V, VIN = 15 V 60 70 60 70 AVOL Offset pin open, VCM = 0 V, RL = 10 kΩ to 15 kΩ, VOUT = 1 to 6 V 72 80 72 80 Output saturation IL = 10 mA 0.2 0.5 0.2 0.5 Output leakage VIND = 40 V 0.01 1.0 0.01 1.0 Small signal bandwidth AV = 0dB, TJ = 25°C Propagation delay VOVERDRIVE = 100 mV, TJ = 25°C 5 5 200 200 TYPICAL CHARACTERISTICS Figure 1. 4 Figure 2. Submit Documentation Feedback mV dB V µA MHz ns UC1543,, UC1544 UC2543, UC2544 UC3543, UC3544 www.ti.com SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007 Current Limit Input Threshold ID Figure 3. Figure 4. Current Limit Amplifier Gain Current Limit Amplifier Frequency Response Figure 5. Figure 6. Submit Documentation Feedback 5 UC1543,, UC1544 UC2543, UC2544 UC3543, UC3544 www.ti.com SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007 APPLICATION INFORMATION The values for the external components are determined as follows: VTH = Current limit input threshold, 1000 R1 CS is determined by the current loop dynamics IP @ VTH VO æ R 2 ö + ç ÷ RSC RSC è R 2 + R3 ø I SC = VTH RSC Peak current to load, Short circuit current, VO( low ) = Low output voltage limit, 2.5( R 4 + R5 + R6 ) R5 + R 6 VO( high ) = High output voltage limit, 2 .5( R 4 + R 5 + R 6 ) R6 Voltage sensing delay, tD = 10,000Cd RG > SCR trigger power limiting resistor, VIN - 5 0 .2 Figure 7. Typical Application 6 Submit Documentation Feedback UC1543,, UC1544 UC2543, UC2544 UC3543, UC3544 www.ti.com SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007 APPLICATION INFORMATION (continued) Figure 8. Sensing Multiple Supply Voltages Figure 9. Input Line Monitor Submit Documentation Feedback 7 UC1543,, UC1544 UC2543, UC2544 UC3543, UC3544 www.ti.com SLUS188A – APRIL 1997 – REVISED FEBRUARY 2007 APPLICATION INFORMATION (continued) Figure 10. Overcurrent Shutdown 8 Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 29-May-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) 5962-8774001EA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8774001EA UC1543J/883B 5962-8774001FA ACTIVE CFP W 16 25 TBD A42 N / A for Pkg Type 5962-8774002VA OBSOLETE CDIP J 18 TBD Call TI Call TI -55 to 125 UC1543J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 UC1543J UC1543J883B ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -55 to 125 5962-8774001EA UC1543J/883B UC1543L ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 UC1543L UC1543L883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 UC1543L/ 883B UC1543W883B ACTIVE CFP W 16 25 TBD A42 N / A for Pkg Type 5962-8774001FA UC1543W/883B 5962-8774001FA UC1543W/883B UC1544J OBSOLETE CDIP J 18 TBD Call TI Call TI -55 to 125 UC1544J883B OBSOLETE CDIP J 18 TBD Call TI Call TI -55 to 125 UC1544L OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 UC1544L883B OBSOLETE LCCC FK 20 TBD Call TI Call TI -55 to 125 UC2543DW NRND SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2543DW UC2543DWG4 NRND SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2543DW UC2543J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type -25 to 85 UC2543J UC2543N LIFEBUY PDIP N 16 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 UC2543N UC2543NG4 LIFEBUY PDIP N 16 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 UC2543N UC2544-W ACTIVE WAFERSALE YS 0 TBD Call TI Call TI UC2544DW NRND SOIC DW 18 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 UC2544DW UC2544J OBSOLETE CDIP J 18 TBD Call TI Call TI -40 to 85 40 Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 29-May-2015 Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) UC2544N LIFEBUY PDIP N 18 20 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type -40 to 85 UC2544N UC3543J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type 0 to 70 UC3543J UC3543N LIFEBUY PDIP N 16 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 UC3543N UC3543NG4 LIFEBUY PDIP N 16 25 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 UC3543N UC3544J OBSOLETE CDIP J 18 TBD Call TI Call TI 0 to 70 UC3544N LIFEBUY PDIP N 18 20 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 UC3544N UC3544NG4 LIFEBUY PDIP N 18 20 Green (RoHS & no Sb/Br) CU NIPDAU N / A for Pkg Type 0 to 70 UC3544N (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Addendum-Page 2 Samples PACKAGE OPTION ADDENDUM www.ti.com 29-May-2015 (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF UC1543, UC1544, UC2543, UC2543M, UC3543, UC3543M, UC3544 : • Catalog: UC3543, UC3544, UC2543, UC3543M, UC3543 • Military: UC2543M, UC1543, UC1543, UC1544 NOTE: Qualified Version Definitions: • Catalog - TI's standard catalog product • Military - QML certified for Military and Defense Applications Addendum-Page 3 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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