UCC23313DWY

UCC23313 ZHCSK80B – SEPTEMBER 2019 – REVISED OCTOBER 2020 UCC23313 4A 拉电流、5A 灌电流、3.75kVRMS 光兼容 单通道隔离式栅极驱动器 1 特性 3 说明 • 具有光兼容输入的 3.75kVRMS 单通道隔离式栅极驱 动器 • 适用于光隔离式栅极驱动器的引脚对引脚普适版升 级 • 可输出 4.5A 峰值拉电流、5.3A 峰值灌电流 • 最高 33V 输出驱动器电源电压 • 8V (B) 和 12V VCC UVLO 选项 • 轨到轨输出 • 105ns（最大值）传播延迟 • 25ns（最大值）器件间延迟匹配 • 35ns（最大值）脉宽失真度 • 150kV/μs（最小值）共模瞬态抗扰度 (CMTI) • 隔离栅寿命大于 50 年 • 输入级具有 13V 反极性电压处理能力，支持互锁 • 扩展型 SO-6 封装，爬电距离和间隙大于 8.5mm • 运行结温 TJ：–40°C 至 +150°C • 安全相关认证（计划）： – 符合 DIN V VDE V0884-11:2017-01 标准的 6000VPK 基础型隔离 – 符合 UL 1577 标准且长达 1 分钟的 3.75kVRMS 隔离 – 获得 CQC 认证，符合 GB4943.1-2011 标准 UCC23313 是一款适用于 IGBT、MOSFET 和 SiC MOSFET 的光兼容单通道隔离式栅极驱动器，具有 4.5A 峰值拉电流和 5.3A 峰值灌电流以及 3.75kVRMS 基本隔离额定值。由于具有 33V 的高电源电压范围， 因此允许使用双极电源来有效驱动 IGBT 和 SiC 功率 FET。UCC23313 可以驱动低侧和高侧功率 FET。与 基于光耦合器的标准栅极驱动器相比，此器件的主要特 性可显著提高性能和可靠性，同时在原理图和布局设计 中保持引脚对引脚兼容性。性能亮点包括高共模瞬态抗 扰度 (CMTI)、低传播延迟和小脉宽失真。严格的过程 控制可实现较小的器件间偏移。输入级是仿真二极管 (e-diode)，这意味着与光耦合器栅极驱动器中传统的 LED 相比，可靠性和老化特性更为出色。该器件采用 扩展型 SO6 封装，爬电距离和间隙大于 8.5mm，塑封 材料（材料组 I）的相对漏电起痕指数 (CTI) 大于 600V。UCC23313 具有高性能和高可靠性，因此非常 适合用于所有类型的电机驱动器、光伏逆变器、工业电 源和电器。更高的工作温度为传统光耦合器以前无法支 持的应用开辟了机会。 2 应用 • • • • 器件信息(1) 器件型号 UCC23313 (1) 工业电机控制驱动 工业用电源，UPS 光伏逆变器 感应加热 NC 2 ISOLATION ANODE 1 封装 封装尺寸（标称值） 扩展型 SO-6 7.5mm x 4.68mm 如需了解所有可用封装，请参阅数据表末尾的可订购产品附 录。 6 VCC UVLO e 5 VOUT BARRIER 4 VEE CATHODE 3 功能方框图 本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。 English Data Sheet: SLUSDS6 UCC23313 www.ti.com.cn ZHCSK80B – SEPTEMBER 2019 – REVISED OCTOBER 2020 Table of Contents 1 特性................................................................................... 1 2 应用................................................................................... 1 3 说明................................................................................... 1 4 Revision History.............................................................. 2 5 Pin Configuration and Function.....................................3 Pin Functions.................................................................... 3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Information....................................................4 6.5 额定功率......................................................................5 6.6 Insulation Specifications............................................. 6 6.7 Safety-Related Certifications...................................... 7 6.8 安全限值......................................................................7 6.9 Electrical Characteristics.............................................8 6.10 开关特性....................................................................8 6.11 Insulation Characteristics Curves..............................9 6.12 Typical Characteristics............................................ 10 7 Parameter Measurement Information.......................... 13 7.1 Propagation Delay, rise time and fall time.................13 7.2 IOH and IOL testing.....................................................13 7.3 CMTI Testing.............................................................13 8 Detailed Description......................................................14 8.1 Overview................................................................... 14 8.2 Functional Block Diagram......................................... 14 8.3 Feature Description...................................................15 8.4 Device Functional Modes..........................................19 9 Application and Implementation.................................. 20 9.1 Application Information............................................. 20 9.2 Typical Application.................................................... 21 10 Power Supply Recommendations..............................27 11 Layout........................................................................... 28 11.1 Layout Guidelines................................................... 28 11.2 Layout Example...................................................... 29 11.3 PCB Material........................................................... 32 12 Mechanical, Packaging, and Orderable Information.................................................................... 33 4 Revision History 注：以前版本的页码可能与当前版本的页码不同 Changes from Revision A (October 2019) to Revision B (October 2020) Page • Added UCC23511B orderble to include 8-V UVLO option..................................................................................8 Changes from Revision * (September 2019) to Revision A (October 2019) Page • Changed Minimum internal gap unit from mm to µm. ........................................................................................6 2 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated English Data Sheet: SLUSDS6 UCC23313 www.ti.com.cn ZHCSK80B – SEPTEMBER 2019 – REVISED OCTOBER 2020 5 Pin Configuration and Function 1 ANODE 2 NC 3 CATHODE 6 VCC 5 VOUT 4 VEE 图 5-1. UCC23313 Package SO-6 Top View Pin Functions PIN NAME NO. TYPE(1) DESCRIPTION UCC23313 ANODE 1 I Anode CATHODE 3 I Cathode NC 2 - No Connection VCC 6 P Positive output supply rail VEE 4 P Negative output supply rail VOUT 5 O Gate-drive output (1) P = Power, G = Ground, I = Input, O = Output Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 3 English Data Sheet: SLUSDS6 UCC23313 www.ti.com.cn ZHCSK80B – SEPTEMBER 2019 – REVISED OCTOBER 2020 6 Specifications 6.1 Absolute Maximum Ratings Over operating free air temperature range (unless otherwise noted)(1) Average Input Current IF(AVG) Peak Transient Input Current IF(TRAN) 8.5 mm CPG External Creepage(1) Shortest terminal-to-terminal distance across the package surface >8.5 mm DTI Distance through the insulation Minimum internal gap (internal clearance) >17 µm CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 >600 V Material Group According to IEC 60664-1 I Rated mains voltage ≤ 600 VRMS I-IV Rated mains voltage ≤ 1000 VRMS I-III Maximum repetitive peak isolation voltage AC voltage (bipolar) 990 Maximum isolation working voltage AC voltage (sine wave); time-dependent dielectric 700 breakdown (TDDB) test; see Figure 1 VRMS DC voltage 990 VDC Overvoltage category per IEC 60664-1 DIN V VDE 0884-11 (VDE V 0884-11)(2) VIORM VIOWM VPK VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60 sec (qualification) VTEST = 1.2 × VIOTM, t = 1 s (100% production) 5300 VPK VIOSM Maximum surge isolation voltage(3) Test method per IEC 62368, 1.2/50 ms waveform, 6000 VTEST = 1.6 x VIOSM = 9600 VPK (qualification) VPK Method a: After I/O safety test subgroup 2/3,Vini = VIOTM, ≤5 tini = 60 s; Vpd(m) = 1.2 x VIORM = 1188 VPK, tm = 10 s Apparent charge(4) qpd Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.6 x VIORM = 1584 VPK, tm = 10 s ≤5 pC Method b1: At routine test (100% production) and preconditioning (type test), Vini = VIOTM, tini = 1 s; ≤5 Vpd(m) = 1.875 x VIORM = 1856VPK, tm = 1 s Barrier capacitance, input to output(5) CIO Insulation resistance, input to output(5) RIO VIO = 0.4 x sin (2πft), f = 1 MHz 0.5 VIO = 500 V, TA = 25°C >1012 VIO = 500 V, 100°C ≤ TA ≤ 125°C >1011 VIO = 500 V at TS = 150°C >109 Pollution degree 2 Climatic category 40/125/21 pF Ω UL 1577 VISO (1) (2) (3) (4) (5) 6 Withstand isolation voltage VTEST = VISO = 3750 VRMS, t = 60 s (qualification), VTEST = 1.2 x VISO = 4500 VRMS, t = 1 s (100% 3750 production) VRMS Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed-circuit board are used to help increase these specifications. This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits. Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier. Apparent charge is electrical discharge caused by a partial discharge (pd). All pins on each side of the barrier tied together creating a two-pin device. Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated English Data Sheet: SLUSDS6 UCC23313 www.ti.com.cn ZHCSK80B – SEPTEMBER 2019 – REVISED OCTOBER 2020 6.7 Safety-Related Certifications VDE UL Plan to certify according to DIN V VDE V 0884-11: 2017-01 Plan to certify according to UL 1577 Component Recognition Program Basic insulation Maximum transient isolation voltage, 5300 VPK; Maximum repetitive peak isolation voltage, 990 VPK; Maximum surge isolation voltage, 6000 VPK Single protection, 3750 VRMS Certificate planned Certificate planned CQC Plan to certify according to GB4943.1-2011 Certificate planned 6.8 安全限值 参数 IS 安全输入、输出或电源电流 PS 安全输入、输出或总电源 TS 最高安全温度(1) (1) 测试条件 最小值 典型值 最大值 RqJA = 126°C/W，VI = 15V，TJ = 150°C，TA = 25°C 50 RqJA = 126°C/W，VI = 30V，TJ = 150°C，TA = 25°C 25 RqJA = 126°C/W，TJ = 150°C，TA = 25°C 单位 mA 750 mW 150 °C 最高安全温度 TS 与器件指定的最大结温 TJ 的值相同。IS 和 PS 参数分别表示安全电流和安全功率。请勿超出 IS 和 PS 的最大限值。这 些限值随环境温度 TA 的变化而变化。“热性能信息”表中的结至空气热阻 RqJA 所属器件安装在引线式表面贴装封装对应的高 K 测试板 上。可以使用这些公式计算每个参数的值：TJ = TA + RqJA × P，其中 P 为器件中耗散的功率。TJ(max) = TS = TA + RqJA × PS，其中 TJ(max) 为允许的最大结温。PS = IS × VI，其中 VI 为最大输入电源电压。 Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 7 English Data Sheet: SLUSDS6 UCC23313 www.ti.com.cn ZHCSK80B – SEPTEMBER 2019 – REVISED OCTOBER 2020 6.9 Electrical Characteristics Unless otherwise noted, all typical values are at TA = 25°C, VCC–VEE= 15V, VEE= GND. All min and max specifications are at recommended operating conditions (TJ = -40C to 150°C, IF(on)= 7 mA to 16 mA, VEE= GND, VCC= 15 V to 30 V, VF(off)= – 5V to 0.8V) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT IFLH Input forward threshold current low to High VOUT > 5 V, Cg = 1 nF 1.5 2.8 4 VF Input Forward Voltage IF =10 mA 1.8 2.1 2.4 mA V VF_HL Threshold input voltage High to low V < 5 V, Cg = 1 nF 0.9 ΔVF/ΔT Temp coefficient of Input forward voltage IF =10 mA 1 1.35 mV/°C VR Input Reverse Breakdown voltage IR= 10 uA CIN Input Capacitance F = 0.5 MHz High Level Peak Output Current IF = 10 mA, VCC =15V, CLOAD=0.18uF, CVDD=10uF, pulse width 150kV/us. The e-diode input stage along with capacitive isolation technology gives UCC23313 several performance advantages over standard opto isolated gate drivers. They are as follows: 1. 1. Since the e-diode does not use light emission for its operation, the reliability and aging characteristics of UCC23313 are naturally superior to those of standard opto isolated gate drivers. 2. Higher ambient operating temperature range of 125°C, compared to only 105°C for most opto isolated gate drivers 3. The e-diode forward voltage drop has less part-to-part variation and smaller variation across temperature. Hence, the operating point of the input stage is more stable and predictable across different parts and operating temperature. 4. Higher common mode transient immunity than opto isolated gate drivers 5. Smaller propagation delay than opto isolated gate drivers 6. Due to superior process controls achievable in capacitive isolation compared to opto isolation, there is less part-to-part skew in the prop delay, making the system design simpler and more robust 7. Smaller pulse width distortion than opto isolated gate drivers The signal across the isolation has an on-off keying (OOK) modulation scheme to transmit the digital data across a silicon dioxide based isolation barrier (see 图 8-1). The transmitter sends a high-frequency carrier across the barrier to represent one digital state and sends no signal to represent the other digital state. The receiver demodulates the signal after advanced signal conditioning and produces the output through a buffer stage. The UCC23313 also incorporates advanced circuit techniques to maximize the CMTI performance and minimize the radiated emissions from the high frequency carrier and IO buffer switching. 图 8-2 shows conceptual detail of how the OOK scheme works. 8.2 Functional Block Diagram Receiver NC IF VBIAS Vclamp Cathode VCC UVLO RNMOS VEE Amplifier Oscillator ISOLATION Anode BARRIER Transmitter Demodulator ROH Level Shift / Pre driver VOUT ROL VEE 图 8-1. Conceptual Block Diagram of a Isolated Gate Driver with an Opto Emulated Input Stage (SO6 pkg) 14 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated English Data Sheet: SLUSDS6 UCC23313 www.ti.com.cn ZHCSK80B – SEPTEMBER 2019 – REVISED OCTOBER 2020 IF IN Carrier signal through isolation barrier RX OUT 图 8-2. On-Off Keying (OOK) Based Modulation Scheme 8.3 Feature Description 8.3.1 Power Supply Since the input stage is an emulated diode, no power supply is needed at the input. The output supply, VCC, supports a voltage range from 10 V to 33 V. For operation with bipolar supplies, the power device is turned off with a negative voltage on the gate with respect to the emitter or source. This configuration prevents the power device from unintentionally turning on because of current induced from the Miller effect. The typical values of the VCC and VEE output supplies for bipolar operation are 15V and -8V with respect to GND for IGBTs, and 20V and -5V for SiC MOSFETs. For operation with unipolar supply, the VCC supply is connected to 15V with respect to GND for IGBTs, and 20V for SiC MOSFETs. The VEE supply is connected to 0V. 8.3.2 Input Stage The input stage of UCC23313 is simply the e-diode and therefore has an Anode (Pin 1) and a Cathode (Pin 3). Pin 2 has no internal connection and can be left open or connected to ground. The input stage does not have a power and ground pin. When the e-diode is forward biased by applying a positive voltage to the Anode with respect to the Cathode, a forward current IF flows into the e-diode. The forward voltage drop across the e-diode is 2.1V (typ). An external resistor should be used to limit the forward current. The recommended range for the forward current is 7mA to 16mA. When IF exceeds the threshold current IFLH(2.8mA typ.) a high frequency signal is transmitted across the isolation barrier through the high voltage SiO2 capacitors. The HF signal is detected by the receiver and VOUT is driven high. See 节 9.2.2.1 for information on selecting the input resistor. The dynamic impedance of the e-diode is very small( IFLH) 0V - UVLOR Low ON ( (IF> IFLH) UVLOR - 33V High 表 8-3. Function Table for UCC23313 with VCC Falling e-diode VCC VOUT OFF (IF< IFLH) 0V - 33V Low ON (IF> IFLH) UVLOF- 0V Low ON ( (IF> IFLH) 33V - UVLOF High 8.4.1 ESD Structure 图 8-6 shows the multiple diodes involved in the ESD protection components of the UCC23313 device . This provides pictorial representation of the absolute maximum rating for the device. VCC Anode 40V 20V VOUT 40V 2.5V 36V Cathode VEE 图 8-6. ESD Structure Copyright © 2023 Texas Instruments Incorporated Submit Document Feedback 19 English Data Sheet: SLUSDS6 UCC23313 www.ti.com.cn ZHCSK80B – SEPTEMBER 2019 – REVISED OCTOBER 2020 9 Application and Implementation 备注 以下应用部分的信息不属于 TI 组件规范，TI 不担保其准确性和完整性。客户应负责确定 TI 组件是否适 用于其应用。客户应验证并测试其设计，以确保系统功能。 9.1 Application Information UCC23313 is a single channel, isolated gate driver with opto-compatible input for power semiconductor devices, such as MOSFETs, IGBTs, or SiC MOSFETs. It is intended for use in applications such as motor control, industrial inverters, and switched-mode power supplies. It differs from standard opto isolated gate drivers as it does not have an LED input stage. Instead of an LED, it has an emulated diode (e-diode). To turn the e-diode "ON", a forward current in the range of 7mA to 16mA should be driven into the Anode. This will drive the gate driver output High and turn on the power FET. Typically, MCU's are not capable of providing the required forward current. Hence a buffer has to be used between the MCU and the input stage of UCC23313. Typical buffer power supplies are either 5V or 3.3V. A resistor is needed between the buffer and the input stage of UCC23313 to limit the current. It is simple, but important to choose the right value of resistance. The resistor tolerance, buffer supply voltage tolerance and output impedance of the buffer, have to be considered in the resistor selection. This will ensure that the e-diode forward current stays within the recommended range of 7mA to 16mA. Detailed design recommendations are given in the 节 9.1. The current driven input stage offers excellent noise immunity that is need in high power motor drive systems, especially in cases where the MCU cannot be located close to the isolated gate driver. UCC23313 offers best in class CMTI performance of >150kV/us at 1500V common mode voltages. The e-diode is capable of 25mA continuous in the forward direction. The forward voltage drop of the e-diode has a very tight part to part variation (1.8V min to 2.4V max). The temperature coefficient of the forward drop is