UCC25800-Q1, UCC25800B-Q1
SLUSDX3C – NOVEMBER 2020 – REVISED AUGUST 2023
UCC25800-Q1 Ultra-low EMI Transformer Driver for Isolated Bias Supplies
1 Features
•
•
•
•
•
•
•
•
•
•
High-efficiency half-bridge transformer driver
Ultra-low EMI with low interwinding capacitance
Smaller and lower-cost transformer
– Programmable frequency: 0.1 MHz to 1.2 MHz
Wide input voltage range: 9 V to 34 V
– 9 W from 34-V input
– 6 W from 24-V input
– 4 W from 15-V input
Automatic dead-time adjustment with maximum
dead-time programming
External clock synchronization for low noise
Robust protection features
– Undervoltage lockout (UVLO)
– Programmable over-current protection (OCP)
– Input overvoltage protection (OVP)
– Over temperature protection (TSD)
– Integrated soft-start to reduce in-rush current
– External disable function with fault-code output
AEC-Q100 qualified for automotive applications:
– Temperature grade 1: –40°C to +125°C, TA
Functional Safety-Capable
– Documentation available to aid functional safety
system design
8-Pin DGN package with thermal pad
2 Applications
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•
•
•
•
•
•
Automotive traction inverter & motor control
Automotive on-board charger (OBC)
Automotive DC/DC converter
EV charging station, DC fast charging station
UPS and solar inverters
Industrial motors, elevators and escalators
GaN, IGBT and SiC gate transformer driver bias
supply
3 Description
The UCC25800-Q1 ultra-low EMI transformer driver
integrates the switching power stage, the control, and
the protection circuits to simplify isolated bias supply
designs. It allows the design to utilize a transformer
with higher leakage inductance, but much smaller
parasitic primary-to-secondary capacitance. This lowcapacitance transformer design enables an order of
magnitude reduction in the common-mode current
injection through the bias transformer. This makes the
transformer driver an ideal solution for the isolated
bias supply in various automotive applications to
minimize the EMI noise caused by the high-speed
switching devices. The soft-switching feature further
reduces the EMI noise.
The transformer driver has a programmable frequency
range of 100 kHz to 1.2 MHz. This high switching
frequency reduces the transformer size and footprint,
as well as the overall cost of the bias supply. The
integrated SYNC function allows the system bias
supplies to synchronize with an external clock signal,
further reducing the system level noise.
The dead-time adjusts automatically to minimize
the conduction loss and simplify the design. The
programmable maximum dead-time ensures power
stage design flexibility.
With the integrated, low-resistance switching power
stage, the transformer driver can achieve a 6-W
design with 24-V input, and up to 9-W from 34-V
input. With a fixed input voltage, the open-loop control
also helps the output regulation to remain ±5% when
the load is above 10%.
The programmable overcurrent protection (OCP)
allows flexibility on the power stage design to
minimize the transformer size. The protection features
such as adjustable OCP, input OVP, TSD and the
protection from pin faults ensure robust operation.
A fixed 1.5-ms soft-start period reduces the inrush
current during start-up and fault recovery.
The transformer driver also provides a dedicated
multi-function pin for external disabling, and fault code
reporting. The fault code reporting sends the fault
code once the bias supply is in the protection mode.
The UCC25800-Q1 transformer driver is offered in an
8-pin DGN package with the thermal pad to enhance
its thermal handling capability.
Device Information
PACKAGE(1)
PART NUMBER
UCC25800-Q1
(1)
HVSSOP (8)
BODY SIZE (NOM)
3.00 mm × 3.00 mm
For all available packages, see the orderable addendum at
the end of the data sheet.
VIN
SYNC
DIS/FLT
VCC
SW
VOUT
VREG
GND
OC/DT
RT
Simplified Application
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
UCC25800-Q1, UCC25800B-Q1
www.ti.com
SLUSDX3C – NOVEMBER 2020 – REVISED AUGUST 2023
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 5
7.1 Absolute Maximum Ratings........................................ 5
7.2 ESD Ratings............................................................... 5
7.3 Recommended Operating Conditions.........................5
7.4 Thermal Information....................................................6
7.5 Electrical Characteristics.............................................6
7.6 Typical Characteristics................................................ 8
8 Detailed Description......................................................10
8.1 Overview................................................................... 10
8.2 Functional Block Diagram......................................... 11
8.3 Feature Description...................................................11
8.4 Device Functional Modes..........................................24
9 Application and Implementation.................................. 26
9.1 Application Information............................................. 26
9.2 Typical Application.................................................... 26
9.3 What to Do and What Not to Do .............................. 34
10 Power Supply Recommendations..............................35
11 Layout........................................................................... 36
11.1 Layout Guidelines................................................... 36
11.2 Layout Example...................................................... 36
12 Device and Documentation Support..........................37
12.1 Documentation Support ......................................... 37
12.2 Receiving Notification of Documentation Updates..37
12.3 Support Resources................................................. 37
12.4 Trademarks............................................................. 37
12.5 Electrostatic Discharge Caution..............................37
12.6 Glossary..................................................................37
13 Mechanical, Packaging, and Orderable
Information.................................................................... 38
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision B (November 2021) to Revision C (August 2023)
Page
• Initial release of UCC25800B-Q1 device............................................................................................................1
• Updated to include new device UCC25800B-Q1................................................................................................3
• Updated to include fault mode implications of new device UCC25800B-Q1.................................................... 24
Changes from Revision A (July 2021) to Revision B (November 2021)
Page
• Updated data sheet status from Advance Information to Production Data ........................................................1
2
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Product Folder Links: UCC25800-Q1 UCC25800B-Q1
UCC25800-Q1, UCC25800B-Q1
www.ti.com
SLUSDX3C – NOVEMBER 2020 – REVISED AUGUST 2023
5 Device Comparison Table
Part Number
OCP1
Protection
UCC25800-Q1
Enable
UCC25800B-Q1
Disable
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SLUSDX3C – NOVEMBER 2020 – REVISED AUGUST 2023
6 Pin Configuration and Functions
SYNC
1
8
VCC
DIS/FLT
2
7
SW
VREG
3
6
GND
OC/DT
4
5
RT
Thermal pad
Figure 6-1. DGN Package, 8-Pin PDSO (Top View)
Table 6-1. Pin Functions
PIN
NAME
TYPE(1)
DESCRIPTION
DIS/FLT
2
I/O
UCC25800-Q1 disable pin (active low) and fault code output pin.
GND
6
G
The GND pin is the return for all the control and power signals. The layout should separate the
power and control signals.
OC/DT
4
I
Voltage on this pin sets the maximum dead-time between the internal switching power devices.
The Thevenin resistance on the pin is measured at start-up to set the OCP level.
RT
5
–
Switching frequency setting pin. Connect a resistor from RT pin to GND to set the converter
switching frequency. The RT pin can be left open to operate the converter at the default 1.2-MHz
switching frequency.
SW
7
–
The switch node of the integrated half-bridge. Connect this pin directly to the transformer.
SYNC
1
I
External clock input for frequency synchronization. The internal MOSFETs are switched
synchronized with the rising edge of the SYNC signal, with half of the SYNC pin signal frequency.
VCC
8
I
The input for power and control of UCC25800-Q1. A good high-frequency by-pass capacitor
between VCC and GND is needed to ensure high-efficiency, low-EMI design. Use the bypass
capacitor layout to minimize the VCC-GND-bypass capacitor loop to reduce the stresses on
internal power devices. Referring to Section 11 for layout guidelines.
VREG
3
O
Internal regulated reference. Put a decoupling capacitor right across VREG pin and GND with
shortest distance. The VREG pin can also be used as an external supply.
–
Connect this pad to GND pin to provide thermal management for the device. Thermal vias are
recommended if the design uses multilayer PCB.
Thermal Pad
(1)
4
NO.
I = input, O = output, I/O = input or output, FB = feedback, G = ground, P = power
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Product Folder Links: UCC25800-Q1 UCC25800B-Q1
UCC25800-Q1, UCC25800B-Q1
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SLUSDX3C – NOVEMBER 2020 – REVISED AUGUST 2023
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VCC
–0.3
40
V
VREG
–0.3
5.5
V
RT
–0.3
5.5
V
DIS/FLT
–0.3
5.5
V
SYNC
–0.3
5.5
V
OC/DT
–0.3
5.5
V
Pin voltage
–1
VCC + 1
V
Current transient (100ns)
–7
7
A
higher of -5V or
(VCC-41V)
Lower of
(VCC+5V) or
41V
V
SW
Voltage transient (50ns)
IQrms
MOSFET RMS current
TJ
Junction temperature
TAMB
Ambient temperature
Tstg
Storage temperature
(1)
600
mA
–40
150
°C
-40
125
℃
-65
150
°C
Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated
under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
7.2 ESD Ratings
V(ESD)
(1)
Electrostatic discharge
VALUE
UNIT
±2000
V
Human body model (HBM), per AEC
HBM ESD classification level 2
Q100-002(1)
Charged device model (CDM), per
AEC Q100-011
CDM ESD classification level C4B
Corner pins (SYNC, OC/DT, RT,
and VCC)
±750
V
Other pins
±500
V
AEC Q100-002 indicates that HBM stressing must be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VCC
Supply voltage
VREG
VREG current
CVREG
VREG capacitor
RRT
Switching frequency set pin resistor
10
CRT
Capacitor on RT
DIS/FLT
Disable pin
OC/DT
OCP/Dead Time setting pin
ROC/DT
Thevenin resistance
COC/DT
Capacitor on OC/DT
SYNC
External sync input voltage
tSYNCmin
NOM
MAX
UNIT
9
34
V
0
1
mA
0.1
1
µF
kΩ
1000
pF
0
VREG
V
1
3.9
V
22.7
kΩ
1000
pF
2.5
0
VREG
V
Minimum SYNC pulse width, high
150
ns
Minimum SYNC pulse width, low
150
ns
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SLUSDX3C – NOVEMBER 2020 – REVISED AUGUST 2023
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
SW
Half bridge output pin
–0.6
VCC + 0.6
V
fSW
Switching frequency range
100
1200
kHz
IQRMS
Internal MOSFET RMS current rating
500
mA
IQPeak
Internal MOSFET peak current rating, steady state
1
A
7.4 Thermal Information
UCC25800-Q1
THERMAL
METRIC(1)
DGN (HVSSOP)
UNIT
8 PINS
RΘJA
Junction-to-ambient thermal resistance
47.9
°C/W
RΘJC(top)
Junction-to-case (top) thermal resistance
59.1
°C/W
RΘJB
Junction-to-board thermal resistance
18.4
°C/W
ψJT
Junction-to-top characterization parameter
1.6
°C/W
ψJB
Junction-to-board characterization parameter
18.4
°C/W
RΘJC(bot)
Junction-to-case (bottom) thermal resistance
5.6
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics
Unless otherwise stated: VVCC = 15 V, RRT = open, CVREG = 470 nF, and -40 °C