UCC27201ADPRT

Product Folder Sample & Buy Technical Documents Support & Community Tools & Software UCC27200A, UCC27201A SLUSAF9B – FEBRUARY 2011 – REVISED JULY 2015 UCC2720xA 120-V Boot, 3-A Peak, High-Frequency, High-Side and Low-Side Driver 1 Features 3 Description • The UCC2720xA family of high-frequency N-channel MOSFET drivers include a 120-V bootstrap diode and high-side/low-side driver with independent inputs for maximum control flexibility. This allows for N-channel MOSFET control in half-bridge, full-bridge, two-switch forward and active clamp forward converters. The low-side and the high-side gate drivers are independently controlled and matched to 1-ns between the turn-on and turn-off of each other. The UCC2720xA are based on the popular UCC27200/1 drivers, but offer some enhancements. In order to improve performance in noisy power supply environments the UCC2720xA has an enhanced ESD input structure and also has the ability to withstand a maximum of –18 V on its HS pin. 1 • • • • • • • • • • • • Drives Two N-Channel MOSFETs in High-Side and Low-Side Configuration Negative Voltage Handling on HS (–18V) Maximum Boot Voltage 120 V Maximum VDD Voltage 20 V On-Chip 0.65-V VF, 0.6-Ω RD Bootstrap Diode Greater than 1 MHz of Operation 20-ns Propagation Delay Times 3-A Sink, 3-A Source Output Currents 8-ns Rise/7-ns Fall Time with 1000-pF Load 1-ns Delay Matching Undervoltage Lockout for High-Side and Low-Side Driver Offered in 8-Pin SOIC (D), PowerPAD™ SOIC-8 (DDA), SON-8 (DRM), SON-9 (DRC) and SON-10 (DPR) Packages Specified from –40°C to 140°C 2 Applications • • • • • • • Power Supplies for Telecom, Datacom, and Merchant Markets Half-Bridge Applications and Full-Bridge Converters Isolated Bus Architecture Two-Switch Forward Converters Active-Clamp Forward Converters High-Voltage Synchronous-Buck Converters Class-D Audio Amplifiers Simplified Application Diagram +12V An on-chip bootstrap diode eliminates the external discrete diodes. Under-voltage lockout is provided for both the high-side and the low-side drivers forcing the outputs low if the drive voltage is below the specified threshold. Two versions of the UCC27200A are offered. The UCC27200A has high-noise immune CMOS input thresholds while the UCC27201A has TTL-compatible thresholds. Both devices are offered in an 8-pin SOIC (D), PowerPad SOIC-8 (DDA), SON-8 (DRM) package, a 9-pin SON-9 (DRC) package and a 10-pin SON-10 (DPR) package. Device Information(1) PART NUMBER UCC27200A, UCC27201A +100V UCC27201A SECONDARY SIDE CIRCUIT VDD HB DRIVE HI LI CONTROL HI PWM CONTROLLER PACKAGE BODY SIZE (NOM) SOIC (8) 4.90 mm × 3.91 mm HSOP (8) 4.89 mm × 3.90 mm VSON (9) 3.00 mm × 3.00 mm VSON (8) 4.00 mm × 4.00 mm WSON (10) 4.00 mm × 4.00 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. HO HS DRIVE LO LO UCC27200A/1A VSS ISOLATION AND FEEDBACK 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. UCC27200A, UCC27201A SLUSAF9B – FEBRUARY 2011 – REVISED JULY 2015 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 5 6.1 6.2 6.3 6.4 6.5 6.6 5 5 5 6 6 8 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Electrical Characteristics........................................... Typical Characteristics .............................................. Detailed Description ............................................ 12 7.1 Overview ................................................................. 12 7.2 Functional Block Diagram ....................................... 12 7.3 Feature Description................................................. 12 7.4 Device Functional Modes........................................ 13 8 Application and Implementation ........................ 14 8.1 Application Information............................................ 14 8.2 Typical Application ................................................. 14 9 Power Supply Recommendations...................... 20 10 Layout................................................................... 20 10.1 Layout Guidelines ................................................. 20 10.2 Layout Example .................................................... 21 11 Device and Documentation Support ................. 22 11.1 11.2 11.3 11.4 11.5 11.6 Documentation Support ........................................ Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 22 22 22 22 22 22 12 Mechanical, Packaging, and Orderable Information ........................................................... 22 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision A (July 2011) to Revision B Page • Added Negative Voltage Handling on HS (–18 V) to Features List ...................................................................................... 1 • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1 Changes from Original (February 2011) to Revision A Page • Added SON-10 (DPR) Package to the List of FEATURES .................................................................................................... 1 • Added SON-10 (DPR) Package to the DESCRIPTION ......................................................................................................... 1 • Changed the PIN FUNCTIONS table ..................................................................................................................................... 4 • Added Additional PIN FUNCTIONS information..................................................................................................................... 4 • Added ordering information for the SON-10 (DPR)................................................................................................................ 5 • Added note, "DPR(SON-10) package comes either in a small reel of 250 pieces as part number UCC27200ADPRT, or large reels pieces as part number UCC27200ADPRR." .................................................................................................... 5 • Added the SON-10 package to the ORDERING INFORMATION table................................................................................. 5 • Added the SON-10 package to the THERMAL INFORMATION table ................................................................................... 5 • Changed the "Minimum input pulse width" value From: 50 ns Max To: 50 ns Typ................................................................ 7 2 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: UCC27200A UCC27201A UCC27200A, UCC27201A www.ti.com SLUSAF9B – FEBRUARY 2011 – REVISED JULY 2015 5 Pin Configuration and Functions D Package 8-Pin SOIC Top View VDD 1 HB 2 HO 3 HS 4 DDA Package 8-Pin SOIC With Exposed PowerPAD Top View 8 7 6 5 LO VSS LI HI VDD 1 HB 2 HO 3 6 LI HS 4 5 HI DRM Package 8-Pin SON Top View VDD 1 HB 2 HS 4 7 VSS 7 VSS 6 LI 9 LO 8 VSS 7 LI HO 3 6 HI HS 4 5 N/C VDD 1 HB 2 HO 3 Exposed Thermal Die Pad DRC Package 9-Pin SON Top View 8 LO Exposed Thermal Die Pad* 8 LO 5 HI Exposed Thermal Die Pad* DPR Package 10-Pin SON Top View VDD 1 HB 2 HO 3 HS NC 10 LO 9 VSS 8 LI 4 7 HI 5 6 NC Exposed Thermal Die Pad Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: UCC27200A UCC27201A Submit Documentation Feedback 3 UCC27200A, UCC27201A SLUSAF9B – FEBRUARY 2011 – REVISED JULY 2015 www.ti.com Pin Functions PIN DRM/D/DDA DRC DPR VDD 1 1 1 I/O DESCRIPTION I Positive supply to the lower gate driver. De-couple this pin to VSS (GND). Typical decoupling capacitor range is 0.22 μF to 1.0 μF. HB 2 2 2 I High-side bootstrap supply. The bootstrap diode is on-chip but the external bootstrap capacitor is required. Connect positive side of the bootstrap capacitor to this pin. Typical range of HB bypass capacitor is 0.022 μF to 0.1 μF, the value is dependant on the gate charge of the high-side MOSFET however. HO 3 3 3 O High-side output. Connect to the gate of the high-side power MOSFET. HS 4 4 4 I High-side source connection. Connect to source of high-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. HI 5 6 7 I High-side input. LI 6 7 8 I Low-side input. VSS 7 8 9 O Negative supply terminal for the device which is generally grounded. LO 8 9 10 O Low-side output. Connect to the gate of the low-side power MOSFET. N/C — 5 5/6 — No connection. Pins labeled N/C have no connection. PowerPAD (1) — — — — Connect to a large thermal mass trace or GND plane to dramatically improve thermal performance. (1) 4 NAME Pin VSS and the exposed thermal die pad are internally connected on the DDA and DRM packages only. Electrically referenced to VSS (GND). Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: UCC27200A UCC27201A UCC27200A, UCC27201A www.ti.com SLUSAF9B – FEBRUARY 2011 – REVISED JULY 2015 6 Specifications 6.1 Absolute Maximum Ratings Over operating free-air temperature, unless noted, all voltages are with respect to VSS Supply voltage range, (2) (1) VDD Input voltages on LI and HI, VLI, VHI Output voltage on LO, VLO DC Repetitive pulse