UCC27324QDRQ1

Product Folder Order Now Support & Community Tools & Software Technical Documents UCC27324-Q1 SLUS678C – MARCH 2008 – REVISED JUNE 2018 UCC27324-Q1 Dual 4-A Peak High-Speed Low-Side Power MOSFET Driver 1 Features 2 Applications • • • • • • • • 1 • • • • • • • • • Qualified for Automotive Applications Industry-Standard Pinout High Current Drive Capability of ±4 A at the Miller Plateau Region Efficient Constant Current Sourcing Even at Low Supply Voltages TTL and CMOS-Compatible Inputs Independent of Supply Voltage 20-ns Typical Rise and 15-ns Typical Fall Times with 1.8-nF Load Typical Propagation Delay Times of 25 ns With Input Falling and 35 ns With Input Rising Supply Voltage of 4 V to 15 V Supply Current of 0.3 mA Dual Outputs Can Be Paralleled for Higher Drive Current Rated From TJ = –40°C to 125°C TrueDrive™ Output Architecture Using Bipolar and CMOS Transistors in Parallel Switch-Mode Power Supplies DC-DC Converters Motor Controllers Line Drivers Class D Switching Amplifiers 3 Description The UCC27324-Q1 high-speed dual-MOSFET driver can deliver large peak currents into capacitive loads. Using a design that inherently minimizes shootthrough current, these drivers deliver 4 A of current where it is needed most, at the Miller plateau region during the MOSFET switching transition. A unique bipolar and MOSFET hybrid output stage in parallel also allows efficient current sourcing and sinking at low supply voltages. The device is offered in a standard SOIC-8 (D) package. Device Information(1) PART NUMBER UCC27324-Q1 PACKAGE BODY SIZE (NOM) SOIC (8) 4.90 mm × 3.91 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Block Diagram NC 1 INA 2 GND 3 INB 8 NC 7 OUTA 6 VDD 5 OUTB 4 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. UCC27324-Q1 SLUS678C – MARCH 2008 – REVISED JUNE 2018 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.8 6.9 6.10 4 4 4 4 4 5 5 5 5 7 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. Overall Electrical Characteristics .............................. Power Dissipation Characteristics ............................ Input (INA, INB) Electrical Characteristics ................ Output (OUTA, OUTB) Electrical Characteristics ..... Switching Characteristics .......................................... Typical Characteristics ............................................ Detailed Description .............................................. 8 7.1 Overview ................................................................... 8 7.2 Functional Block Diagram ......................................... 8 7.3 Feature Description................................................... 8 7.4 Device Functional Modes.......................................... 9 8 Application and Implementation ........................ 10 8.1 Application Information............................................ 10 8.2 Typical Application ................................................. 11 9 Power Supply Recommendations...................... 14 10 Layout................................................................... 15 10.1 Layout Guidelines ................................................. 15 10.2 Layout Example .................................................... 16 10.3 Thermal Considerations ........................................ 16 11 Device and Documentation Support ................. 17 11.1 11.2 11.3 11.4 11.5 Documentation Support ........................................ Community Resource............................................ Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 17 17 17 17 17 12 Mechanical, Packaging, and Orderable Information ........................................................... 17 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (September 2015) to Revision C Page • Changed Figures 8,10,11 to show non-inverting device internally....................................................................................... 12 • Added to equation 6 to correctly multiply by V. ................................................................................................................... 14 Changes from Revision A (April 2012) to Revision B Page • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .................................................................................................. 1 • Deleted UCC27323-Q1 (dual inverting) and UCC27325-Q1 (one inverting, one noninverting) devices from the data sheet ....................................................................................................................................................................................... 1 • Deleted reference to MSOP-PowerPAD and PDIP packages for UCC27324-Q1 device ..................................................... 1 • Deleted the Ordering Information table ................................................................................................................................. 1 • Deleted Dissipation Ratings table .......................................................................................................................................... 4 Changes from Original (March, 2008) to Revision A Page • Added TA = TJ to header of Overall Electrical Characteristics table. ...................................................................................... 4 • Added an extra paragraph before Figure 5. ......................................................................................................................... 14 2 Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated Product Folder Links: UCC27324-Q1 UCC27324-Q1 www.ti.com SLUS678C – MARCH 2008 – REVISED JUNE 2018 5 Pin Configuration and Functions D Package 8-Pin SOIC Top View NC 1 8 NC INA 2 7 OUTA GND 3 6 VDD INB 4 5 OUTB NC – No internal connection Pin Functions PIN NO. NAME I/O DESCRIPTION 1 NC — No connection. Should be grounded. 2 INA I 3 GND — 4 INB I Input B. Input signal of the B driver. Has logic-compatible threshold and hysteresis. If not used, this input should be tied to either VDD or GND. It should not be left floating. 5 OUTB O Driver output B. The output stage can provide 4-A drive current to the gate of a power MOSFET. 6 VDD I Supply. Supply voltage and the power input connection for this device. 7 OUTA O Driver output A. The output stage can provide 4-A drive current to the gate of a power MOSFET. 8 NC — No connection. Should be grounded. Input A. Input signal of the A driver. Has logic-compatible threshold and hysteresis. If not used, this input should be tied to either VDD or GND. It should not be left floating. Common ground. Should be connected very closely to the source of the power MOSFET that the driver is driving. Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated Product Folder Links: UCC27324-Q1 3 UCC27324-Q1 SLUS678C – MARCH 2008 – REVISED JUNE 2018 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) VDD Supply voltage IO Output current (OUTA, OUTB) TJ Junction operating temperature Tlead Lead temperature Tstg Storage temperature, soldering, 10 s (1) (2) MIN MAX UNIT –0.3 16 V DC, IOUT_DC 0.3 Pulsed (0.5 μs), IOUT_PULSED 4.5 –55 –65 A 150 °C 300 °C 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to GND. Currents are positive into and negative out of the specified terminal. 6.2 ESD Ratings VALUE V(ESD) (1) Electrostatic discharge Human-body model (HBM), per AEC Q100-002 (1) ±2000 Charged-device model (CDM), per AEC Q100-011 ±1000 UNIT V AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN VDD Supply voltage NOM MAX 4 UNIT 15 V 6.4 Thermal Information UCC27324-Q1 THERMAL METRIC (1) D (SOIC) UNIT 8 PINS RθJA Junction-to-ambient thermal resistance 113 °C/W RθJC(top) Junction-to-case (top) thermal resistance 61.7 °C/W RθJB Junction-to-board thermal resistance 53.2 °C/W ψJT Junction-to-top characterization parameter 16 °C/W ψJB Junction-to-board characterization parameter 52.7 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 6.5 Overall Electrical Characteristics VCC = 4.5 V to 15 V, TA = –40°C to 125°C (unless otherwise noted), TA = TJ PARAMETER TEST CONDITIONS INA = 0 V IDD Static operating current INA = HIGH 4 TYP MAX 2 80 INB = HIGH 300 450 INB = 0 V 300 450 INB = HIGH 600 800 INB = 0 V Submit Documentation Feedback MIN UNIT μA Copyright © 2008–2018, Texas Instruments Incorporated Product Folder Links: UCC27324-Q1 UCC27324-Q1 www.ti.com SLUS678C – MARCH 2008 – REVISED JUNE 2018 6.6 Power Dissipation Characteristics over operating free-air temperature range (unless otherwise noted) PARAMETER PD TEST CONDITIONS Power dissipation MIN TA = 25°C TYP 650 MAX mW UNIT μA 6.7 Input (INA, INB) Electrical Characteristics VCC = 4.5 V to 15 V, TA = –40°C to 125°C (unless otherwise noted) PARAMETER VIH Logic 1 input threshold VIL Logic 0 input threshold TEST CONDITIONS MIN TYP MAX 2 0 V ≤ VIN ≤ VDD Input current UNIT V 1 V –10 0 10 μA MIN TYP MAX UNIT 300 450 mV 22 45 mV 30 35 6.8 Output (OUTA, OUTB) Electrical Characteristics VCC = 4.5 V to 15 V, TA = –40°C to 125°C (unless otherwise noted) PARAMETER Output current (1) TEST CONDITIONS (2) TA VDD = 14 V 4 VOH High-level output voltage VOH = VDD – VOUT, IOUT = –10 mA VOL Low-level output level IOUT = 10 mA Output resistance high (3) IOUT = –10 mA, VDD = 14 V Output resistance low (3) IOUT = 10 mA, VDD = 14 V 25°C 25 Full range 18 25°C 1.9 Full range 0.9 Latch-up protection (1) (1) (2) (3) A 43 2.2 2.5 4 500 Ω Ω mA Specified by design The pullup/pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The pulsed output current rating is the combined current from the bipolar and MOSFET transistors. The pullup/pulldown circuits of the driver are bipolar and MOSFET transistors in parallel. The output resistance is the RDS(ON) of the MOSFET transistor when the voltage on the driver output is less than the saturation voltage of the bipolar transistor. 6.9 Switching Characteristics VCC = 4.5 V to 15 V, TA = –40°C to 125°C (unless otherwise noted) (see Figure 1) TYP MAX tR Rise time (OUTA, OUTB) PARAMETER CLOAD = 1.8 nF TEST CONDITIONS MIN 20 40 ns tF Fall time (OUTA, OUTB) CLOAD = 1.8 nF 15 40 ns tD1 Delay time, IN rising (IN to OUT) CLOAD = 1.8 nF 25 40 ns tD2 Delay time, IN falling (IN to OUT) CLOAD = 1.8 nF 35 50 ns Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated Product Folder Links: UCC27324-Q1 UNIT 5 UCC27324-Q1 SLUS678C – MARCH 2008 – REVISED JUNE 2018 www.ti.com 90% INPUT 10% tF tF t D1 90% t D2 OUTPUT 10% Figure 1. Switching Waveforms for Noninverting Driver 6 Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated Product Folder Links: UCC27324-Q1 UCC27324-Q1 www.ti.com SLUS678C – MARCH 2008 – REVISED JUNE 2018 6.10 Typical Characteristics 21 18.8 18.6 20.8 Rise Time (ns) Fall Time (ns) 20.9 20.7 20.6 18.4 18.2 18 20.5 20.4 -50 0 VDD = 12 V 50 Temperature (qC) 100 17.8 -50 150 0 IOUT = 10 mA VDD = 12 V 27 31 26.5 26 25.5 25 24.5 24 Turnon Time Turnoff Time 23.5 0 50 Temperature (qC) 100 100 150 D002 CLOAD = 1.8 nF Figure 3. Rise Time vs Temperature 32 Output Pullup Resistance (:) Input-to-Output Propagation Delay (ns) Figure 2. Output Pulldown Resistance vs Temperature 27.5 23 -50 50 Temperature (qC) D001 30 29 28 27 26 25 24 150 23 -50 0 D003 VDD = 12 V 50 Temperature (qC) VDD = 12 V Figure 4. Input to Output Propagation Delay vs Temperature 100 150 D004 IOUT = –10 mA Figure 5. Output Pullup Resistance vs Temperature Output Pulldown Resistance (:) 2.6 2.2 1.8 1.4 1 -50 0 VDD = 12 V 50 Temperature (qC) 100 150 D005 IOUT = 10 mA Figure 6. Output Pulldown Resistance vs Temperature Submit Documentation Feedback Copyright © 2008–2018, Texas Instruments Incorporated Product Folder Links: UCC27324-Q1 7 UCC27324-Q1 SLUS678C – MARCH 2008 – REVISED JUNE 2018 www.ti.com 7 Detailed Description 7.1 Overview The UCC27324-Q1 device represents Texas Instruments' latest generation of dual-channel, low-side, high-speed gate-driver devices featuring a 4-A source and sink capability. With industry leading switching characteristics, automotive qualification, and a host of other features shown on the first page, the UCC27324-Q1 provides an efficient, robust, and reliable solution to your high current low-side driver needs in automotive applications. 7.2 Functional Block Diagram NC 1 INA 2 GND 3 INB 4 8 NC 7 OUTA 6 VDD 5 OUTB 7.3 Feature Description 7.3.1 Input Stage The input thresholds have a 3.3-V logic sensitivity over the full range of VDD voltage, yet it is equally compatible with 0 V to VDD signals. The inputs of UCC27324-Q1 device are designed to withstand 500-mA reverse current without damage to the device or logic upset. The input stage of each driver should be driven by a signal with a short rise or fall time. This condition is satisfied in typical power-supply applications, where the input signals are provided by a PWM controller or logic gates with fast transition times (