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UCC28881D

UCC28881D

  • 厂商:

    BURR-BROWN(德州仪器)

  • 封装:

    SOIC8_150MIL_7Pin

  • 描述:

    IC OFF-LINE SWITCHER 7SOIC

  • 数据手册
  • 价格&库存
UCC28881D 数据手册
Product Folder Sample & Buy Support & Community Tools & Software Technical Documents Reference Design UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 UCC28881 700-V, 225-mA Low Quiescent Current Off-Line Converter 1 Features 3 Description • • The UCC28881 integrates the controller and a 14-Ω, 700-V power MOSFET into one monolithic device. The device also integrates a high-voltage current source, enabling start up and operation directly from the rectified mains voltage. UCC28881 is the same family device of UCC28880, with higher current handling capability. 1 • • • • • • • Integrated 14-Ω, 700-V Power MOSFET Integrated High-Voltage Current Source for Internal Device Bias Power Integrated Current Sense Internal Soft Start Self-Biased Switcher (Start Up and Operation Directly from Rectified Mains Voltage) Supports Buck, Buck-Boost and Flyback Topologies VFB_TH) 58 100 µA IFL Internal supply current, full load FB = 0.75 V (> VFB_TH) 86 120 µA ICH0 Charging VDD Cap current VVDD = 0 V, ICH1 Charging VDD Cap current VVDD = 4.4V, VFB = 1.25 V VVDD Internally regulated low Voltage supply (supplied from HVIN pin) VFB_TH FB pin reference threshold VVDD(on) VDD turn-on threshold VDD low-to-high VVDD(off) VDD turn-off threshold VDD high-to-low ΔVVDD(uvlo) VDD UVLO Hysteresis VDD high-to-low DMAX Maximum Duty Cycle FB = 0.75 V 45% ILIMIT Current Limit –3.8 –1.6 –0.4 mA –3.40 –1.30 –0.25 mA 4.5 5.0 5.5 V 0.96 1.03 1.105 V 3.55 3.92 4.28 V 3.28 3.62 3.89 V 0.27 0.345 0.39 V 55% Static, TA = –40°C Static, TA = 25°C 330 Static, TA = 125°C 315 440 630 mA 570 mA mA TJ(stop) Thermal Shutdown Temperature Internal junction temperature 138.5 150 °C TJ(hyst) Thermal Shutdown Hysteresis Internal junction temperature 37. 45 °C BV Power MOSFET Breakdown Voltage TJ = 25°C Power MOSFET OnResistance (includes internal sense-resistor) ID = 60 mA, TJ = 25°C 14 18 Ω RDS(on) ID = 60 mA, TJ = 125°C 24 30 Ω DRAIN_ILEAKAGE Power MOSFET off state leakage current VDRAIN = 700V, TJ = 25°C HVIN_IOFF VVDD(clamp) HVIN off state current VDD clamp voltage 700 V VDRAIN = 400 V, TJ = 125°C VHVIN = 700 V, TJ = 25°C, VVDD = 5.8 V 4.0 7.5 VHVIN = 400 V, TJ = 125°C, VVDD = 5.8 V IVDD = 250 µA 5 µA 20 µA 36.0 µA 20 µA V 6.0 6.7 7.5 7.6 Switching Characteristics over operating free-air temperature range (unless otherwise noted) MIN TYP MAX UNIT fSW(max) Maximum switching frequency 52 62 75 kHz tON_MAX Maximum switch on time (current limiter not triggered), FB = 0.75 V 6.5 8.3 9.7 µs tOFF_MIN Minimum switch off time follows every tON time, FB = 0.75 V 6.5 8.3 9.7 µs tMIN Minimum on time 0.17 0.27 0.30 µs tOFF(ovl) Max off time (OL condition), tOFF(ovl) = tSW – tON(max) 130 200 270 µs tON_TO Inductor current run away protection time threshold 6 Submit Documentation Feedback 450 ns Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 7.7 Typical Characteristics 1.6 Current Limit (normalized to 50 mA/Ps) Current Limit (normalized to 25oC) 1.2 1.15 1.1 1.05 1 0.95 0.9 0.85 0.8 -40 -20 0 20 40 60 80 Temperature (oC) 100 120 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 50 140 150 ICH0 and ICH1 (normalized to 25°C) IFL and INL (normalized to 25oC) 1.15 1.1 1.05 1 0.95 0.9 IFL INL -20 0 20 40 60 80 Temperature (oC) 100 120 D002 ICH0 ICH1 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 -40 140 -20 0 D303 20 40 60 80 Temperature (°C) 100 120 140 D001 Figure 4. ICH0 and ICH1 vs Temperature 900 1.01 VVDD(on) VVDD Hysteresis 800 Drain to Source Current (mA) 1.005 1 0.995 0.99 0.985 700 600 500 400 300 200 IDRAIN 25oC IDRAIN 125oC 100 0.98 -40 750 1.5 Figure 3. INL and IFL vs Temperature VVDD(on) and Hysteresis (normalized to 25oC) 650 Figure 2. ILIMIT vs Drain Current Slope Figure 1. ILIMIT vs Temperature 1.2 0.85 -40 250 350 450 550 Drain Current Slope (mA/Ps) D301 0 -20 0 20 40 60 80 Temperature (oC) 100 120 140 0 5 D305 Figure 5. VVDD(on) and VVDD Hysteresis vs Temperature 10 15 20 25 30 35 40 45 Drain to Source Voltage (V) 50 55 Product Folder Links: UCC28881 D316 Figure 6. IDS vs VDS at 25°C and 125°C Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated 60 7 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com Typical Characteristics (continued) 1.02 Feedback Voltage (normalized to 25oC) FSW(max) (normalized to 25°C) 1.02 1.01 1 0.99 0.98 0.97 0.96 -50 0 50 Temperature (°C) 100 1.01 1 0.99 0.98 0.97 0.96 -40 150 -20 0 Figure 7. Maximum Switching Frequency vs Temperature 1.045 1.04 1.035 1.03 1.025 1.02 1.015 1.01 1.005 1 TOFF(min) TON(max) 0.995 -20 0 20 40 60 80 Temperature (°C) 100 120 140 D001 Figure 9. tON(max) and tOFF(min) vs Temperature 40 60 80 Temperature (oC) 100 120 140 D308 Figure 8. VFB_TH vs Temperature DRAIN Breakdown Voltage (normalized to 25oC) tON(max) and tOFF(min) (normalized to 25°C) 1.05 0.99 -40 20 D012 1.12 1.1 1.08 1.06 1.04 1.02 1 0.98 0.96 0.94 0.92 0.9 -40 -20 0 20 40 60 80 Temperature (oC) 100 120 140 D310 Figure 10. DRAIN breakdown voltage vs Temperature 140 136 132 RTJA (oC/W) 128 124 120 116 112 108 104 100 0 200 400 600 800 1000 Copper Area (mm2) 1200 1400 D001 D201 Figure 11. RTHJA vs Copper Area 8 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 8 Detailed Description 8.1 Overview The UCC28881 integrates a controller and a 700-V power MOSFET into one monolithic device. The device also integrates a high-voltage current source, enabling start up and operation directly from the rectified mains voltage. UCC28881 is the same family device as UCC28880 and it provides higher power handling capability. The low-quiescent current of the device enables excellent efficiency. The device is suitable for non-isolated ACto-DC low-side buck and buck-boost configurations with level-shifted direct feedback, but also more traditional high-side buck, buck boost and low-power flyback converters with low standby power can be built using a minimum number of external components. The device generates its own internal low-voltage supply (5 V referenced to the device’s ground, GND) from the integrated high-voltage current source. The PWM signal generation is based on a maximum constant on-time, minimum off-time concept, with the triggering of the on-pulse depending on the feedback voltage level. Each onpulse is followed by a minimum off-time to ensure that the power MOSFET is not continuously driven in an onstate. The PWM signal is AND-gated with the signal from a current limit circuit. No internal clock is required, as the switching of the power MOSFET is load dependent. A special protection mechanism is included to avoid runaway of the inductor current when the converter operates with the output shorted or in other abnormal conditions that can lead to an uncontrolled increase of the inductor current. This special protection feature keeps the MOSFET current at a safe operating level. The device is also protected from other fault conditions with thermal shutdown, under-voltage lockout and soft-start features. 8.2 Functional Block Diagram HVIN 5 High Voltage Current Source 8 Thermal Shutdown VDD 4 Gate LDO UVLO DRAIN S Q R Q Current Limit Control and Reference VREF_TH = 1 V + FB 3 PWM Controller and Output Short Circuit Protection Leading Edge Blanking Time LEB 1, 2 GND Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 9 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com 8.3 Feature Description The UCC28881 integrates a 700-V rated power MOSFET switch, a PWM controller, a high-voltage current source to supply a low-voltage power supply regulator. A bias and reference block, thermal shutdown and the following protection features, current limiter, under voltage lockout (UVLO) and overload protection for situations like short circuit at the output are also integrated inside UCC28881. UCC28881 is the same family device as UCC28880 and it provides higher power handling capability. The positive high-voltage input of the converter node (VIN+) functions as a system reference ground for the output voltage in low-side topologies. In the low-side buck topology the output voltage is negative with respect to the positive high-voltage input (VIN+), and in low-side buck-boost topology the output voltage is positive with respect to the positive high-voltage input (VIN+). In low-side buck and buck-boost topologies, the external level-shifted direct feedback circuit can be implemented by two resistors and a high-voltage PNP transistor. In high-side buck configuration, as well as in non-isolated flyback configuration, the output voltage is positive with respect to the negative high-voltage input (VIN–), which is the system reference ground. UCC28881 can operate under continuous conduction mode (CCM) or discontinuous conduction mode (DCM) mode. CCM operation allows the converter to deliver more output power because of less current ripple. However, it requires a higher inductor value and generally results in lower efficiency due to the added losses associated with diode reverse recovery current. DCM mode operation uses a smaller inductor and achieves better efficiency, but the output current handling capability is reduced because of increased current ripple. The table below shows the current handling capability in DCM and CCM operation for the UCC28880, UCC28881 family. Table 1. Current Handling Capability for UCC28880 and UCC28881 DEVICE CURRENT HANDLING MODE 230 VAC ±15% 85 V ~ 265 VAC UCC28881 Discontinuous Conduction Mode (DCM) 150 mA 150 mA UCC28881 Continuous Conduction Mode (CCM) 225 mA 225 mA UCC28880 Discontinuous Conduction Mode (DCM) 70 mA 70 mA UCC28880 Continuous Conduction Mode (CCM) 100 mA 100 mA When the bus voltage is higher than 400 V, it is recommended to limit operation to DCM mode only to avoid the diode reverse recovery current and the associated internal MOSFET stress. Due to the higher switching loss and device stresses at higher bus voltage, it is recommended to keep the converter input voltage less than 560 V for the buck applications. UCC28881 power handling capability is reduced at higher ambient temperature, as a function of the power dissipation of the device, the device's recommended maximum operating junction temperature and the thermal dissipation capability of the total system. De-rating of the output current according to maximum ambient temperature can be estimated from Figure 12. The de-rating estimation assumes CCM operation, 10 µJ of switching loss and 135°C/W RθJA and 30-kHz, full-load switching frequency. This is a conservative estimation. The thermal handling capability can be more accurately determined through experimental measurement. For more information on thermal evaluation methods see the IC Package and Thermal Metrics application report: SPRA953. 10 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 1.2 Output Current Derating Factor 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -40 -20 0 20 40 60 80 100 Ambient Temperature (oC) 120 140 D012 Figure 12. Output Current (De-Rating Factor) vs. Temperature It is required to use fast recovery diode for the buck freewheeling diode. When designed in CCM, the diode reverse recovery time should be less than 35 ns to keep low reverse recovery current and the switching loss. For example, STTH1R06A provides 25-ns reverse recovery time. When designed in DCM, a slower diode can be used, but the reverse-recovery time should be kept less than 75 ns. MURS160 can fit the requirement. The device has a low-standby power consumption (no-load condition), only 18 mW (typical) when connected to a 230-VAC mains and 9 mW when connected to an 115-VAC mains. The standby power does not include the power dissipated in the external feedback path, the power dissipated in the external pre-load, the inductor in the freewheeling diode and the converter input stage (rectifiers and filter). Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 11 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com 8.4 Device Functional Modes 8.4.1 Start-Up Operation The device includes a high-voltage current source connected between the HVIN pin and the internal supply for the regulator. When the voltage on the HVIN pin rises, the current source is activated and starts to supply current to the internal 5-V regulator. The 5-V regulator charges the external capacitor connected between VDD pin and GND pin. When the VDD voltage exceeds the VDD turn-on threshold, VVDD(on), device starts operations. The minimum voltage across HVIN and GND pins, to ensure enough current to charge the capacitance on VDD pin, is VHVIN(min). At the First switching cycle the minimum MOSFET off time is set to be >100 μs and cycle-by-cycle is progressively reduced up to tOFF(min) providing soft start. 8.4.2 Feedback and Voltage Control Loop The feedback circuit consists of a voltage comparator with the positive input connected to an internal reference voltage (referenced to GND) and the negative input connected to FB pin. When the feedback voltage at the FB pin is below the reference voltage VFB_TH logic high is generated at the comparator output. This logic high triggers the PWM controller, which generates the PWM signal turning on the MOSFET. When the feedback voltage at the FB pin is above the reference voltage, it indicates that the output voltage of the converter is above the targeted output voltage set by the external feedback circuitry and PWM is stopped. 12 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 Device Functional Modes (continued) 8.4.3 PWM Controller UCC28881 operates under on/off control. When the FB pin voltage is below internal reference 1 V, the converter is switching and sending power to the load. When the FB pin voltage is above internal reference 1 V, the converter shuts off and stops delivering power to the load. The PWM controller does not need a clock signal. The PWM signal’s frequency is set to fSW(max) = (1/(tON(max) + tOFF(min))) which occurs when the voltage on the FB pin is continuously below VFB_TH. PWM duty cycle is determined by both the peak current and maximum on time. At each switching cycle, after turn on, the MOSFET is turned off if its current reaches the fixed peak-current threshold or its on time reaches the maximum value of on-time pulse tON(max). Normally the converter would operate under frequency control, which means the converter is only enabled one switching cycle and then disabled. Next switching cycle starts when output voltage decays and the feedback enable the converter again. This way, the converter appears to operate under variable switching frequency control. The user might observe the converter operates in burst mode that converter is enabled for multiple switching cycles and then stopped for multiple switching cycles. This causes larger output voltage ripple. However, due to the infrequent switching it actually helps on the standby power at no load. VFB VFB_TH t FB_COMP_OUT t PWM t CURRENT LIMIT t RSTN t GATE t tON(max) tOFF(min) tON(max) tOFF(min) tON(max) tOFF(min) tON(max) tOFF(min) Figure 13. UCC28881 Timing Diagram Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 13 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com Device Functional Modes (continued) 8.4.4 Current Limit The current limit circuit senses the current through the power MOSFET. The sensing circuit is located between the source of the power MOSFET and the GND pin. When the current in the power MOSFET exceeds the threshold ILIMIT, the internal current limit signal goes high, which sets the internal RSTN signal low. This disables the power MOSFET by driving its gate low. The current limit signal is set back low after the falling edge of the PWM signal. After the rising edge of the GATE signal, there is a blanking time. During this blanking time, the current limit signal cannot go high. This blanking time and the internal propagation delay result in minimum on time, tMIN. 8.4.5 Inductor Current Runaway Protection To protect the device from overload conditions, including a short circuit at the output, the PWM controller incorporates a protection feature which prevents the inductor current from runaway. When the output is shorted the inductor demagnetization is very slow, with low di/dt, and when the next switching cycle starts energy stored in the inductance is still high. After the MOSFET switches on, the current starts to rise from pre-existing DC value and reaches the current-limit value in a short duration of time. Because of the intrinsic minimum on-time of the device the MOSFET on-time cannot be lower than tMIN, in an overload or output short circuit the energy inductance is not discharged sufficiently during MOSFET off-time, it is possible to lose control of the current leading to a runaway of the inductor current. To avoid this, if the on-time is less than tON_TO (tON_TO is a device internal time out), the controller increases the MOSFET off-time (tOFF). If the MOSFET on-time is longer than tON_TO then tOFF is decreased. The controller increases tOFF, cycle-by-cycle, through discrete steps until the ontime continues to stay below tON_TO. The tOFF is increased up to tOFF(ovl) after that, if the on-time is still below tON_TO the off-time is kept equal to tOFF(ovl). The controller decreases tOFF cycle-by-cycle until the on-time continues to stay above tON_TO up to tOFF(min). This mechanism prevents control loss of the inductor current and prevents over stress of the MOSFET (see typical waveforms in Figure 14 and Figure 15). At start up, the tOFF is set to tOFF(ovl) and reduced cycle-by-cycle (if the on-time is longer than tON_TO) up to tOFF(min) providing a soft start for the power stage. I LIMIT Inductor Current Drain Current tON_ MAX t tOFF PWM t Current Limit t LEB ~200 ns ~200 ns t tON_TO tON_TO tON_TO t Increase tOFF ( Decrease fSW ) Decrease tOFF (Increase fSW ) CNT_IN t Gate tON tON t Figure 14. Current Runaway Protection Logic Timing Diagram 14 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 Device Functional Modes (continued) Output Shorted Here VFB VFB_TH ILIMIT INDUCTOR CURRENT DRAIN CURRENT t tON_TO t GATE tON_TO tON < tON_TO tON_TO tON > tON_TO tON_TO tON < tON_TO tON_TO t tON < tON_TO Figure 15. Current Runaway Protection, Inductor and MOSFET Current A minimal value needs to be imposed on the inductance value to avoid nuisance tripping of the protection feature that prevents the loss of control of the inductor current. Inadvertent operation of the protection feature limits the output-power capability of the converter. This condition depends on the converter's maximum input operating voltage and temperature. Use Equation 1 to calculate your minimum inductance value. VIN max L! u tON _ TO ILIMIT (1) In this equation, VIN(max) is the maximum voltage on the DC input. If the input is a rectifed AC voltage, it should be the peak value of the maximum AC line. For a DC input case, it should be the maximum DC input voltage. If the inductance value is too low, such that the MOSFET on-time is always less than tON_TO timeout and the device progressively increases the MOSFET off-time up to tOFF(ovl), the output power is reduced and the converter fails to supply the load. 8.4.6 Over Temperature Protection If the junction temperature rises above TJ(stop), the over temperature protection is triggered. This disables the power MOSFET switching. To re-enable the switching of the MOSFET the junction temperature has to fall by TJ(hyst) below the TJ(stop) where the device moves out of over temperature protection. Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 15 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com 9 Application and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 9.1 Application Information The UCC28881 can be used in various application topologies with direct or isolated feedback. The device can be used in low-side buck, where the output voltage is negative, or as a low-side buck-boost configuration, where the output voltage is positive. In both configurations the common reference node is the positive input node (VIN+). The device can also be configured as a LED driver in either of the above mentioned configurations. If the application requires the AC-to-DC power supply output to be referenced to the negative input node (VIN–), the UCC28881 can also be configured as a traditional high-side buck as shown in Figure 16. In this configuration, the voltage feedback is sampling the output voltage VOUT, making the DC regulation less accurate and load dependent than in low-side buck configuration, where the feedback is always tracking the VOUT. However, highconversion efficiency can still be obtained. 9.2 Typical Application 9.2.1 13-V, 225-mA High-Side Buck Converter Figure 16 shows a typical application example of a non-isolated power supply, where the UCC28881 is connected in a high-side buck configuration having an output voltage that is positive with respect to the negative high-voltage input (VIN–). The output voltage is set to 13 V in this example, but can easily be changed by changing the value of RFB1. This application can be used for a wide variety of household appliances and automation, or any other applications where mains isolation is not required. RF L2 D2 HVIN VDD UCC28881 CVDD C1 + DRAIN RFB1 FB VIN C2 - GND CFB RFB2 D4 L1 D1 D3 CL RL + VOUT - Figure 16. Universal Input, 12-V, 225-mA Output High-Side Buck 16 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 Typical Application (continued) 9.2.1.1 Design Requirements Table 2. Design Specification DESCRIPTION MIN TYP MAX UNIT DESIGN INPUT VIN AC input voltage 85 265 fLINE Line frequency 47 63 VRMS Hz IOUT Output current 0 225 mA DESIGN REQUIREMENTS PNL No-load input power VOUT Output voltage ΔVOUT Output voltage ripple η Converter full-load efficiency 12.5 13 500 mW 17.5 V 350 mV 70% 9.2.1.2 Detailed Design Procedure 9.2.1.2.1 Input Stage (RF, D2, D3, C1, C2, L2) • • • Resistor RF is a flame-proof fusible resistor. RF limits the inrush current, and also provide protection in case any component failure causes a short circuit. Value for its resistance is generally selected between 4.7 Ω to 15 Ω. A half-wave rectifier is chosen and implemented by diode D2 (1N4937). It is a general purpose 1-A, 600-V rated diode. It has a fast reverse recovery time (200 ns) for improved differential-mode-conducted EMI noise performance. Diode D3 (1N4007) is a general purpose 1-A, 1-kV rated diode with standard reverse recovery time (>500 ns), and is added for improved common-mode-conducted EMI noise performance. D3 can be removed and replaced by a short if not needed. EMI filtering is implemented by using a single differential-stage filter (C1-L2-C2). Capacitors C1 and C2 in the EMI filter also acts as storage capacitors for the high-voltage input DC voltage (VIN). The required input capacitor size can be calculated according Equation 2. 2 u PIN fLINE min CBULK min ª 1 u« « RCT ¬« § V BULK min 1 u arccos ¨ ¨ 2uV 2uS IN min © 2 2 2 u VIN VBULK min min ·º ¸» ¸» ¹ ¼» where • • • • • • CBULK(min) is minimum value for the total input capacitor value (C1 + C2 in the schematic of Figure 16). RCT = 1 in case of half wave rectifier and RCT = 2 in case of full-wave rectifier . PIN is the converter input power. VIN(min) is the minimum RMS value of the AC input voltage. VBULK(min) is the minimum allowed voltage value across bulk capacitor during converter operation. fLINE(min) is the minimum line frequency when the line voltage is VIN(min). The converter input power can be easily calculated as follow: • • The converter maximum output power is: POUT = IOUT x VOUT = 0.225 A x 13 V = 2.925 W Assuming the efficiency η = 68% the input power is PIN = POUT/η = 4.178 W Using the following values for the other parameters • • • VBULK(min) = 80 V VIN(min) = 85 VRMS (from design specification table) fLINE(min) = 57 Hz (2) Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 17 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com CBULK(min) = 15.6 μF. Considering that electrolytic capacitors, generally used as bulk capacitor, have 20% of tolerance in value, the minimum nominal value required for CBULK is: CBULK(min) CBULKn(min) ! 19.5 PF 1 TOLCBULK (3) Select C1 and C2 to be 10 μF each (CBULK = 10 μF + 10 μF = 20 μF > CBULKn(min)). By using a full-wave rectifier allows a smaller capacitor for C1 and C2, almost 50% smaller. 9.2.1.2.2 Regulator Capacitor (CVDD) Capacitor CVDD acts as the decoupling capacitor and storage capacitor for the internal regulator. A 100-nF, 10-V rated ceramic capacitor is enough for proper operation of the device's internal LDO. 9.2.1.2.3 Freewheeling Diode (D1) The freewheeling diode has to be rated for high-voltage with as short as possible reverse-recovery time (trr). The maximum reverse voltage that the diode should experience in the application, during normal operation, is given by Equation 4. VD1(max) 2 u VIN(max) 2 u 265V 375V (4) A margin of 20% is generally considered. The use of a fast recovery diode is required for the buck-freewheeling rectifier. When designed in CCM, the diode reverse recovery time should be less than 35 ns to keep low reverse recovery current and the switching loss. For example, STTH1R06A provides 25-ns reverse recovery time. When designed in DCM, slower diode can be used, but the reverse recovery time should be kept less than 75 ns. MURS160 can fit the requirement. 9.2.1.2.4 Output Capacitor (CL) The value of the output capacitor impacts the output ripple. Depending on the combination of capacitor value and equivalent series resistor (RESR). A larger capacitor value also has an impact on the start-up time. For a typical application, the capacitor value can start from 47 μF, to hundreds of μF. A guide for sizing the capacitor value can be calculated by the following equations: ILIMIT IOUT 440mA 225mA CL ! 20 u 20 u 200 PF fSW max u 'VOUT 62kHz u 350mV (5) RESR 'VOUT ILIMIT 0.8 : (6) Take into account that both CL and RESR contribute to output voltage ripple. A first pass capacitance value can be selected and the contribution of CL and RESR to the output voltage ripple can be evaluated. If the total ripple is too high the capacitance value has to increase or RESR value must be reduced. In the application example CL was selected (330 µF) and it has an RESR of 0.03 Ω. So the RESR contributes for 4% of the total ripple. The formula that calculates CL is based on the assumption that the converter operates in burst of twenty switching cycles. The number of bursts per cycle could be different, the formula for CL is a first approximation. 9.2.1.2.5 Pre-Load Resistor (RL) The pre-load resistor connected at the output is required for the high-side buck topology. Unlike low side buck topology, the output voltage is directly sensed, in high-side buck topology the output is sampled and estimated. At no-load condition, because the feedback loop runs with its own time constant, the buck converter operates with a fixed minimum switching frequency. Select the pre-load resistor or using a zener diode to prevent output voltage goes too high at no-load condition. A simple zener diode would be a good choice without going through the calculation. Besides the simplifying the calculation, zener diode doesn't consumes power at heavy load condition, which helps to improve the converter heavy-load efficiency. 18 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 A simple resistor can also be used to limit the output voltage at no load condition. However, this resistor connects to the output all the time and it reduces the full-load efficiency. The pre-load resistor can be calculated based on below equation or based on experiments. In this equation, the VMAX is allowed maximum output voltage, and VREG is the regulated output voltage. RL 4 u VMAX 2 u VMAX VMAX VREG VREG u CFB u RFB1 RFB2 L1 u ILIMIT 2 (7) 9.2.1.2.6 Inductor (L1) Initial calculations: Half of the peak-to-peak ripple current at full load: 'IL 2 u ILIMIT IOUT (8) When operating in DCM, the peak-to-peak current ripple is the peak current of the device. Average MOSFET conduction minimum duty cycle at continuous conduction mode is: VOUT Vd DMIN VIN(max) Vd (9) If the converter operates in discontinuous conduction mode: I VOUT Vd DMIN 2 u OUT ILIMIT VIN(max) Vd (10) Maximum allowed switching frequency at VIN(max) and full load: DMIN FSW _ VIN(max) tON _ TO (11) Switching frequency has a maximum value limit of fSW(max). The worst case ILIMIT = 315 mA, but assuming ΔIL = 180 mA. The converter works in continuous conduction mode (ΔIL < ILIMIT) so based on VOUT = 13 V, Vd = 0.5 V and VIN(max) = 375 V VOUT Vd DMIN 3.61% VIN(max) Vd (12) The maximum allowed switching frequency is 62 kHz because the calculated value exceeds it. DMIN FSW _ VIN(max) 80kHz ! fSW(max) 62kHz tON _ TO (13) The duty cycle does not force the MOSFET on time to go below tON_TO. If DMIN/TON_TO < fSW(max), the switching frequency is reduced by current runaway protection and the maximum average switching frequency is lower than fSW(max), the converter can't support full load. The minimum inductance value satisfies both the following conditions: VOUT Vd L! 1 mH 'IL u FSW _ VIN max L! VIN max ILIMIT u tON _ TO (14) 375 V u 450ns # 536 PH 315mA (15) In the application example, 1 mH is selected as the minimum standard value that satisfy Equation 14 and Equation 15. Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 19 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com 9.2.1.2.7 Feedback Path (CFB, RFB1 and RFB2) and Load Resistor (RL) In low-side buck converter the output voltage is always sensed by the FB pin and UCC28881 internal controller can turn on the MOSFET on VOUT. In high-side buck converter applications the information on the output voltage value is stored on CFB capacitor. This information is not updated in real time. The information on CFB capacitor is updated just after MOSFET turn-off event. When the MOSFET is turned off, the inductor current forces the freewheeling diode (D1 in Figure 16) to turn on and the GND pin of UCC28881 goes negative at -Vd1 (where Vd1 is the forward drop voltage of diode D1) with respect to the negative terminal of bulk capacitor (C1 in Figure 16). When D1 is on, through diode D4, the CFB capacitor is charged at VOUT – Vd4 + Vd1. Set the output voltage regulation level using Equation 16. RFB1 VOUT(T) Vd4 Vd1 VFB _ TH VOUT(T) VFB _ TH # RFB2 VFB _ TH VFB _ TH where • • • • • WFB VFB_TH is the FB pin reference voltage. VOUT_T is the target output voltage. RFB1, RFB2 is the resistance of the resistor divider connected with FB pin (see Figure 16) The capacitor CFB after D1 is discharged with a time constant that is τFB = CFB x (RFB1 + RFB2 ). Select the time constant τFB, given in Equation 17 CFB u RFB1 RFB2 0.1u CL u RLOAD (16) (17) In this equation, RLOAD is the full load resistor value. The time constant selection leads to a slight output-voltage increase in no-load or light-load conditions. In order to reduce the output-voltage increase, increase τFB. The drawback of increasing τFB is t in high-load conditions VOUT could drop. Because of the nature of sample and hold of output voltage feedback, the feedback loop components need some adjustment after the initial design. The larger time constant of the feedback components leads to lower no-load switching frequency. As the results, the no-load standby power and light-load voltage regulation are improved. Because of larger time constant, at heavier load, the load regulation start to get worse. On the contrast, decreasing the time constant makes the heavy load regulation better but increases the no-load standby power and makes the light-load voltage regulation worse. Some tradeoff is required to make the regulation and standby power. Below table summarizes the relationship between the feedback loop time constant and the load regulation. This can be used for an easy guideline for fine tuning the circuit performance. Table 3. Feedback Loop Time Constant Adjustment FEEDBACK LOOP TIME CONSTANT (τFB) 20 NO-LOAD REGULATION HEAVY-LOAD OUTPUT VOLTAGE RIPPLE Increase Better Worse Better Decrease Worse Better Worse Submit Documentation Feedback STANDBY POWER Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 9.2.1.3 Application Curves Figure 17 shows the output voltage vs output current. Different curves correspond to different converter AC input voltages. Figure 18 shows efficiency changes vs output power. Different curves correspond to different converter AC input voltages. 18 100 115V AC 230V AC 16 90 80 70 12 Efficiency (%) Output Voltage (V) 14 10 8 6 60 50 40 30 4 20 2 10 0 115V AC 230V AC 0 0 0.05 0.1 0.15 Output Current (A) 0.2 0.25 0 D001 Figure 17. Output IV Characteristic 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 Output Power (W) 3 D001 Figure 18. Efficiency vs POUT Table 4. Converter Efficiency VIN_AC (VRMS) LOAD (mA) EFFICIENCY (%) AVERAGE EFFICIENCY (%) 115 50 82 81 100 81 150 81 225 80 230 50 80 100 81 150 81 225 81 80.8 Table 5. Key Component List for 13-V 225-mA High-Side Buck Converter DES PART NUMBER MANUFACTURER (1) Bulk capacitor, 10 μF, 450 V EEUED2W100 Panasonic CFB Feedback capacitor, ceramic, 0.015 μF, 50 V C0805C153K5RACTU Kemet CL Output capacitor, 330 μF, 35 V EEU-FM1V331L Panasonic D1 Buck freewheeling diode, ultrafast, 600 V, 1 A STTH1R06A ST Microelectronics Rectifier diodes, standard recovery rectifier, 1000 V, 1 A 1N4007 Fairchild semiconductor C1, C2 D2, D3 (1) DESCRIPTION D4 Feedback diode, standard recovery rectifier, 600 V, 1N4006-T 1A Diodes Inc. L1 Buck inductor, 1 mH, 0.4 A, 7447471102 Wurth Elektronik L2 Filter inductor, 1 mH, 0.2 A 5800-102-RC Bourns RFB1 Upper feedback resistor 121 kΩ, 1% ERJ-6ENF1213V Panasonic RFB2 Lower feedback resistor, 10.0 kΩ, 1% ERJ-6ENF1002V Panasonic See Third-Party Products Discalimer Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 21 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com 9.2.2 Additional UCC28881 Application Topologies 9.2.2.1 Low-Side Buck and LED Driver – Direct Feedback (Level Shifted) Features include: • Output Referenced to Input • Negative Output (VOUT) with Respect to VIN+ • Step Down: VOUT < VIN • Direct Level-Shifted Feedback RFB1 D1 + CL + VDD VIN - Q1 L1 HVIN VOUT DRAIN UCC28881 FB GND RFB2 Figure 19. Low-Side Buck, Direct Feedback (Level Shifted) RSENSE C1 R2 D1 RFB1 CL R1 Q2 + Current Feedback VIN - L1 HVIN VDD VOUT DRAIN Q1 UCC28881 FB GND RFB1 Figure 20. Low-Side Buck LED Driver, Direct Feedback (Level Shifted) 22 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 9.2.2.2 High-Side Buck Converter Features include: • Output Referenced to Input • Positive Output (VOUT) with Respect to VIN– • Step Down (VOUT < VIN) HVIN VDD + DRAIN UCC28881 VIN FB - 10 GND D2 CFB RFB2 L1 + CL D1 VOUT - Figure 21. High-Side Buck Converter Schematic 9.2.2.3 Non-Isolated, Low-Side Buck-Boost Converter Features Include: • Output Referenced to Input • Positive Output (VOUT) with Respect to VIN+ • Step Up, Step Down: VOUT > VIN or VOUT < VIN • Direct Level-Shifted Feedback CL VOUT D1 VDD + VIN - - L1 HVIN + DRAIN UCC28881 FB GND RFB2 Figure 22. Low-Side Buck-Boost Converter Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 23 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com 9.2.2.4 Non-Isolated, High-Side Buck-Boost Converter Features include: • Output Referenced to Input • Positive Output (VOUT) with Respect to VIN– • Step Up, Step Down: VOUT > VIN or VOUT < VIN HVIN VDD DRAIN UCC28881 + FB VIN RFB1 GND - CFB RFB2 D1 D2 + VOUT - CL L1 Figure 23. High-Side Buck-Boost Converter 9.2.2.5 Non-Isolated Flyback Converter Features include: • Output Referenced to Input • Positive Output (VOUT) with Respect VIN– • Direct Feedback • Higher Output Current Capability, 4.5 W for 85 VAC ~ 265 VAC Input and 6 W for 176 VAC ~ 265 VAC Input RFB1 CL HVIN + VDD VIN - + VOUT - DRAIN UCC28881 CVDD FB GND RFB2 Figure 24. Non-Isolated Flyback Configuration 24 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 9.2.2.6 Isolated Flyback Converter Features include: • Output Isolated from Input • Direct Feedback • Higher Output Current Capability, 4.5 W for 85 VAC ~ 265 VAC Input and 6 W for 176 VAC ~ 265VAC Input CL HVIN + VDD VIN - + VOUT - DRAIN UCC28881 CVDD FB GND RFB Figure 25. Isolated Flyback Converter Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 25 UCC28881 SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 www.ti.com 10 Power Supply Recommendations The VDD capacitor recommended value is 100 nF to ensure high-phase margin of the internal 5-V regulator and it should be placed close to VDD pin and GND pins to minimize the series resistance and inductance. The VDD pin provides a regulated 5-V output but it is not intended as a supply for external load. Do not supply VDD pin with external voltage source (for example the auxiliary winding of flyback converter). Always keep GND pin 1 and GND pin 2 connected together with the shortest possible connection. 11 Layout 11.1 Layout Guidelines • • • • In both buck and buck-boost low-side configurations, the copper area of the switching node DRAIN should be minimized to reduce EMI. Similarly, the copper area of the FB pin should be minimized to reduce coupling to feedback path. Loop CL, Q1, RFB1 should be minimized to reduce coupling to feedback path. In high-side buck and buck boost the GND, VDD and FB pins are all part of the switching node so the copper area connected with these pins should be optimized. Large copper area allows better thermal management, but it causes more common mode EMI noise. Use the minimum copper area that is required to handle the thermal dissipation. Minimum distance between 700-V coated traces is 1.41 mm (60 mils). 11.2 Layout Example Figure 26 shows and example PCB layout for UCC28881 in low-side buck configuration. L2 D2 Rf C1 C2 xx xx D3 60 mils AC INPUT DRAIN GND_IC L1 GND_IC xxx xxx xx xxxx xx D1 NC FB HVIN VDD Rfb2 = top layer = bottom layer = connect top and bot Rfb1 Q1 CL RL DC OUTPUT Figure 26. UCC28881 Layout Example 26 Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 UCC28881 www.ti.com SLUSC36B – NOVEMBER 2015 – REVISED JANUARY 2016 12 Device and Documentation Support 12.1 Device Support 12.1.1 Third-Party Products Disclaimer TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE. 12.2 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 12.3 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 12.4 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 12.5 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 13 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Documentation Feedback Copyright © 2015–2016, Texas Instruments Incorporated Product Folder Links: UCC28881 27 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) UCC28881D ACTIVE SOIC D 7 75 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 U28881 UCC28881DR ACTIVE SOIC D 7 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 125 U28881 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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UCC28881D
  •  国内价格
  • 1+12.01393
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库存:294

UCC28881D
  •  国内价格
  • 1+6.78240
  • 10+6.60960
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库存:72