UCC561DP

UCC561 www.ti.com SLUS413B -- MAY 1999 -- REVISED NOVEMBER 2002 LOW-VOLTAGE DIFFERENTIAL SCSI (LVD) 27-LINE REGULATOR SET FEATURES D SCSI SPI--2, SPI--3 and SPI--4 LVD SCSI D D D 27-Line, Low-Voltage Differential Regulator 2.7-V to 5.25-V Operation Integrated Regulator Set for LVD SCSI Differential Failsafe Bias APPLICATIONS D Servers D Workstations D RAID Boxes DESCRIPTION The UCC561 low-voltage differential (LVD) regulator set is designed to provide the correct references voltages and bias currents for LVD termination resistor networks (475 9, 121 9, and 475 9). The device also provides a 1.3-V output for “diff sense” signaling. With the proper resistor network, the UCC561 solution meets the common mode bias impedance, differential bias, and termination impedance requirements of SPI--2 (Ultra2), SPI--3 (Ultra3/Ultra160) and SPI--4 (Ultra320). The UCC561 is not intended for SPI--5 applications. This device incorporates into a single monolith, two sink/source reference voltage regulators, a 1.3-V buffered output and protection features. The protection features include thermal shutdown and active current-limiting circuitry. The UCC561 is offered in 16-pin SOIC (DP) package. REF 1.3 V TRMPWR 2.7 V TO 5.25 V 7 DIFSENS 6 REG1 3 REG2 1.3 V ±100 mV 2 REF 1.75 V 1.75 V ±50 mV 200 mA SOURCE/SINK SOURCE/SINK REGULATOR REF 0.75V 0.75 V ±50 mV 200 mA SOURCE/SINK UDG--98093 4 PGND Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright ã 2002, Texas Instruments Incorporated UCC561 www.ti.com SLUS413B -- MAY 1999 -- REVISED NOVEMBER 2002 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT PACKAGE-- LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE ORDERING NUMBER TRANSPORT MEDIA, QUANTITY UCC561 SOIC--16 DP 0°C to 70°C UCC561DP Rail, 70 For the most current specification and package information, refer to our web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted(1)(2) UCC561 TERMPWR UNIT 6 V 1.2 W Junction temperature, TJ --55 to 150 °C Storage temperature, Tstg --65 to 150 °C Package dissipation (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Currents are positive into and negative out of the specified terminals. RECOMMENDED OPERATING CONDITIONS MIN VTERMPWR, TermPower voltage 2.70 DP PACKAGE (TOP VIEW) NC TERMPWR REG2 HSPGND HSGND REG1 DIFSENS NC 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 NC = No connection 2 NC NC NC HSGND HSGND NC NC NC NOM MAX UNIT 5.25 V UCC561 www.ti.com SLUS413B -- MAY 1999 -- REVISED NOVEMBER 2002 ELECTRICAL CHARACTERISTICS TJ = 0°C to 70°C, VTERMPWR = 3.3 V unless otherwise noted(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TERMPWR Supply Current TERMPWR supply current No load 40 TERMPWR voltage 2.70 5.25 mA V Regulator 1.75-V regulator REG1 (±125 mA) 1.3-V regulator --5 mA £ IDIFSENS £ 50 mA 0.75-V regulator 1.75-V regulator source current 1.75-V regulator sink current 1.75-V regulator source current 1.70 1.75 1.80 1.2 1.3 1.4 REG2 (±125 mA) 0.70 0.75 0.80 VO = 1.25 V --200 VO = 2.25 V 200 limit(1) 1.75-V regulator sink current limit(1) --200 --700 200 700 --5 --15 50 200 1.3-V regulator source current VDIFSENS = 0 V 1.3-V regulator sink current VDIFSENS = 2.4 V 0.75-V regulator source current VO = 0.25 V --200 VO = 1.25 V 200 0.75-V regulator sink current 0.75-V regulator source current limit(1) 0.75-V regulator sink current limit(1) (1) --200 --700 200 700 V mA mA mA A Ensured by design. Not production tested. TERMINAL FUNCTIONS TERMINAL NAME HSPGND NO. I/O DESCRIPTION 4 -- Heat sink power ground pin. 5, 12, 13 -- Heat sink ground pin which should be attached to the ground plane on a multilayer board or large copper area on a 2 layer board. REG1 6 O 1.75-V source/sink regulated output voltage pin. The part is internally current limited for both sinking and sourcing current to prevent damage. For best performance, a 4.7-mF low-ESR capacitor is recommended. Lead lengths should be kept to a minimum. REG2 3 O 0.75-V source/sink regulated output voltage pin. The part is internally current limited for both sinking and sourcing current to prevent damage. For best performance, a 4.7-mF low-ESR capacitor is recommended. Lead lengths should be kept to a minimum. DIFSENS 7 O 1.3-V source/sink regulated output voltage pin. The part is internally current limited to the SCSI SPI--2 through SPI--4 standards for both sinking and sourcing current to prevent damage. TERMPWR 2 I Supply voltage pin. The pin should be decoupled with at least a 2.2-mF low-ESR capacitor. For best performance, a 4.7-mF low--ESR capacitor is recommended. Lead lengths should be kept to a minimum. HSGND 3 UCC561 www.ti.com SLUS413B -- MAY 1999 -- REVISED NOVEMBER 2002 APPLICATION INFORMATION The resistor stack with the 1.75-V and 0.75-V reference gives the correct differential impedance, bias voltage, common mode differential impedance, and common mode voltage as show in Table 1. Table 1. UCC561 Resistor Stack vs. Standard (SPI--2 through SPI--4) UCC561 STANDARD UNITS Differential Impedance PARAMETER 107.3 100 to 110 W Differential bias voltage 112.9 100 to 125 mV Common-mode differential impedance 237 100 to 300 W Common-mode voltage 1.25 1.2 to 1.3 V DIFSENS: SOURCE ONLY FROM TERMPWR TERMPWR 2.7V TO 5.25V 2 TERMPWR REF 1.3V 7 DIFSENS DIFSENS 1.3 V ±100 mV 4.7mF SOURCE/SINK REGULATOR REF 1.75V 6 1.75 V ±50 mV 200 mA SOURCE/SINK 475 1% REG1 L1-- 4.7mF 121 1% SOURCE/SINK REGULATOR 4 PGND REF 0.75V 0.75 V ±50 mV 200mA SOURCE/SINK 3 475 1% REG2 L1+ 4.7mF 475 1% L27-475 1% 121 1% L27+ UDG--98096 Figure 1. Low-Voltage Differential Discrete Resistor Stack 4 PACKAGE OPTION ADDENDUM www.ti.com 24-Mar-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) UCC561DP OBSOLETE SOIC D 16 TBD Call TI Call TI UCC561DP UCC561DPTR OBSOLETE SOIC D 16 TBD Call TI Call TI UCC561DP UCC561DPTRG4 OBSOLETE SOIC D 16 TBD Call TI Call TI UCC561DP UCC561TD OBSOLETE TO-220 KC 5 TBD Call TI Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 24-Mar-2015 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE OUTLINE KC0005A TO-220 - 16.51 mm max height SCALE 0.850 TO-220 4.83 4.06 10.67 9.65 3.05 2.54 B 1.40 1.14 A 6.86 5.69 3.71-3.96 8.89 6.86 (6.275) 12.88 10.08 OPTIONAL CHAMFER 16.51 MAX 2X (R1) OPTIONAL 9.25 7.67 C (4.25) PIN 1 ID (OPTIONAL) NOTE 3 14.73 12.29 1 5X 0.25 5 0.61 0.30 1.02 0.64 C A B 3.05 2.03 4X 1.7 6.8 1 5 4215009/A 01/2017 NOTES: 1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Shape may vary per different assembly sites. www.ti.com EXAMPLE BOARD LAYOUT KC0005A TO-220 - 16.51 mm max height TO-220 4X (1.45) PKG 0.07 MAX ALL AROUND 0.07 MAX ALL AROUND METAL TYP (1.45) PKG (2) 4X (2) 1 (R0.05) TYP 5X ( 1.2) SOLDER MASK OPENING, TYP (1.7) TYP 5 FULL R TYP (6.8) LAND PATTERN NON-SOLDER MASK DEFINED SCALE:12X 4215009/A 01/2017 www.ti.com IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products; by downloading, accessing or using any particular TI Resource in any way, you (individually or, if you are acting on behalf of a company, your company) agree to use it solely for this purpose and subject to the terms of this Notice. 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