Using the UCD3138PFCEVM-026
User's Guide
Literature Number: SLUU885B
March 2012 – Revised July 2012
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WARNING
Always follow TI’s set-up and application instructions, including use of all interface components within their
recommended electrical rated voltage and power limits. Always use electrical safety precautions to help
ensure your personal safety and the safety of those working around you. Contact TI’s Product Information
Center http://support/ti./com for further information.
Save all warnings and instructions for future reference.
Failure to follow warnings and instructions may result in personal injury, property damage, or
death due to electrical shock and/or burn hazards.
The term TI HV EVM refers to an electronic device typically provided as an open framed, unenclosed
printed circuit board assembly. It is intended strictly for use in development laboratory environments,
solely for qualified professional users having training, expertise, and knowledge of electrical safety risks in
development and application of high-voltage electrical circuits. Any other use and/or application are strictly
prohibited by Texas Instruments. If you are not suitably qualified, you should immediately stop from further
use of the HV EVM.
1. Work Area Safety:
(a) Keep work area clean and orderly.
(b) Qualified observer(s) must be present anytime circuits are energized.
(c) Effective barriers and signage must be present in the area where the TI HV EVM and its interface
electronics are energized, indicating operation of accessible high voltages may be present, for the
purpose of protecting inadvertent access.
(d) All interface circuits, power supplies, evaluation modules, instruments, meters, scopes and other
related apparatus used in a development environment exceeding 50 VRMS/75 VDC must be
electrically located within a protected Emergency Power Off (EPO) protected power strip.
(e) Use a stable and non-conductive work surface.
(f) Use adequately insulated clamps and wires to attach measurement probes and instruments. No
freehand testing whenever possible.
2. Electrical Safety:
(a) De-energize the TI HV EVM and all its inputs, outputs, and electrical loads before performing any
electrical or other diagnostic measurements. Revalidate that TI HV EVM power has been safely deenergized.
(b) With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring,
measurement equipment hook-ups and other application needs, while still assuming the EVM circuit
and measuring instruments are electrically live.
(c) Once EVM readiness is complete, energize the EVM as intended.
WARNING: while the EVM is energized, never touch the EVM or its electrical circuits as they
could be at high voltages capable of causing electrical shock hazard.
3. Personal Safety:
(a) Wear personal protective equipment e.g. latex gloves and/or safety glasses with side shields or
protect EVM in an adequate lucent plastic box with interlocks from accidental touch.
4. Limitation for Safe Use:
(a) EVMs are not to be used as all or part of a production unit.
2
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User's Guide
SLUU885B – March 2012 – Revised July 2012
Digitally Controlled Single-Phase PFC Pre-Regulator
1
Introduction
This EVM is to help evaluate the UCD3138 64-pin digital control device in off-line power converter
application and then to aid its design. The EVM is a standalone Power Factor Correction (PFC) preregulator of single-phase AC input. The EVM UCD3138PFCEVM-026 is used together with its control
card, UCD3138CC64EVM-030, also an EVM on which is placed UCD3138RGC.
The EVM of UCD3138PFCEVM-026 together with UCD3138CC64EVM-030 can be used as they are
delivered without additional work, from either hardware or firmware, to evaluate PFC. The
UCD3138PFCEVM-026 together with the UCD3138CC64EVM-030 can also be re-tuned on its design
parameters through the operation of GUI, called Texas Instruments Fusion Digital Power Designer, or reloaded up with custom firmware with user’s definition and development.
The EVM system is in topology of single-phase boost converter at its delivery on both hardware and
firmware, but can be re-configured into two other PFC topologies: dual-phase interleaved, and bridgeless,
then corresponding operation can be made by reloading with that associated firmware. All necessity of
hardware and firmware for the two additional topologies are already developed and delivered with the
shipment. Please contact Texas Instruments to obtain the instructions how to make re-configuration.
In the package delivered, three EVMs are included UCD3138PFCEVM-026, UCD3138CC64EVM-030, and
USB-TO-GPIO. In the same package, also included is a hard copy of Evaluation Module Electrical Safety
Guideline.
This user’s guide provides basic evaluation instruction from a viewpoint of system operation in standalone
PFC in its boost configuration.
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Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
3
Description
2
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Description
UCD3138PFCEVM-026 together with UCD3138CC64EVM-030 is an EVM of PFC pre-regulator with digital
control using UCD3138 device in boost converter topology and in the application of single-phase AC input.
UCD3138 device is located on the board of UCD3138CC64EVM-030. UCD3138CC64EVM-030 is a
daughter card and serves all PFC required control functions with preloaded single-phase boost PFC
firmware. UCD3138PFCEVM-026 accepts universal AC line input from 90 VAC to 264 VAC, and outputs
nominal 390 VDC with full load output power 360 W, or full output current 0.92 A.
2.1
Typical Applications
•
•
•
2.2
Features
•
•
•
•
•
•
•
•
•
4
Single-Phase Universal AC Line Power Factor Correction Pre-Regulator
Servers
Telecommunication Systems
Digitally Controlled PFC Pre-Regulator
Universal AC Line Input from 90 VAC to 264 VAC with AC Line Frequency 47 Hz to 63 Hz
Regulated Output 390 VDC with Output from No-Load to Full-Load
Full-Load Power 360 W, or full-Load Current 0.92 A
High Power Factor Close to 0.999 and Low THD Below 5% in Most Operation Conditions
High Efficiency
Protection:
– Over Voltage
– Over Current
– Brownout
– Power-On Inrush Current
Test Points to Facilitate Device and Topology Evaluation
Re-Configurable to Dual-Phase Interleaved PFC or Bridgeless PFC (please contact TI for detail)
Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
SLUU885B – March 2012 – Revised July 2012
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Electrical Performance Specifications
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3
Electrical Performance Specifications
Table 1. UCD3138PFCEVM-026 Electrical Performance Specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Characteristics
Voltage range
90
264
VAC
Line frequency
47
63
Hz
6.5
7.0
A
4.5
5.5
Input current, peak
Input = 90 VAC, 60 Hz, full load = 0.92 A
Input current, RMS
Input = 90 VAC, 60 Hz, full load = 0.92 A
Input UVLO On
PFC function start (no load)
86
90
Input UVLO Off
PFC function stop (no load)
80
83
Power factor
Half load
0.99
THD, input current
10% to 30% full load
10%
30% to 100% full load
5%
Output voltage, VOUT
No load to full load
390
Output load current, IOUT
90 VAC to 264 VAC
Output voltage ripple
Full load and 115 VAC, 60 Hz
VAC
-
Output Characteristics
VDC
0.92
13
Full load and 230 VAC, 50 Hz
A
Vpp
15
Output over current
0.95
A
Systems Characteristics
Switching frequency
Normal operation
100
Peak efficiency
230 VAC, full load
96%
Full load efficiency
115 VAC, full load
94%
Operating temperature
Natural convection
25
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Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
kHz
ºC
5
6
J2
J11
F2
4.7nF
C5
(J3-26)
LED_3
(J3-25)
LED_2
LED_1
(J3-13)
LN1371GTR
R8
1k
+
BUS+
Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
J7
J10
MBR0530
1
C6
4.7nF
R81
1k
10uF
OUT 2
OUT 4
7
GND 5
VIN_MONITOR6
VAUX_S
R31
1.5k
10k
R72
1.5k
VAUX_S
Secondary side
External sync signal
SYNC_IN
VAUX_P
VAUX_S_RTN
1
0
VAUX_S
R75
R36
R35
R34
R33
1
1
0
0
TP10
1
TP8
VAUX_S_RTN
1
VAUX_P_RTN
VAUX_S
+12V_EXT
TP9
VAUX_P
When U11 not installed, connect J14-1 and -3 to external source to get +12V_EXT
C12
1nF
C37
0.47uF
C3
47nF
C2
47nF
1
VAUX_S_RTN
R74
10k
Q6
MMBT3904TT1
D20
R80
1k
R31 and R106 are preload resistors
if use VAUX_P but not use VAUX_S
Isolation line
4.7k
R38
D21
Q7
MMBT3904TT1
C21
1 ADJ/GND
2
GND_EARTH
TP4 +3_3V
L3
7.80uH
2
L4
7.80uH
If needed, connect J15-1 and -2 to use U11 to bias secondary side
4 -VIN
3 -VAUX_-VIN
2 VAUX_P
1 VIN+
1
3
2
10k
DB-1
PWR050
R37
R21
R82
1k
C1
10uF
3 IN
D24
2
VAUX_P_RTN
1
4.7k
VAUX_P
R20
R19
2
1
U7
TLV1117-33IDCY
4
2mH
1
L5
3
TP11
D18
Q8
4.7k MMBT3904TT1
+12V_EXT
1
1
Copper fill for heat-sink
+12V_EXT
1
D19
AC_Neutral
Vin = 90 to 264 Vac (47 to 63Hz)
GND_EARTH
Fuse: T7A/250VAC
AC_Line
2
TP7
1
(J4-20)
AC_N
330pF
C30
TP5
3.3k
R23
3.83k
R14
R27
200k
C38
0.47uF
C20
2
DPWM_3B
FAULT_0
FAULT_1
SYNC
PWM-1
PWM-0
SCI_RX1
SCI_TX1
SCI_RX0
SCI_TX0
TP3
1nF
DPWM-0A
DPWM-1A
DPWM-1B
DPWM-2A
DPWM-2B
DPWM-3A
AC_DROP
RLY_CTRL
LED_1
SYNC_IN
SCI_TX1
SCI_RX1
LED_2
LED_3
SCI_TX0
SCI_RX0
+12V_EXT
+3_3V
D25
BAT54S
R13 200k
R28
200k
R29
200k
R15
200k
R30
200k
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
AC_L
(J4-18)
DGND
1
1
J3
1
1
R70
10k
2N7002
Q1
TP12
R42
TP13
5
1
1k
2
3
4
50
RLY_CTRL
(J3-11)
D5
1N4148W
+12V_EXT
AC_NEU_PFC
1
SH2
2
AGND
J4
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
ISENSE_SHUNT
1
CT_2
1
1
R68
IPM
IIN_SENSE
VBUS_SENSE
CT_1
1
C17
VBUS_OV
AC_L
AC_N
1
C25
Parts not used
AD_00
AD_01
AD_02
AD_03
AD_04
AD_05
AD_06
AD_07
AD_08
AD_13
1
C29
EADC_P2
EADC_P1
EADC_P0
R24
0
1
R1
R49
CT_2
R32
CT_1
0
Bridgeless PFC with CT_1 and CT_2 and Interleaved PFC with ISENSE_SHUNT.
+3_3V
D6 BAT54S
R16
3.83k
TP14
K1
R3
AC_L_PFC
0.1uF
C27
SCI_TX1
1
+3_3V
4.7k
R22
1
3
T1IN 11
4 GND1
3 INB
2 OUTA
3
0.1uF
C28
R76
R77
Isolated GND
GND2 5
OUTB 6
INA 7
VCC2 8
0
1.1k
R78
V33D_ISO
R1OUT 9
INVALID 10
U8
V33D_ISO
ISO7221CD
3
4
T1OUT 13
FORCEON 12
U9
SFH6156-2
SCI_TX0
SCI_RX0
8 R1IN
7 V-
6 C2-
5 C2+
4 C1-
GND 14
3 V+
2N7002
Q4
2
1 VCC1
1
1
AC_DROP
100
R79
(J3-8)
SCI_RX1
R73
10k
0.1uF
+3_3V
0.1uF
0.1uF
C14
C13
C9
C8
0.1uF
VCC 15
2 C1+
FORCEOFF 16
U2
SN75C3221DBR
1 EN
C15
0.1uF
1
Secondary side
ISO_SCI_TX
ISO_SCI_RX
GND_Ext
Isolated GND
3
1
2
3
4
5
6
V33D_ISO
J8
Secondary side
Ext Supply
3.3V
0
1
6
2
7
3
8
4
9
5
10
OPTO Isolated Section
1
1
TP2
TP1
+3_3V
J9
4
+
J1
Schematics
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Schematics
Figure 1. UCD3138PFCEVM-026 Schematic
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C4
2
R5
1k
R69
1.6k
BAT54S
D4
+3_3V
C18
0.1uF
(J3-7)
DPWM-3A
SYNC_IN
(J3-15)
6
49.9k
R59
4
R60
49.9k
3
2
100pF
C36
R2
3.3M
2
R58
R39
IPM
+3_3V
R61
1k
HS1
TP21
TP18
D2
BAT54S
1
47nF
C22
1
C32
150pF
R45
Interleaved PFC: Jump across E6 and E4, and E1 and E5.
D17
GBU8J
C23
1
SH1
D7
MURS160T3
0.02
0.02
1
1
1
4.7nF
E5
E4
2
JMP1
R17
100k
GND_EARTH
R18
100k
1
DGND
1
SWITCH_NODE
C7
1
E1
1
E3
E6
1
2
0.1uF
1
E2
R11
100k
R12
100k
1.8k
R48
PGND
100
R6
R7
BAT54S
BAT54C
D8
2k
2k
+3_3V
D23
Single-phase PFC: default connection E6 to E4.
Bridgeless PFC: Jump across E2 and E6, and E3 and E1.
TP16
U1
OPA350EA
7
100pF
C35
+3_3V
2
0.01uF
C16
(J4-8)
IIN_SENSE
U3
R4
OPA350EA 5.01k
910
Q5
2N7002
AC_NEU_PFC
AC_L_PFC
TP20
(J4-40)
ISENSE_SHUNT
0.1uF
R71
(J4-6)
R43
R41
1
+3_3V
(J4-30)
CT_2
6A6-T
R44
D15
BAT54S
D16
+12V_EXT
(J3-5)
DPWM-2A
(J3-6)
DPWM-2B
(J3-4)
DPWM-1B
(J3-3)
R40
DPWM-1A
+12V_EXT
(J4-12)
CT_1
0
1
1
0
2
1
+3_3V
D22
TP6
C11
C10
2
IN-
VDD 6
10k
IN-
OUT
1
OUTB 5
Parts not used
R64
U6
N/C 8
OUTA 7
ZHCS506
IN+
GND
VDD
4 INB
3 GND
2 INA
1 N/C
R63
15
U4
1
UCC27324D
IN+
GND
VDD
U5
OUT
ZHCS506
R65 10k
D9
D10
1
15
R66
BAT54S
TP19
TP25
R54
0
3
5.23
3
R57
10k
1
MBR0530
D12
R52
0
2
R56
10k
2
3
T2
Q2
7
8
TP23
C24
TP17
47nF
C40
TP22
R47
1.8k
R46
100k
R51
100k
R67
100k
R62
100k
47nF
D1
+
-
J6
Vbus
+
220uF
C34
J5
BAT54S +3_3V
BUS+
C19
0.1uF
C41
2
(J4-10)
VBUS_SENSE
TP15
100k
R9
R10
100k
R25
100k
R26
100k
Vbus = 390VDC, Iout = 0.92A
47nF
47nF
0.1uF
C39
2
1.8k
R50
C33
HS2
+3_3V
(J4-16)
VBUS_OV
HS3
SWITCH_NODE
BAT54S
D3
TP24
C3D10060G
D14
D13
C3D10060G
8
7
PA1005.050
1
Q3
IPP60R199CP
D11
MBR0530
327uH
L1
1uF
C26
T1
PA1005.050 1
+12V_EXT
R55
47uF
C31 +
R53
5.23
1
TP26
L2
327uH
IPP60R199CP
3
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Schematics
Figure 2. UCD3138PFCEVM-026 Schematic
Digitally Controlled Single-Phase PFC Pre-Regulator
7
Test Setup
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5
Test Setup
5.1
Test Equipment
AC Voltage Source:capable of single-phase output AC voltage 85 VAC to 265 VAC, 47 Hz to 63 Hz,
adjustable, with minimum power rating 400 W, the AC voltage source to be used should meet IEC60950
reinforced insulation requirement.
DC Multimeter: capable of 0-V to 500-V input range, four digits display preferred.
Output Load: DC load capable of 400 VDC or greater, 1 A or greater, and 400 W or greater, with display
such as load current and load power.
Oscilloscope: capable of 500-MHz full bandwidth, digital or analog, if digital 5 Gs/s or better.
Current probe: capable of 0 A to 10 A, 100-MHz or greater full bandwidth, AC coupling.
Fan: 200 LFM to 400 LFM forced air cooling is recommended, but not a must.
Recommended Wire Gauge: capable of 4-A RMS, or better than #16 AWG, with the total length of wire
less than 8 feet (4 feet input and 4 feet return).
5.2
Recommended Test Setup
+
Electronic
Load
VM1
TP17
TP22
J6
J1
J5
J2
L
N
AC Source
Figure 3. UCD3138PFCEVM-026 Recommended Test Setup
8
Digitally Controlled Single-Phase PFC Pre-Regulator
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Test Setup
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UCD3138CC64EVM-030
Figure 4. EVM Orientation of UCD3138PFCEVM-030 on the UCD3138PFCEVM-026
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Digitally Controlled Single-Phase PFC Pre-Regulator
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9
List of Test Points
6
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List of Test Points
Table 2. List of Test Points
7
TEST POINTS
NAME
DESCRIPTION
TP1
T1OUT
TP2
R1IN
TP3
DGND
Digital GND of J3 connection
TP4
+3_3V
3.3-V LDO output on board from 12 V
TP5
RC-PWM-0A
TP6
CT_2
Second phase current sensing signal
TP7
AC_N
Input voltage sensing signal of Neutral wire
TP8
DGND
Digital GND and same as TP3
TP9
VAUX_S
Secondary side 12 V on board. Not used, but can be used for external circuit.
TP10
VAUX_P
12-V output on board from DB-1, UCC28600EVM400V-12V
TP11
+12V_EXT
TP12
K1
TP14
AC_L
TP15
VBUS_SENSE
UART0 (J9-2) T1OUT
UART0 (J9-3) R1IN
DPWM0A RC filter
12 V on board from VAUX_P
Relay K1 coil
Input sensing signal of Line wire
PFC output voltage sensing signal
TP16
GND
Analog GND
TP17
BUS-
PFC output return
TP18
REC-1
Rectifier positive output
TP19
CT-1
TP20
ISENSE
Current sensing signal from current transformer T1
TP21
REC-2
Rectifier return
TP22
BUS+
PFC output positive, nominal 390VDC
TP23
SW2
Q2 Drain pin
TP24
SW1
Q3 Drain pin
TP25
Q2-Gate
Gate pin of Q2 MOSFET
TP26
Q3-Gate
Gate pin of Q3 MOSFET
Current sensing signal after conditioning
List of Terminals
Table 3. List of Terminals
10
TERMINAL
NAME
J1
Line
J2
Neutral
J3
DJ
Digital signal connection, 40 pins
J4
AJ
Analog signal connection, 40 pins
J5
BUS+
PFC output positive connection, single-pin connection – screw type, BUS+ and BUS- are DC
output terminals, rated maximum 400 VDC, and maximum current 1 A.
J6
BUS-
PFC output return, single-pin connection – screw type
J7
12V_Sec
J8
UART1
Isolated and communication to DC converter, not production tested, 6 pins
Non-isolated connection, standard RS232, 9 pins,
J9
UART0
J10
Sync
J11
Chassis
DESCRIPTION
Board AC input line, single-pin connection – screw type, J1 and J2 are AC input terminals,
rated up to 264 VAC and maximum 7.5 A, 47 Hz to 63 Hz.
Board AC input neutral, single-pin connection – screw type
12-V auxiliary to supply to external circuit on the secondary side, 2 pins
External 12-V bias and sync signal, 3 pins
Chassis ground, or earth connection, single-pin connection – screw type
Digitally Controlled Single-Phase PFC Pre-Regulator
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Test Procedure
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8
Test Procedure
8.1
Efficiency Measurement Procedure
1. Refer to Figure 3 for basic setup to measure power conversion efficiency. The required equipment to
do this measurement is listed in Section 5.1.
2. Before making electrical connections, visually check the boards to make sure there are no suspected
spots of damages.
3. In this EVM package, three EVMs are included, UCD3138PFCEVM-026, UCD3138CC64EVM-030,
and USB-TO-GPIO. In this measurement, the board of UCD3138PFCEVM-026 and
UCD3138CC64EVM-030 is needed.
4. First install the board of UCD3138CC64EVM-030 onto the board of UCD3138PFCEVM-026. Care must
be given to the alignment and the orientation of two boards, or damage may occur. Refer to Figure 4
for UCD3138CC64EVM-030 board orientation.
5. Connect the AC voltage source to J1 (Line) and J2 (Neutral). The AC voltage source should be an
isolated one and meet IEC60950 requirement. Set up the AC output voltage in the range specified in
Table 1, between 90 VAC and 264 VAC, between 47 Hz and 63 Hz; set up the AC source current limit to
7.5-A peak and RMS, respectively.
6. Connect an electronic load with either constant current mode or constant resistance mode. The load
range is from 0 A to 0.92 A. Initial power on is recommended with 0-A load current. The load is
required to receive 0 VDC to 500 VDC.
7. If the load does not have a current or a power display, a current meter is needed to insert into between
the load and the board.
8. Connect a volt-meter across the load and set up the volt-meter scale 0 V to 500 V on its voltage, DC.
9. Turn on the AC voltage output and varying the load. Then the measurement can be made.
WARNING
Danger of Electrical Shock! High voltage present during the
measurement!
Danger of Heat Burn from High Temperature!
Do not leave EVM powered when unattended!
8.2
Equipment Shutdown
1. Shut down AC voltage source.
2. Shut down electronic load.
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Performance Data and Typical Characteristic Curves
9
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Performance Data and Typical Characteristic Curves
Figure 5 through Figure 18 present typical performance curves for UCD3138PFCEVM-026.
9.1
Efficiency
95.0%
90.0%
85.0%
115VAC 60Hz
230VAC 50Hz
80.0%
0.1
0.3
0.5
Load Current (A)
0.7
0.9
Figure 5. UCD3138PFCEVM-026 Efficiency
9.2
Power Factor
1.050
1.000
0.950
115VAC 60Hz
230VAC 50Hz
0.900
0.1
0.3
0.5
Load Current (A)
0.7
0.9
Figure 6. UCD3138PFCEVM-026 Power Factor
12
Digitally Controlled Single-Phase PFC Pre-Regulator
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9.3
Input Current at 115 VAC and 60 Hz
11.000%
115VAC 60Hz
230VAC 50Hz
6.000%
1.000%
0.1
0.3
0.5
Load Current (A)
0.7
0.9
Figure 7. Input Current and Voltage 115 VAC and Half Load
Figure 8. Input Current and Voltage 115 VAC and Full Load
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Performance Data and Typical Characteristic Curves
9.4
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Input Current at 230 VAC and 50 Hz
Figure 9. Input Current and Voltage 230 VAC and Half Load
Figure 10. Input Current and Voltage 230 VAC and Full Load
14
Digitally Controlled Single-Phase PFC Pre-Regulator
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9.5
Output Voltage Ripple
Figure 11. Output Voltage Ripple 115 VAC and Full Load
Figure 12. Output Voltage Ripple 230 VAC and Full Load
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Performance Data and Typical Characteristic Curves
9.6
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Output Turn On
Figure 13. Output Turn On 115 VAC and No Load
Figure 14. Output Turn On 115 VAC and Full Load
16
Digitally Controlled Single-Phase PFC Pre-Regulator
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9.7
Total Harmonic Distortion (THD)
Figure 15. UCD3138PFCEVM-026 Input Current THD
9.8
Other Waveforms
Figure 16. UCD3138PFCEVM-026 Sensing Signal AC_L (TP14) or AC_N (TP7)
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Figure 17. UCD3138PFCEVM-026 Sensing Signal ISENSE (TP20)
Figure 18. UCD3138PFCEVM-026 MOSFET VGS (top) and VDS
18
Digitally Controlled Single-Phase PFC Pre-Regulator
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EVM Assembly Drawing and PCB Layout
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10
EVM Assembly Drawing and PCB Layout
The following figures (Figure 19 through Figure 24) show the design of the UCD3138PFCEVM-026 printed
circuit board. PCB dimensions: L x W = 9.0 inch x 6.0 inch, PCB material: FR4 or compatible, four layers
and 2-oz copper on each layer.
Figure 19. UCD3138PFCEVM-026 Top Layer Assembly Drawing (top view)
Figure 20. UCD3138PFCEVM-026 Bottom Assembly Drawing (bottom view)
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EVM Assembly Drawing and PCB Layout
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Figure 21. UCD3138PFCEVM-026 Top Copper (top view)
Figure 22. UCD3138PFCEVM-026 Internal Layer 1 (top view)
20
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Figure 23. UCD3138PFCEVM-026 Internal Layer 2 (top view)
Figure 24. UCD3138PFCEVM-026 Bottom Copper (top view)
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List of Materials
11
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List of Materials
The List of Materials is Based on Figure 1 and Figure 2.
Table 4. UCD3138PFCEVM-026 List of Materials
QTY
22
REF DES
DESCRIPTION
PART NUMBER
MFR
1
C1
Capacitor, tantalum, 25 V, 20%, 10 µF, 3528
TPSB106M025R180 AVX
0
0
C10, C11
Capacitor, ceramic, 50 V, X7R, 10%, open, 1206
Std
Std
2
C12, C20
Capacitor, ceramic, 50 V, X7R, 10%, 1 nF, 0805
Std
Std
1
C16
Capacitor, ceramic, 50 V, X7R, 10%, 0.01 µF, 0805
Std
Std
0
C17, C25, C29
Capacitor, ceramic, 50 V, X7R, 10%, open, 0805
Std
Std
2
C2, C3
Capacitor, metalized polyester, 250 VAC, ±20%, 47 nF, 0.472
inch x 0.925 inch
ECQ-U2A473MV
Panasonic
1
C21
Capacitor, tantalum, 10 V, 20%, 10 µF, 3216
TAJA106M010RNJ
AVX
1
C22
Capacitor, film, 300 VAC, ±20%, 47 nF, 0.236 inch x 0.591 inch
ECQ-U3A473MG
Panasonic
1
C26
Capacitor, ceramic, 50 V, X7R, 10%, 1 µF, 0805
Std
Std
1
C30
Capacitor, ceramic, 50 V, X7R, 10%, 330 pF, 0805
Std
Std
1
C31
Capacitor, tantalum chip, 16 V, 47 µF, 0.281 inch x 0.126 inch
595D476X9016C2T
Vishay
1
C32
Capacitor, ceramic, 50 V, NP0, 5%, 150 pF, 0805
Std
Std
4
C33, C39, C40, Capacitor, polyester, 630 V, 10%, 47 nF, 0.256 inch x 0.650 inch
C41
ECQ-E6473KF
Panasonic
1
C34
Capacitor, aluminum electrolytic, 450 VDC, -40°C to 85°C, ±20%,
220 µF, 0.984 inch diameter
ECOS2WP221CX
Panasonic
2
C35, C36
Capacitor, ceramic, 50 V, X7R, 10%, 100 pF, 0603
Std
Std
2
C37, C38
Capacitor, film, 275 VAC, ±20%, 0.47 µF, 0.236 inch x 0.591 inch
ECQU2A474ML
Panasonic
7
C4, C18, C19, Capacitor, ceramic, 50 V, X7R, 10%, 0.1 µF, 0805
C23, C24, C27,
C28
Std
Std
3
C5, C6, C7
Capacitor, metalized polyester, 250 VAC, ±20%, 4.7 nF, 0.295
inch x 0.730 inch
BFC233820472
Vishay
5
C8, C9, C13,
C14, C15
Capacitor, ceramic, 50 V, X7R, 10%, 0.1 µF, 0603
Std
TDK
9
D1, D2, D3,
D4, D6, D15,
D22, D23, D25
Diode, dual Schottky, 200 mA, 30 V, SOT23
BAT54S
Zetex
2
D11, D12, D24
Diode, Schottky, 500 mA, 30 V, SOD123
MBR0530T1G
On Semi
2
D13, D14
Diode, Schottky rectifier, 10 A, 600 V, TO-263-2
C3D10060G
CREE
1
D16
Diode, 600 V, 6 A, 400 A peak surge, P600
6A6-T
Diodes
1
D17
Diode, bridge rectifier, 8 A, 600 V, 0.880 inch x 0.140 inch
GBU8J
Fairchild
1
D18
Diode, LED, green, 2.1 V, 20 mA, 6 mcd, 0603
LTST-C190GKT
Lite On
1
D19
Diode, LED, green, 2.1 V, 20 mA, 0.9 mcd, 0.068 inch x 0.049
inch
LN1371GTR
Panasonic
1
D20
Diode, LED, red, 2.1 V, 20 mA, 6 mcd, 0603
LTST-C190CKT
Lite On
1
D21
Diode, LED, yellow, 2.1 V, 20 mA, 6 mcd, 0603
LTST-C190YKT
Lite On
1
D5
Diode, signal, 300 mA, 75 V, 350 mW, SOD-123
1N4148W-TP
MICROSEMI
1
D7
Diode, ultrafast rectifier, 1 A, 200 V, SMB
MURS160T3G
On Semi
1
D8
Diode, dual Schottky, 200 mA, 30 V, SOT-23
BAT54C
Fairchild
2
D9, D10
Diode, Schottky, 500 mA, 60 V, SOT-23
ZHCS506
Zetex
1
DB-1
Module, 5 W, auxiliary bias PS, PCB assembly, 1.200 inch x
2.200 inch
PWR050
TI
1
DB-2
Control card, UCD3138 control card, PCB assembly, 3.400 inch x
1.800 inch
UCD3138CCEVM030
TI
Digitally Controlled Single-Phase PFC Pre-Regulator
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Table 4. UCD3138PFCEVM-026 List of Materials (continued)
QTY
REF DES
DESCRIPTION
PART NUMBER
MFR
1
F1
Fuse, 250 VAC, SLO-BLO, 3 AG, 7-A cart, 0.250 inch x 1.250
inch
0313007.HXP
Littlefuse
1
F2
Ffuse holder, 1/4 inch, board mount, 1.54 inch x 0.30 inch
BK/1A3398-07
Bussmann
1
HS1
Heatsink, TO-220, vertical mount, 15 x C/W, 0.5 inch x 0.95 inch
593002B00000G
Aavid
2
HS2, HS3
Heatsink, TO-220, vertical mount, 5 x C/W, 0.5 inch x 1.38 inch
513201
Aavid
5
J1, J2, J5, J6,
J11
Terminal block, 2 pin, 15 A, 5.1 mm, 0.40 inch x 0.35 inch
ED120/2DS
OST
1
J10
Header, male 3 pin, 100-mil spacing, 0.100 inch x 3 inch
PEC03SAAN
Sullins
2
J3, J4
Header, 40 pin, 2 mm pitch, 4.00 mm x 40.00 mm
87758-4016
Molex
1
J7
Terminal block, 2 pin, 6 A, 3.5 mm, 0.27 inch x 0.25 inch
ED555/2DS
OST
1
J8
Header, male 2 x 3 pin, 100-mil spacing, 0.20 inch x 0.30 inch
PEC03DAAN
Sullins
1
J9
Connector, 9-pin D, right angle, female, 1.213 inch x 0.510 inch
182-009-213R171
Norcomp
1
JMP1
Jumper, 0.400 inch length, bare, solid, bus-bar wire, AWG 16,
0.051 inch
295 SV005
ALPHA WIRE
1
K1
Relay, SPDT, 10-A miniature, 12-V coil, 0.630 inch x 0.870 inch
T7NS5D1-12
Tyco
2
L1, L2
Inductor, toroid, 327 µH, vertical THT, 327 µH, 0.866 inch x 1.380
inch
7804-09-0014
Nova
Magnetics
2
L3, L4
Inductor, toroid, 7.8 µH at 0 A and 3.22 µH at 20.5 A, 7.80 µH,
0.874 inch x 0.374 inch
PA0431L
Pulse
1
L5
IND, common mode emi suppression, 7.5 A, 2 mH at 1 kHz, 2
mH, 0.800 inch x 1.440 inch
PE-62917
Pulse
3
Q1, Q4, Q5
MOSFET, N-channel, 60 V, 115 mA, 1.2 Ω, SOT23
2N7002
Fairchild
2
Q2, Q3
MOSFET, N-channel, 650 V, 9 A, 199 mΩ, TO-220V
IPP60R199CP
Infineon
3
Q6, Q7, Q8
Bipolar, NPN, 40 V, 200 mA, 200 mW, SC-75
MMBT3904TT1G
On Semi
0
R1, R24, R40,
R43, R68
Resistor, chip, 1/10 W, 1%, open, 0805
Std
Std
6
R13, R15, R27, Resistor, chip, 1/4 W, 1%, 200 kΩ, 1210
R28, R29, R30
Std
Std
2
R14, R16
Resistor, chip, 1/4 W, 1%, 3.83 kΩ, 1210
Std
Std
4
R19, R20, R21, Resistor, chip, 1/10 W, 1%, 4.7 kΩ, 0805
R22
Std
Std
1
R2
Resistor, chip, 1/10 W, 1%, 3.3 MΩ, 0805
Std
Std
1
R23
Resistor, chip, 1/10 W, 1%, 3.3 kΩ, 0805
Std
Std
1
R3
Resistor, wire-wound, 5 W, 5%, 50 Ω, 1.000 inch x 0.276 inch
25J50RE
Ohmite
2
R31, R72
Resistor, chip, 1/4 W, 1%, 1.5 kΩ, 1210
Std
Std
9
R32, R41, R44, Resistor, chip, 1/10 W, 1%, 0 Ω, 0805
R49, R52, R54,
R75, R76, R77
Std
Std
2
R33, R35
Resistor, chip, 1/4 W, 1%, 0 Ω, 1210
Std
Std
0
R34, R36
Resistor, chip, 1/4 W, 1%, open, 1210
Std
Std
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List of Materials
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Table 4. UCD3138PFCEVM-026 List of Materials (continued)
QTY
24
REF DES
DESCRIPTION
PART NUMBER
MFR
7
R37, R38, R56, Resistor, chip, 1/10 W, 1%, 10 kΩ, 0805
R57, R70, R73,
R74
Std
Std
2
R39, R58
Resistor, chip, 1/10 W, 1%, 2 kΩ, 0805
Std
Std
1
R4
Resistor, chip, 1/10 W, 1%, 5.01 kΩ, 0805
Std
Std
2
R45, R79
Resistor, chip, 1/10 W, 1%, 100 Ω, 0805
Std
Std
3
R47, R48, R50
Resistor, chip, 1/10 W, 1%, 1.8 kΩ, 0805
Std
Std
7
R5, R8, R42,
Resistor, chip, 1/10 W, 1%, 1 kΩ, 0805
R61, R80, R81,
R82
Std
Std
2
R53, R55
Resistor, chip, 1/10 W, 1%, 5.23 Ω, 0805
Std
std
2
R59, R60
Resistor, chip, 1/10 W, 1%, 49.9 kΩ, 0805
Std
Std
2
R6, R7
Resistor, metal strip, 2 W, 1%, 0.02 Ω, 0.49 inch x 0.10 inch
WSR2R0200FEA
Vishay Dale
2
R63, R66
Resistor, chip, 1/10 W, 1%, 15 Ω, 0805
Std
Std
2
R64, R65
Resistor, chip, 1/10 W, 1%, 10 kΩ, 1206
Std
std
1
R69
Resistor, chip, 1/10 W, 1%, 1.6 kΩ, 0805
Std
Std
1
R71
Resistor, chip, 1/10 W, 1%, 910 Ω, 0805
Std
Std
1
R78
Resistor, chip, 1/10 W, 1%, 1.1 kΩ, 0805
Std
Std
12
R9, R10, R11, Resistor, metal film, 1/4 W, ±5%, 100 kΩ, 1206
R12, R17, R18,
R25, R26, R46,
R51, R62, R67
RC1206FR07100KL
Yageo
2
U1, U3
High Voltage, High Current Op-Amp, MSOP-8
OPA350EA/250
TI
1
U2
RS-232 Transceivers with Auto Shutdown, SSOP-16
SN75C3221DBR
TI
1
U4
High-Speed Low-Side Power MOSFET driver, SO8
UCC27324D
TI
0
U5, U6
4-A Single Channel High-Speed Low-Side Gate Drivers, open,
SOT23-6
UCC27517DBV
TI
1
U7
3.3-V, 800-mA LDO Voltage Regulators, SOT-223
TLV1117-33IDCY
TI
1
U8
Digital Isolators, xx Mbps, SO-8
ISO7221CD
TI
1
U9
Opto-coupler, SMD-4P
SFH6156-2
Vishay
Digitally Controlled Single-Phase PFC Pre-Regulator
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12
Digital PFC Description
12.1 1PFC Block Diagram
12.1.1
Single-Phase PFC Block Diagram
Single-phase PFC function block diagram is shown in Figure 25. The digital controlled single-phase PFC
has the same power stage as those seen in other analog controlled devices. The main difference is the
line voltage is sensed then rectified inside the UCD3138 digital controller. All signals interact with
UCD3138 and explained in section Section 12.2.
Single-phase PFC
Circuit Diagram
Iin
L1
D2
Vbus
D1
Signal
Conditioning
Q1
Vs
Vin
EMI Filter
& Inrush
Relay
RL
Gate
Driver
Cb
Iq1
Rs1
I_CT1
DPWM 1B
Signal
Conditioning
Vin_L
Vin_N
Signal
I_shunt
Conditioning
Vbus_sen
Vbus_ov
Signal
Conditioning
Figure 25. Digitally Controlled Single-Phase PFC System Block Diagram
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12.1.2
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2-Phase PFC Block Diagram
A functional block diagram of a 2-phase interleaved PFC is shown in Figure 26. The digital controlled 2phase interleaved PFC has the same power stage seen in other analog controlled devices. All signals
interact with UCD3138 and are explained in section 12.2.
Iin
L1
D3
Vbus
D1
L2
D2
Signal
Conditioning
Vs
Signal
Conditioning
Vin
EMI Filter
& Inrush
Relay
RL
Gate
Driver
Q1
Q2
Iq1
Cb
Iq2
Rs1
DPWM1 B DPWM 2B
I_CT1
Signal
I_shunt
Conditioning
Vin_l
Signal
Conditioning
Vin_n
I_CT2
Vbus_sen
Signal
Conditioning
Vbus_ov
Figure 26. Digitally Controlled 2-Phase PFC System Block Diagram
12.1.3
Bridgeless PFC Block Diagram
A function block diagram of a bridgeless PFC is shown in Figure 27. The digital controlled bridgeless PFC
has a same power stage as those seen in analog controlled. All signals interacted with UCD3138 are
explained in the section Section 12.2.
Iin
L1
Vbus
D1
L2
Signal
Conditioning
Vs
D2
Signal
Conditioning
Vin
EMI Filter
& Inrush
Relay
RL
Q1
Q2
Cb
Gate
Driver
Rs1
DPWM1B
Signal
Conditioning
DPWM2B
I_CT1
I _CT2
Vin_l
Vbus_sen
Vin_n
Vbus_ov
Signal
Conditioning
Figure 27. Digitally Controlled Bridgeless PFC System Block Diagram
26
Digitally Controlled Single-Phase PFC Pre-Regulator
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12.2 UCD3138 Pin Definition
In this EVM, the PFC DC bus voltage feedback loop control is implemented using firmware execution by
the ARM7 microcontroller, while the high-speed current loop control is implemented in the digital power
peripherals in the UCD3138. The DC bus voltage, AC line and AC neutral voltages are sensed using the
general purpose ADC in the ARM block. This is executed while the current signal is sensed and
processed using the Front-End (EADC) block in the digital power peripherals. All protection functions such
as cycle-by-cycle current limiting and overvoltage protection are implemented using the high-speed analog
comparators available in the UCD3138.
12.2.1
UCD3138 Pin Definition in Single-Phase PFC
UCD3138 is a 64-pin device. When using the UCD3138 as a single-phase PFC controller, the pins used
are defined in Figure 28.
Km
Ev
Vref
+
DPWM1
Iref
PI
(Gv)
-
Fusion Power Peripheral
+
FE0
c
Vb
-
A
Iin
Calculate
1/Vrms
CLA1
(Gc) Ui
OVP
Cycle by cycle limit
B
Vrms
2
Calculate
Vrms
Conditioning
&
Rectification
UCD3138
Single-phase PFC
Configuration
PMBus
Interface
DPWM1B
COMP_F
Vbus_ov
COMP_ D
I_CT1
EAP0
I_shunt
AD_ 07
AD_08
Vin_L
AD_ 03
Vbus_sen
Vin_N
UART
Interface
Figure 28. Definition of UCD3138 in Single-Phase PFC Control
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Digital PFC Description
12.2.2
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UCD3138 Pin Definition in 2-Phase PFC
UCD3138 pin definition in 2-phase interleaved PFC control, shown in Figure 29.
Fusion Power Peripheral
Km
Vref Ev
+
DPWM1
Iref
PI
(Gv)
FE0
+
-
c
Vb
CLA 1
(Gc) Ui
Iin
Vrms
Calculate
2
1/Vrms
COMP _F
Vbus_ov
Cycle by cycle limit
COMP _E
I_CT2
Cycle by cycle limit
COMP_ D
I_CT1
EAP0
I_shunt
AD_ 07
Vin_l
AD_08
Vin_n
AD_03
Vbus_sen
OVP
B
Conditioning
&
Rectification
Calculate
Vrms
UCD 3138
2-phase interleaved
PFC
Configuration
DPWM2B
DPWM2
-
A
PMBus
Interface
DPWM1B
UART
Interface
Figure 29. Definition of UCD3138 in 2-Phase PFC Control
12.2.3
UCD3138 Pin Definition in Bridgeless PFC
UCD3138 pin definition shown in bridgeless PFC control, see Figure 30.
Fusion Power Peripheral
Km
DPWM1
Vref Ev
+
Vb
PI
(Gv)
Iref
+
FE1
FE2
CLA 1
(Gc) Ui
DPWM2B
DPWM2
c
-
A
Iin
-
OVP
Iin
Cycle by cycle limit
Cycle by cycle limit
B
Calculate Vrms
2
1/Vrms
UCD 3138
Bridgeless PFC
Configuration
Calculate
Vrms
PMBus
Interface
Conditioning
&
Rectification
UART
Interface
DPWM1B
COMP_F
Vbus_ov
COMP_E
COMP_D
I_CT2
EAP2
EAP1
I_CT2
I_CT1
AD_07
Vin_l
AD_ 08
AD_03
Vin_n
Vbus_sen
I_CT1
Figure 30. Definition of the UCD3138 in Bridgeless PFC Control
28
Digitally Controlled Single-Phase PFC Pre-Regulator
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12.3 EVM Hardware – Introduction
12.3.1
PFC Pre-Regulator Input
The power entry section, PFC pre-regulator input, as shown in Figure 31, consists of EMI input filter, AC
voltage sense circuit and inrush relay control circuit. The series resistor R3 limits the inrush current. The
inrush control relay K1, controlled by the UCD3138 controller, is used to bypass this resistor. The
controller measures input and output voltages and decides the appropriate time for closure of this relay.
Input AC voltage is scaled and conditioned, and the sensed signal is applied to the UCD3138 ADC input
AD_07 and AD_08. Figure 31 also shows a DC voltage regulator D3, which converts the 12 V into 3.3 V
to provide the bias for on-board 3.3 V.
Figure 31. AC Power Filtering, Inrush Current Limit and AC Voltage Sense
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29
Digital PFC Description
12.3.2
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PFC Power Stage
The PFC power stage shown in Figure 32 employs a 2-phase boost PFC topology, even though the
default configuration of the EVM is single phase PFC. The power MOSFETs, Q3 and Q4, are driven by
the controller’s DPWM signals, DPWM1B and DPWM2B, through UCC27324 MOSFET gate drive device.
The schematic also shows that four additional signals are sensed and eventually connected to UCD3138
controller’s 12-bit ADC input pins. These four signals are the rectified AC line and neutral voltage, the DC
bus voltage for voltage loop control, redundant OVP protection and input current. The sensed signals are
scaled and conditioned to a range of 0 V to 2.5 V which corresponds to the full scale range of the ADC.
For single-phase PFC and 2-phase interleaved PFC, the PFC stage total input current is differentially
sensed across the sense resistors, R6 and R7, and then conditioned by the current sense amplifier U1.
This is shown in Figure 32. This sensed input current signal is scaled and conditioned to a range of 0 V to
1.6 V corresponding to the range of the on-chip DAC associated with the error ADC0 (EADC0).
In DCM mode, the inductor current oscillates between the inductor and switch node equivalent capacitor.
As a result, the inductor current goes to negative, but the negative current will not show up at the output of
the current amplifier. Therefore, the amplifier output does not represent the total inductor current. In order
to sense this negative current, an offset is added to the amplifier’s positive input terminal, this is shown as
R113 in Figure 32.
For bridgeless PFC, the PFC stage input current is sensed by current transformer T2 and T3. The output
signal of T2 and T3 is rectified, scaled and conditioned to a range of 0 V to 1.6 V corresponding to the
range of the on-chip DAC associated with the error ADC1 (EADC1) and error ADC2 (EADC2).
30
Digitally Controlled Single-Phase PFC Pre-Regulator
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C4
2
R5
1k
R69
1.6k
BAT54S
D4
+3_3V
C18
0.1uF
(J3-7)
DPWM-3A
SYNC_IN
(J3-15)
6
49.9k
R59
4
R60
49.9k
3
2
100pF
C36
R2
3.3M
2
R58
R39
+3_3V
R61
1k
HS1
TP21
TP18
BAT54S
D2
1
47nF
C22
1
C32
150pF
R45
Interleaved PFC: Jump across E6 and E4, and E1 and E5.
D17
GBU8J
C23
1
SH1
D7
MURS160T3
0.02
0.02
1
1
1
1
4.7nF
E5
E4
2
JMP1
R17
100k
GND_EARTH
R18
100k
1
DGND
1
SWITCH_NODE
C7
1
E1
E3
E6
1
2
0.1uF
1
E2
R11
100k
R12
100k
1.8k
R48
PGND
100
R6
R7
BAT54S
BAT54C
D8
2k
2k
+3_3V
D23
IPM
(J4-6)
Single-phase PFC: default connection E6 to E4.
Bridgeless PFC: Jump across E2 and E6, and E3 and E1.
TP16
U1
OPA350EA
7
100pF
C35
+3_3V
2
0.01uF
C16
(J4-8)
IIN_SENSE
U3
R4
OPA350EA 5.01k
910
Q5
2N7002
AC_NEU_PFC
AC_L_PFC
TP20
(J4-40)
ISENSE_SHUNT
0.1uF
R71
R43
R41
1
+3_3V
(J4-30)
CT_2
6A6-T
R44
D15
BAT54S
D16
+12V_EXT
(J3-5)
DPWM-2A
(J3-6)
DPWM-2B
(J3-4)
DPWM-1B
(J3-3)
R40
DPWM-1A
+12V_EXT
(J4-12)
CT_1
0
1
1
0
2
1
+3_3V
D22
TP6
C11
C10
2
1 N/C
IN-
VDD 6
10k
IN-
OUT
1
OUTB 5
Parts not used
R64
U6
N/C 8
OUTA 7
ZHCS506
IN+
GND
VDD
4 INB
3 GND
2 INA
R63
15
U4
1
UCC27324D
IN+
GND
VDD
U5
OUT
ZHCS506
R65 10k
D9
D10
1
15
R66
BAT54S
TP19
TP25
R54
0
3
5.23
3
R57
10k
1
MBR0530
D12
R52
0
2
R56
10k
2
3
T2
Q2
7
8
TP23
C24
TP17
47nF
C40
TP22
R47
1.8k
R46
100k
R51
100k
R67
100k
R62
100k
47nF
D1
+
-
J6
Vbus
+
220uF
C34
J5
BAT54S +3_3V
BUS+
C19
0.1uF
C41
2
(J4-10)
VBUS_SENSE
TP15
100k
R9
R10
100k
R25
100k
R26
100k
Vbus = 390VDC, Iout = 0.92A
47nF
47nF
0.1uF
C39
2
1.8k
R50
C33
HS2
+3_3V
(J4-16)
VBUS_OV
HS3
SWITCH_NODE
BAT54S
D3
TP24
C3D10060G
D14
D13
C3D10060G
8
7
PA1005.050
1
Q3
IPP60R199CP
D11
MBR0530
327uH
L1
1uF
C26
T1
PA1005.050 1
+12V_EXT
R55
47uF
C31 +
R53
5.23
1
TP26
L2
327uH
IPP60R199CP
3
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Digital PFC Description
Figure 32. PFC Power Stage
Digitally Controlled Single-Phase PFC Pre-Regulator
31
Digital PFC Description
12.3.3
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Non-Isolated UART Interface
The non-isolated UART interface shown in Figure 33 is used to control the PFC module from the host PC
over the serial port. It is also used to monitor some of the parameters, debug and test firmware functions.
Figure 33. Non-Isolated PFC Module to Host PC Interface
32
Digitally Controlled Single-Phase PFC Pre-Regulator
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12.3.4
Isolated UART Interface
The isolated UART interface shown in Figure 34 is used to communicate with another digital controller, for
example one used in a secondary referenced isolated DC-to-DC converter application.
Figure 34. Isolated UART and AC_DROP Signal Interface
SLUU885B – March 2012 – Revised July 2012
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Digital PFC Description
12.3.5
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Interface Connector of Control Card
The interface connector between the PFC board and the UCD3138 controller board is shown in Figure 35.
Figure 35. UCD3138 Controller Board and PFC Board Signal Interface Connector Diagram
34
Digitally Controlled Single-Phase PFC Pre-Regulator
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12.3.6
UCD3138 Resource Allocation for PFC Control
Table 5. J3 and J4 Pin Assignment
HEADER PIN NUMBER
UCD3138 CONTROL
CARD PIN NAME
J3-1
DPWM_0A
RC filter for debug monitoring
J3-2
DPWM_0B
Not used
J3-3
DPWM_1A
Not used(available as an option for PFC PWM1)
J3-4
DPWM_1B
PFC PWM1
J3-5
DPWM_2A
Not used(available as an option for PFC PWM2)
J3-6
DPWM_2B
PFC PWM2
J3-7
DPWM_3A
PFC ZVS control
J3-8
DPWM_3B
AC drop indicator signal
J3-9
DGND
Digital ground GND1
J3-10
DGND
Digital ground GND1
J3-11
FAULT-0
Inrush relay control
J3-12
Not used
Not used
J3-13
FAULT-1
LED 1
J3-14
Not used
Not used
DESCRIPTION
J3-15
SYNC
J3-16
Not used
Not used
J3-17
FAULT-2
Not used
J3-18
Not used
Not used
J3-19
Not used
Not used
J3-20
Not used
Not used
J3-21
Not used
Not used
J3-22
FAULT-3
Not used
J3-23
SCI_TX1
SCI_TX1
J3-24
SCI_RX1
SCI_RX1
J3-25
PWM0
LED 2
J3-26
PWM1
LED 3
J3-27
Not used
Not used
J3-28
Not used
Not used
J3-29
TCAP
Not used
J3-30
Not used
Not used
J3-31
SCI TX0
SCI TX0
J3-32
SCI TX0
SCI RX0
J3-33
INT-EXT
Not used
J3-34
EXT-TRIG
Not used
J3-35
DGND
Not used
J3-36
RESET*
Not used
J3-37
DGND
Digital ground GND1
J3-38
DGND
Digital ground GND1
J3-39
+12V_EXT
J3-40
3.3VD
Not used
J4-01
AGND
Analog ground GND2
J4-02
Not used
J4-03
AGND
Analog ground GND2
J4-04
AD_00
PMBus address
J4-05
AGND
Analog ground GND2
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Sync input signal for PFC stage
External +12V DC supply
Not used
Digitally Controlled Single-Phase PFC Pre-Regulator
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35
Digital PFC Description
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Table 5. J3 and J4 Pin Assignment (continued)
36
HEADER PIN NUMBER
UCD3138 CONTROL
CARD PIN NAME
J4-06
AD_01
IPM
J4-07
AGND
Analog ground GND2
J4-08
AD_02
PFC input current sense
J4-09
AGND
Analog ground GND2
J4-10
AD_03
PFC BUS voltage sense
J4-11
AGND
Analog ground GND2
J4-12
AD_04
PFC MOSFET Q3 current sense
J4-13
AGND
Analog ground GND2
J4-14
AD_05
Not used
J4-15
AGND
Analog ground GND2
J4-16
AD_06
PFC BUS voltage sense(for OVP)
J4-17
AGND
Analog ground GND2
J4-18
AD_07
PFC Vin line voltage sense
J4-19
AGND
Analog ground GND2
J4-20
AD_08
PFC Vin neutral voltage sense
J4-21
AGND
Analog ground GND2
J4-22
AD_09
Not used
J4-23
AGND
Analog ground GND2
J4-24
AD_10
Not used
J4-25
AGND
Analog ground GND2
J4-26
AD_11
Not used
J4-27
AGND
Analog ground GND2
J4-28
AD_12
Not used
J4-29
AGND
Analog ground GND2
J4-30
AD_13
PFC MOSFET Q4 current sense
J4-31
AGND
Analog ground GND2
J4-32
Not used
Not used
J4-33
Not used
Not used
J4-34
Not used
Not used
J4-35
EAN2
Analog ground GND2
J4-36
EAP2
PFC MOSFET Q4 current sense
J4-37
EAN1
Analog ground GND2
J4-38
EAP1
PFC MOSFET Q3 current sense
J4-39
EAN0
Analog ground GND2
J4-40
EAP0
PFC Input current sense
DESCRIPTION
Digitally Controlled Single-Phase PFC Pre-Regulator
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Digital PFC Description
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12.4 EVM Firmware – Introduction
The referenced firmware provided with the EVM is intended to demonstrate basic PFC functionality, as
well as some basic PMBus communication and primary and secondary communication. A brief
introduction to the firmware is provided in this section.
There are three timing levels in the current version of the firmware, as shown in Figure 36:
1. Fast Interrupt (FIQ)
2. Standard Interrupt (IRQ)
3. Background
Standard interrupt
Background Loop
·
·
·
·
·
·
System initialization
Voltage feed forward
System monitoring
Dynamic coefficient adjustment
PMBus communication
UART transmit data
·
·
·
·
·
·
·
·
·
ADC measurement
State machine
Vrms calculation
Voltage loop calculation
Current reference calculation
AC drop detection
UART receive data
Frequency dithering
ZVS control
·
OVP
Fast interrupt
Figure 36. Firmware Structure Overview
Almost all firmware tasks occur during the standard interrupt. The only exceptions are the serial interface
and PMBus tasks, which occur in the background, and the Over Voltage Protection (OVP), which is
handled by the FIQ.
For more details, please refer to the source code and training material.
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Digital PFC Description
12.4.1
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Background Loop
The firmware starts from function main(). In this function, after the system initialization, it goes to an infinite
loop. All the non-time critical tasks are put in this loop, it includes:
• Calculate voltage feed forward.
• Clear current offset at zero load.
• System monitoring.
• PMBus communication.
• Primary and secondary UART communication.
NOTE: User can always add any non-time critical functions in this loop.
12.4.2
Voltage Loop Configuration
The voltage control loop is a pure firmware loop. VOUT is sensed by a 12-bit ADC, and compared with
voltage reference. The error goes into a firmware Proportional-Integral (PI) controller, and its output is
used to do current loop reference calculations.
12.4.3
Current Loop Configuration
Current loop consists of several modules:
• Front End (FE) Module, to configure the AFE block gain.
– For single phase PFC, AFE0 is used.
• Filter Module, to configure the current loop compensation.
– FILTER1 is used.
• DPWM Module, to generate the PWM signal driving PFC.
– For single phase PFC, DPWM1B is used.
NOTE: Loop Mux Module, to configure interconnection among front end, filter and DPWM modules.
12.4.4
Interrupts
There are two interrupts, the Standard Interrupt (IRQ), and the Fast Interrupt (FIQ).
• IRQ contains the state machine and most of the PFC control firmware.
• FIQ is used in relation to implementing OVP protections.
38
Digitally Controlled Single-Phase PFC Pre-Regulator
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12.5 State Machine
The PFC hiccups once an over-voltage condition is detected. Only very serious over voltage causes PFC
shut down and latch.
Figure 37 is the PFC state machine diagram shown below.
Idle
Vin > 90V
Vin
Relay
close
after
Vout >420 V
PFC shutdown
and
latch
<
85 V
100ms
Ramp up
Vout = 390V
Vout >420V
PFC
hiccup
PFC
on
Vout >435V
Vout < 380 V
Figure 37. PFC State Machine
12.6 PFC Control Firmware
The PFC Control Firmware is almost all implemented in the IRQ function, which includes:
• ADC measurement
• State machine
• VRMS calculation
• Voltage loop calculation
• Current reference calculation
• AC drop detection
• UART receive data
• Frequency dithering
• ZVS control
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12.7 System Protection
12.7.1
Cycle-by-Cycle Current Protection (CBC)
The cycle-by-cycle current protection is achieved through AD04 (Comparator D) and AD13 (Comparator
E). Once the current signal has exceeded the threshold, the PWM is chopped to limit the current.
12.7.2
Over-Voltage Protection (OVP)
There are two levels of OVP that exist. Under fault condition if the output voltage reaches 420 V, a nonlatched OV protection is activated. Under this condition the output oscillates between 420 V and 380 V.
In the event of a more severe overvoltage condition, if the output reaches to 435 V, the latched overvoltage protection is activated and the unit is completely shut off.
The FIQ is currently used only for latched over-voltage protection. It is triggered by the comparator on
AD06 (Comparator F). Comparator F’s threshold is set above the limit for the DC bus voltage, and the
logic on DPWM1 and DPWM2 is set up to turn off DPWM1B and DPWM2B when the threshold is
exceeded. In the current configuration, the only way to restart the PFC after a latched OVP fault is to reset
the processor.
12.8 PFC System Control
The system control block diagram is shown in Figure 38. In steady state, the average current-mode
control is used with switching frequency fixed at 100 kHz. At low line below 160 VAC and light load, ZVS
and valley control is used to reduce the switching losses and reduce total harmonic distortion.
Figure 38. Single-Phase PFC System Control Diagram
40
Digitally Controlled Single-Phase PFC Pre-Regulator
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12.8.1
Average Current Mode Control
The current loop is shown in the dashed line of Figure 38. The current reference signal IREF is calculated
as:
æ 1
IREF = K m ´ A ´ C ´ B = K m ´ (Uv )´ (K f ´ VIN )´ ç
ç V2
è RMS
ö
÷
÷
ø
where
•
•
•
•
Km – multiplier gain
A – voltage loop output
B – 1/(VIN(rms))2
C – VIN
(1)
For sine wave input, the multiplier gain Km is expressed as,
K m = 0.5 ´ K f ´ VMIN(pk)
(2)
In Figure 27, Ks and Kf are scaling factors. For further detail, please refer to reference , and .
12.8.2
ZVS and Valley Control
Please refer to the reference and .
12.9 Current Feedback Control Compensation Using PID Control
A functional block diagram of single-phase PFC control loop is shown in Figure 39.
PID control is usually used in the feedback loop compensation in digitally controlled power converters.
Described below are several aspects using PID control in the single-phase PFC feedback control loop.
RL
Vout
LB
V in
R LOAD
R D S_ON
R D1
Vsense
C P1
Gate
driver
RS
RD 2
CP2
R3
R4
Iref
PID
Compensator
K P , K I, K D,
and Ts
Analog - to - PWM
Gain = 1
Figure 39. Single-phase PFC Feedback Loop Using PID Control
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Digital PFC Description
12.9.1
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Loop Compensation from Poles and Zeros in s-Domain
PID control in the UCD3138 CLA for current control loop in single-phase PFC is formed in the following
equation in z-domain:
Gc (z) = KP + KI
1 + z -1
1 - z -1
+ KD
1 - z -1
1 - a´z -1
(3)
If Equation 3 is converted to the s-domain equivalent using the bilinear transform, the result has two
forms. One is with two real zeros:
æ s
öæ s
ö
+ 1÷ ç
+ 1÷
ç
wz1
ø è wz2
ø
Gcz (s) = K 0 è
æ s
ö
sç
+ 1÷
ç wp1
÷
è
ø
(4)
The two zeros can also be presented with complex conjugates and in such case,
æ s2
ö
s
ç
+
+ 1÷
ç w2 Q ´ wr
÷
r
ø
Gcz (s) = K 0 è
æ s
ö
sç
+ 1÷
ç wp1
÷
è
ø
Two complex conjugate zeros are expressed as:
wr æ
2ö
wz1, z2 =
ç1 ± 1 - 4 ´ Q ÷
2´Q è
ø
wr = wz1 ´ wz2
Q=
(6)
(7)
wz1 ´ wz2
wz1 + wz2
(8)
The complex conjugate zeros become real zeros when:
Q £ 0.5
42
(5)
Digitally Controlled Single-Phase PFC Pre-Regulator
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The sensing circuit in the current loop forms a low-pass filter and adds a pole to the loop:
1
wpcs =
R 4 ´ Cp2
R
Hcs (s) = Rs ´ 4
R3
(10)
1
s
+1
wpcs
(11)
The current closed-loop transfer function is then shown below:
GM (s) ´ GPID (s)
Gcs (s) =
1 + GM (s) ´ GPID (s) ´ Hcs (s)
where
•
GM(s) is the transfer function of current loop before adding in PID.
(12)
The parameters can be calculated with the assumption of current sensor sampling cycle TS much smaller
than the time constant of the PFC choke LB and RB, where LB is the choke inductance and RB is the choke
DC resistance. Choose the sampling frequency to meet:
L
1
Ts =
£ 0.05 ´ B
fs
RB
(13)
When the above assumption is true, the delay effect from the sampling can be ignored and the
parameters can be determined after we know where the poles and zeros should be positioned.
KP =
(
K 0 ´ wp1 ´ wz1 + wp1 ´ wz2 - wz1 ´ wz2
wp1 ´ wz1 ´ wz2
)
(14)
K ´ Ts
KI = 0
2
KD =
a=
(15)
(
)(
)
wp1 ´ wz1 ´ wz2 (Ts ´ wp1 + 2 )
2 ´ K 0 ´ wp1 - wz1 ´ wp1 - wz2
(16)
2 - Ts ´ wp1
2 + Ts ´ wp1
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Digital PFC Description
12.9.2
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Feedback Loop Compenstaion Tuning with PID Coefficients
When fine tuning the feedback control loop, one would like to know each parameter in PID how to affect
the control loop characteristics without going through complicated description of the above equations.
Table 6 below helps this and is visually shown in Figure 40.
Table 6. Tuning with PID Coefficients
Control Parameters
Impact on bode plot
KP
Increasing KP
•
Pushes up the minimum gain between the two zeros.
•
Moves the two zeros apart.
KI
Increasing KI
•
Pushes up integration curve at low frequencies.
•
Gives a higher low frequency gain.
•
Moves the first zero to the right.
KD
Increasing KD
•
Shifts the second zero left.
•
Does not impact the second pole.
α
Increasing α
•
Shifts the second pole to the right.
•
Shifts the second zero to the right.
Ts = 1 / fs
Increasing the sampling frequency fs :
•
Causes the whole Bode plot to shift to right.
Increasing fs causes the whole Bode plots to shift to right
Pole 1
Gain
Pole 2
KI
KD
KP
Zero 1
Zero 2
Frequency
Figure 40. Tuning PID Parameters
12.9.3
Feedback Loop Compensation with Multiple-Set of Parameters
The digital control provides more flexibility to establish PID coefficients in multiple sets to adapt various
operation conditions. For example, the single-phase PFC EVM has two sets of PID coefficients, set A is
for low-line operation when the line voltage is between 90 VAC and 160 VAC; while set B is for high-line
operation when the line voltage is above 160 VAC until 264 VAC.
12.10 Voltage Feedback Loop
The voltage feedback loop is a slow response loop with cross-over frequency is usually designed below
20 Hz to reduce the effect from AC line frequency. PI control is usually sufficient in this feedback loop
control. During high-transient operation which causes large bulk-voltage deviation greater than certain
values, for example, over 5%, digital control can adapt this high-transient requirement to use a different
set of PI coefficients.
44
Digitally Controlled Single-Phase PFC Pre-Regulator
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Evaluating the Single-Phase PFC with GUI
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13
Evaluating the Single-Phase PFC with GUI
Further evaluation of UCD3138PFCEVM-026 can be made with the designer GUI while no need to directly
access the firmware codes. The designer GUI, called Fusion Digital Power Designer is described in
Section 13.1. The description is given on how to use the GUI to make further evaluation of
UCD3138PFCEVM-026.
13.1 Graphical User Interface (GUI)
Collectively, the GUI is called Texas Instruments Fusion Digital Power Designer. The GUI serves the
interface for several families of TI digital control devices including the family of UCD31xx, that is the
UCD3138 as its one member. The GUI can be divided into two main categories, Designer GUI and Device
GUI. In the family of UCD31xx, each EVM is related to a particular Designer GUI to allow users to retune/re-configure a particular EVM in that regarding with existing hardware and firmware. Device GUI is
related to a particular device to access its internal registers and memories.
UCD3138PFCEVM-026 is used with its control card UCD3138CC64EVM-030 where UCD3138 device is
placed. The firmware for single-phase PFC control is loaded into UCD3138CC64EVM-030 board through
device GUI. How to install the GUI is described in the user’s guide Using the UCD3138CC64EVM-030 (TI
Liturature Number, SLUU886). The designer GUI is installed at the same time when installing the device
GUI.
13.2 Open the Designer GUI
To open the Designer GUI, click the start with the path as shown in Figure 41.
Figure 41. Start the Designer GUI
SLUU885B – March 2012 – Revised July 2012
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Evaluating the Single-Phase PFC with GUI
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13.3 Overview of the Designer GUI
When the designer GUI is open, it identifies the connected board by the ID in the firmware. Figure 42
shows the opened GUI. The Designer GUI provides various assistance to access the firmware codes
indirectly. For the full set of the functions that the Designer GUI can provide, please refer to the user’s
manual. In this application note, we focus on how to make monitoring, board re-configuring and re-tuning
to show basic aspects on how to use the GUI in a typical power supply design evaluation on a bench test.
Figure 42. Designer GUI Overview
13.3.1
Monitor
On the lower left corner of that shown in Figure 42, there are four tabs, called Configure, Design, Monitor
and Status. Clicking each tab brings a unique page to the front of that page. The clicked tab is highlighted
in blue. Figure 42 shows Monitor tab was clicked. The page shows all variables in monitoring with
UCD3138 single-phase PFC. These variables are communicated through PMBus. Adding more variables
in Monitoring is possible but has to be executed through the firmware code change and re-compile
process.
46
Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
SLUU885B – March 2012 – Revised July 2012
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13.3.2
Status
When click tab Status, its corresponding page is shown in Figure 43. What can be seen is all entries are
grayed out. This means nothing was designed to show from this tab. The page of Status provides all
possible PMBus supported variables in communication. To activate these variables in communication,
corresponding firmware codes need to be in place. As what can be seen is all in gray which means none
of the variables is established in communication in this page.
Figure 43. Page of Status
13.3.3
Design and Configure
If click Design or Configure two more different pages will be brought up to the front. These pages provide
more functions and described in the following section.
SLUU885B – March 2012 – Revised July 2012
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Monitoring, Re-configuring and Re-tuning with Designer GUI
14
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Monitoring, Re-configuring and Re-tuning with Designer GUI
In this section, we describe how to use the Designer GUI to evaluate the single-phase PFC board,
UCD3138PFCEVM-026
14.1 Power On and Test Procedure
Power stage connection is the same as described earlier. Additionally to that setup, PMBus connection is
required through USB-to-GPIO as shown in Figure 44.
After all connections are made, apply an AC source voltage with a specified value to the board AC input
and refer to the other steps in the UCD3138PFCEVM-026 user’s guide. Open and start the “Fusion Digital
Power Designer” GUI following the steps described in Section 13.2 and Section 13.3. Once PFC preregulator is up and running and the GUI is opened, then it is ready to use the Designer GUI to make
evaluation.
Figure 44. Hardware Setup for Evaluation with Designer GUI
48
Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
SLUU885B – March 2012 – Revised July 2012
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Monitoring, Re-configuring and Re-tuning with Designer GUI
14.2 Monitoring with GUI
The page shows three variables in monitoring:
• VOUT – PFC output bulk voltage.
• OV Fault – PFC output bulk voltage over voltage fault threshold.
• Freq – switching frequency in normal operation.
Among three monitoring variables, we can see VOUT and OV Fault can be accessed by write to change
them to a different value into the firmware. However, when attempting to do so, make sure to understand
the design of all aspects to avoid any possible damage. As a warning to help avoid damage, if one wants
to modify “Vout” or “OV Fault” to a different value, the recommendation is 375 V to 395 V for VOUT, and not
exceeding 430 V for OV Fault. Also, logically, VOUT has to be smaller than OV Fault.
One may modify them to other values but before doing that, fully understanding the design is needed to
find out any other parameters needed to change accordingly such that not over stress the components in
use or inducing any stability concerns.
SLUU885B – March 2012 – Revised July 2012
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Monitoring, Re-configuring and Re-tuning with Designer GUI
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14.3 Configuration and Re-configuring with GUI
After click the tab of “Configure”, the corresponding page called “Configuration” is shown as in Figure 45.
The variables shown in the page are the existing configuration. Most of them are fixed and can only be
modified through firmware codes. One can designate which and how many variables can be re-configured
in this page through firmware codes change. With the single-phase PFC board, there are three variables
can be re-configured through this page without going through the firmware codes. As mentioned before,
modify these variables to a different value requires fully understanding the design to avoid possible
damage.
• VOUT – PFC output bulk voltage
• OV Fault – PFC output bulk voltage over voltage fault threshold
• Freq – switching frequency in normal operation.
As mentioned earlier, the firmware version in use is shown in the page of “Configuration”. The firmware
version is called DEVICE_ID. When place the mouse curser on, the version indication is shown,
UCD3100ISO1 | 0.0.8.0129 | 111209
The firmware version or Device_ID is divided by two vertical lines. UCD3100ISO1 is the IC device family
code. Between the two vertical lines, the show is the firmware recompilation indicator. The last six digits
are date of the last time the recompilation was made.
Figure 45. Page of Configuration
50
Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
SLUU885B – March 2012 – Revised July 2012
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Monitoring, Re-configuring and Re-tuning with Designer GUI
14.4 Feedback Control Loop Tuning and Re-Tuning with GUI
After click the tab of Designer, the page is shown as in Figure 46. In the UCD3138PFCEVM-026, this
page is dedicated to the feedback loop design. This page including two sub-pages. One is for the current
loop PID coefficients and the other is for the voltage feedback loop which uses PI control.
Figure 46. Page of Designer
SLUU885B – March 2012 – Revised July 2012
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Monitoring, Re-configuring and Re-tuning with Designer GUI
14.4.1
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Current Loop Evaluation
Figure 46shows the current control loop. To evaluate the design or to re-tune the current loop PID
coefficients, the first thing to do is to check all the parameters up to date in use. This can be done by click
Schematic View to bring out a new window with the schematics shown in Figure 47. If any values are
different from those in the physical circuitry, one needs to update them before doing any control loop retuning.
Figure 47. Schematics of Single-Phase PFC.
52
Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
SLUU885B – March 2012 – Revised July 2012
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14.4.2
Current Loop Re-Tuning
The current loop PID coefficients can be re-tuned following the approaches described in section 1.4. Scroll
down the window that is shown in Figure 46, then Figure 48 is obtained.
Figure 37 shows the current loop compensation details. There are two sets of PID coefficients used in the
current control loop, Set A and Set B. In Figure 48 Set A is shown. The corresponding bode plots are
shown on the left in Figure 48.
Coefficients of Set A are used when input line voltage is between 90 VAC and 160 VAC. Coefficients of Set
B are used when input line voltage is above 160 VAC till the maximum input of 264 VAC.
The actual PID control makes re-scale of the values shown in Figure 48 when used inside the UCD3138.
æ
ö SC
1 + z -1
1 - z -1
1000
GPID (z) = ç KP + KI
+ KD
÷ ´ 2 ´ KCOMP ´ 2-19 ´
-1
-8
-1 ÷
4
ç
1- z
1- 2 ´ a ´ z ø
2 ´ (PRD + 1)
è
(18)
PRD is a threshold value used to generate DPWM cycle ending point. The DPWM is centered on a period
counter which counts up from 0 to PRD, and then is reset and starts over again. In the single-phase PFC
design, KCOMP is set up equal to PRD.
In the current control page of the Design, PID coefficients can be re-tuned. The GUI also provides
conversion results from PID coefficients to the zeros and the pole by clicking Mode to select a
corresponding conversion. One can also change the zeros and the poles and then use the GUI to convert
to PID coefficients by clicking Mode to select back to KP, KI, and KD. Be aware that from the two zeros can
be complex conjugates. When a set of PID coefficients does make complex conjugate zeros, the GUI
pumps up a message to notify that Q and ωr have to be generated instead of real zeros. In this case, the
users may need to calculate the complex conjugate zeros based on Equation 6.
Figure 48. Current Loop Re-Tuning
SLUU885B – March 2012 – Revised July 2012
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Monitoring, Re-configuring and Re-tuning with Designer GUI
14.4.3
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Voltage Loop Evaluation and Re-tuning
Voltage loop can be evaluated and re-tuned in a similar way. Figure 49 shows voltage loop PI control
coefficients and corresponding bode plots.
The voltage loop PI control is implemented with software and has the below form,
1
GPI (z) = KP + KI
1 - z -1
(19)
There are two sets of the PI coefficients for voltage loop control. In normal operation, the control is with
Linear Coefficients. In transient when the PFC output bulk voltage exceeds the defined Error Threshold,
for example, 16.0 V, as shown, the PI control coefficients are changed to Non-Linear Coefficients to
achieve better transient response and to eliminate the output large deviation faster. The output error
threshold is usually within 5% of the output set point, or within 20 V on 390-VDC output.
Figure 49. Voltage Loop PI Control Re-Tuning
54
Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
SLUU885B – March 2012 – Revised July 2012
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Digital PFC Firmware Development
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15
Digital PFC Firmware Development
Please contact TI for additional information regarding UCD3138 digital PFC firmware development.
16
References
1.
2.
3.
4.
5.
UCD3138 Datasheet, SLUSAP2, 2012
UCD3138CC64EVM-030 Evaluation Module and User’s Guide, SLUU886, 2012
SEM600, 1988, High Power Factor Pre-regulator for Off-line Power Supplies
SEM700, 1990, Optimizing the Design of a High Power Factor Switching Pre-regulator
TI Application Note SLUA644, “PFC THD Reduction and Efficiency Improvement by ZVS or Valley
Switching”, April 2012.
6. Zhong Ye and Bosheng Sun, “PFC Efficiency Improvement and THD Reduction at Light Loads with
ZVS and Valley Switching”, APEC 2012, pp 802-806
7. UCD3138 Digital Power Peripherals Programmer’s Manual (please contact TI)
8. UCD3138 Monitoring and Communications Programmer’s Manual (please contact TI)
9. UCD3138 ARM and Digital System Programmer’s Manual (please contact TI)
10. UCD3138 Isolated Power Fusion GUI User Guide (please contact TI)
SLUU885B – March 2012 – Revised July 2012
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Digitally Controlled Single-Phase PFC Pre-Regulator
Copyright © 2012, Texas Instruments Incorporated
55
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Regulatory Notices:
3.1 United States
3.1.1
Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2
For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•
•
•
•
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1
For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1
Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2
Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1.
2.
3.
Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1.
2.
3.
電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
実験局の免許を取得後ご使用いただく。
技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3
Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4
EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1
User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2
EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5.
Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6.
Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7.
USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8.
Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9.
Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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