CLC1003ISO8X

Data Sheet A m p l i fy t h e H u m a n E x p e r i e n c e ® Comlinear CLC1003 features n 1mV max input offset voltage n 0.00005% THD at 1kHz n 5.3nV/√Hz input voltage noise >10kHz n -90dB/-85dB HD2/HD3 at 100kHz, RL=100Ω n 10kHz > 100kHz Min typ 31 50 24 3.3 150 78 0.3 11 -98 -85 -95 -81 0.0005 5.5 3.9 0.088 1.3 -0.340 0.8 0.2 Max units MHz Frequency Domain Response Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier MHz MHz MHz ns ns % V/µs dBc dBc dBc dBc % nV/√Hz nV/√Hz mV µV/°C μA nA/°C nA dB dB mA MΩ pF V dB Time Domain Response Distortion/Noise Response HD2 HD3 THD en 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Input Voltage Noise DC Performance VIO dVIO Ib dIb Ios PSRR AOL IS RIN CIN CMIR CMRR Input Offset Voltage Average Drift Input Bias Current Average Drift Input Offset Current Power Supply Rejection Ratio Open-Loop Gain Supply Current Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio DC , Vcm=0.5V to 2.5V DC VOUT = VS / 2 per channel Non-inverting, G = 1 100 104 1.85 30 1.1 -0.5 to 3.5 94 Input Characteristics Rev 1A Output Characteristics RL = 150Ω VOUT Output Voltage Swing RL = 1kΩ 0.085 to 2.80 0.04 to 2.91 +75, -40 VOUT = VS / 2 +95, -50 V V mA mA IOUT ISC notes: Output Current Short-Circuit Output Current 1. 100% tested at 25°C ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 4 Data Sheet Electrical Characteristics at ±5V TA = 25°C, Vs = ±5V, Rf = 1kΩ, RL = 1kΩ to GND, G = 2; unless otherwise noted. symbol GBWP UGBW BWSS BWLS tR, tF tS OS SR parameter -3dB Gain Bandwidth Product Unity Gain Bandwidth -3dB Bandwidth Large Signal Bandwidth Rise and Fall Time Settling Time to 0.1% Overshoot Slew Rate conditions G = 10, VOUT = 0.05Vpp VOUT = 0.05Vpp , Rf = 0 VOUT = 0.05Vpp VOUT = 2Vpp VOUT = 2V step; (10% to 90%) VOUT = 2V step VOUT = 2V step 4V step 2Vpp, 10kHz, RL = 1kΩ 2Vpp, 100kHz, RL = 100Ω 2Vpp, 10kHz, RL = 1kΩ 2Vpp, 100kHz, RL = 100Ω 1Vpp, 1kHz, G=1, RL = 2kΩ > 10kHz > 100kHz Min typ 35 55 25 3.6 125 80 0.3 12 -125 -90 -127 -85 0.00005 Max units MHz Frequency Domain Response Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier MHz MHz MHz ns ns % V/µs dBc dBc dBc dBc % nV/√Hz nV/√Hz 1 2.6 0.7 mV µV/°C μA nA/°C μA dB dB 2.75 mA MΩ pF V dB Time Domain Response Distortion/Noise Response HD2 HD3 THD en 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Input Voltage Noise 5.3 3.5 -1 -2.6 0.050 1.3 -0.30 0.85 0.2 DC Performance VIO dVIO Ib dIb Ios PSRR AOL IS RIN CIN CMIR CMRR Input Offset Voltage(1) Average Drift Input Bias Current (1) Average Drift Input Offset Current (1) Power Supply Rejection Ratio (1) Open-Loop Gain (1) Supply Current (1) DC VOUT = VS / 2 per channel Non-inverting, G = 1 82 95 100 115 2.2 30 1 ±5.5 Input Characteristics Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio (1) DC , Vcm= -3V to 3V 70 95 Output Characteristics RL = 150Ω VOUT Output Voltage Swing RL = 1kΩ (1) -4.7 -4.826 to 4.534 -4.93 to 4.85 +80, -55 VOUT = VS / 2 +115, -90 Rev 1A V 4.7 V mA mA IOUT ISC notes: Output Current Short-Circuit Output Current 1. 100% tested at 25°C ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 5 Data Sheet Typical Performance Characteristics TA = 25°C, Vs = ±5V, Rf = 1kΩ, RL = 1kΩ to GND, G = 2; unless otherwise noted. Non-Inverting Frequency Response 3 G=1 Rf = 0 Inverting Frequency Response 1 0 -1 G = -1 G = -2 G = -5 G = -10 Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier Normalized Gain (dB) 0 Normalized Gain (dB) G=2 -3 G=5 G = 10 -6 VOUT = 0.05Vpp -9 0.1 1 10 100 -2 -3 -4 -5 -6 -7 0.1 VOUT = 0.05Vpp 1 10 100 Frequency (MHz) Frequency (MHz) Frequency Response vs. CL 1 0 Frequency Response vs. CL without RS 4 2 Normalized Gain (dB) Normalized Gain (dB) -1 -2 -3 -4 -5 -6 -7 0.1 VOUT = 0.05Vpp CL = 500pF Rs = 10Ω CL = 1000pF Rs = 7.5Ω CL = 3000pF Rs = 4Ω CL = 500pF 0 -2 -4 -6 -8 CL = 300pF CL = 100pF CL = 50pF VOUT = 0.05Vpp Rs = 0Ω 0.1 1 CL = 10pF 1 10 100 10 100 Frequency (MHz) Frequency (MHz) Frequency Response vs. VOUT 3 Frequency Response vs. RL 2 1 RL = 50Ω RL = 150Ω RL = 2.5KΩ RL = 1KΩ Rev 1A Normalized Gain (dB) VOUT = 1Vpp -3 VOUT = 2Vpp VOUT = 4Vpp -6 Normalized Gain (dB) 0 0 -1 -2 -3 -4 -5 VOUT = 0.05Vpp -9 0.1 1 10 100 -6 0.1 1 10 100 Frequency (MHz) Frequency (MHz) ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 6 Data Sheet Typical Performance Characteristics TA = 25°C, Vs = ±5V, Rf = 1kΩ, RL = 1kΩ to GND, G = 2; unless otherwise noted. Non-Inverting Frequency Response at VS = 3V 3 G=1 Rf = 0 Inverting Frequency Response at VS = 3V 1 0 -1 G = -1 G = -2 G = -5 G = -10 Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier Normalized Gain (dB) 0 Normalized Gain (dB) G=2 -3 G=5 G = 10 -6 VOUT = 0.05Vpp -9 0.1 1 10 100 -2 -3 -4 -5 -6 -7 0.1 VOUT = 0.05Vpp 1 10 100 Frequency (MHz) Frequency (MHz) Frequency Response vs. VOUT at VS = 3V 3 Frequency Response vs. RL at VS = 3V 2 1 RL = 50Ω RL = 150Ω RL = 2.5KΩ RL = 1KΩ Normalized Gain (dB) VOUT = 1Vpp -3 VOUT = 2Vpp VOUT = 2.5Vpp -6 Normalized Gain (dB) 0 0 -1 -2 -3 -4 -5 VOUT = 0.05Vpp -9 0.1 1 10 100 -6 0.1 1 10 100 Frequency (MHz) Frequency (MHz) -3dB Bandwidth vs. Output Voltage at VS = 3V 24 21 -3dB Bandwidth vs. Output Voltage 24 21 Rev 1A -3dB Bandwidth (MHz) -3dB Bandwidth (MHz) 0.0 0.5 1.0 1.5 2.0 2.5 18 15 12 9 6 3 0 18 15 12 9 6 3 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VOUT (VPP) VOUT (VPP) ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 7 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = 1kΩ, RL = 1kΩ to GND, G = 2; unless otherwise noted. Open Loop Gain and Phase vs. Frequency 80 60 40 0 -75 -150 CMIR 0.5 0.4 0.3 Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier PHASE GAIN (dB) PHASE (°) GAIN Vout (V) 20 0 -20 -40 -60 10 100 -225 -300 -375 -450 -525 0.2 0.1 0 -0.1 -6 -4 -2 0 2 4 6 1,000 10,000 100,000 1,000,000 FREQ (KHz) Vni(V) Input Voltage Noise 14 13 12 11 10 8 7 6 5 4 3 2 0.0001 0.001 0.01 0.1 1 CMIR at VS = 3V 0.5 0.4 0.3 Input Voltage Noise (nV/√Hz) Vout (V) 9 0.2 0.1 0 -0.1 -1 -0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 Frequency (MHz) Vni(V) CMRR vs. Frequency 110 100 90 PSRR vs. Frequency 110 100 90 Rev 1A CMRR (dB) 80 70 60 50 40 0.001 0.01 0.1 1 10 100 1000 CMRR (dB) 80 70 60 50 40 0.001 0.01 0.1 1 10 100 1000 Frequency (MHz) Frequency (MHz) ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 8 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = 1kΩ, RL = 1kΩ to GND, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL -50 -60 -70 -80 -90 RL = 500Ω -100 VOUT = 2Vpp -110 100 200 300 400 500 600 700 800 900 1000 -110 100 200 300 400 500 600 700 800 900 1000 -100 VOUT = 2Vpp RL = 10KΩ 3rd Harmonic Distortion vs. RL -50 -60 RL = 10KΩ -70 -80 -90 RL = 500Ω RL = 1KΩ Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier RL = 100Ω Distortion (dBc) Distortion (dBc) RL = 100Ω RL = 1KΩ Frequency (KHz) Frequency (KHz) 2nd Harmonic Distortion vs. VOUT -40 -50 -60 -70 -80 RF=RL=10K -90 FREQ = 500KHz -100 0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 3rd Harmonic Distortion vs. VOUT -30 -40 -50 Distortion (dBc) RF=RL=1K Distortion (dBc) -60 -70 -80 RF=RL=1K RF=RL=10K -90 -100 0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 FREQ = 500KHz Output Amplitude (Vpp) Output Amplitude (Vpp) THD vs. Frequency -65 -70 -75 Rev 1A THD (dB) -80 -85 -90 -95 -100 100 200 300 400 500 600 700 800 900 1000 VOUT = 1Vpp RL = 1K AV+1 Frequency (kHz) ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 9 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = 1kΩ, RL = 1kΩ to GND, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL at VS = 3V -40 -50 -60 -70 -80 -90 VOUT = 2Vpp -100 100 200 300 400 500 600 700 800 900 1000 -100 100 200 300 400 500 600 700 800 900 1000 RL = 500Ω RL = 1KΩ RL = 100Ω 3rd Harmonic Distortion vs. RL at VS = 3V -40 -50 -60 RL = 100Ω -70 -80 RL = 500Ω -90 VOUT = 2Vpp Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier Distortion (dBc) RL = 10KΩ Distortion (dBc) RL = 1KΩ RL = 10KΩ Frequency (KHz) Frequency (KHz) 2nd Harmonic Distortion vs. VOUT at VS = 3V -40 -50 -60 RF=RL=10K -70 -80 -90 FREQ = 500KHz -100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 3rd Harmonic Distortion vs. VOUT at VS = 3V -40 -50 -60 RF=RL=10K -70 -80 -90 FREQ = 500KHz -100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 Distortion (dBc) RF=RL=1K Distortion (dBc) RF=RL=1K Output Amplitude (Vpp) Output Amplitude (Vpp) THD vs. Frequency at VS = 3V -65 -70 -75 Rev 1A THD (dB) -80 -85 -90 -95 -100 100 200 300 400 500 600 700 800 900 1000 VOUT = 1Vpp RL = 1K AV+1 Frequency (kHz) ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 10 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, Vs = ±5V, Rf = 1kΩ, RL = 1kΩ to GND, G = 2; unless otherwise noted. Small Signal Pulse Response 0.75 0.5 0.25 Small Signal Pulse Response at VS = 3V 1.65 1.6 1.55 Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier Voltage (V) 0 -0.25 -0.5 -0.75 0 0.5 1 1.5 2 Voltage (V) 1.5 1.45 1.4 1.35 0 0.5 1 1.5 2 Time (ns) Time (ns) Large Signal Pulse Response 6 4 2 Large Signal Pulse Response at VS = 3V 3 2.5 2 Voltage (V) 0 -2 -4 -6 0 1 2 3 4 5 6 7 8 9 10 Voltage (V) 1.5 1 0.5 0 0 0.5 1 1.5 2 Time (ns) Time (ns) Input Offset Voltage vs. Temperature 0.1 0.05 0 Input Offset Voltage Distribution 5000 Rev 1A 4000 3000 Vio (V) -0.05 -0.1 Units 2000 1000 0 -0.15 -0.2 -40 -20 0 20 40 60 80 100 120 0.14 0.42 -0.98 -0.42 Temperature (°C) Input Offset Voltage (mV) -0.14 ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 0.98 -0.7 0.7 11 Data Sheet Application Information Basic Operation Figures 1 and 2 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. +Vs 6.8μF perature, the package thermal resistance value ThetaJA (ӨJA) is used along with the total die power dissipation. TJunction = TAmbient + (ӨJA × PD) Where TAmbient is the temperature of the working environment. In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. PD = Psupply - Pload Supply power is calculated by the standard power equation. Output Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier Input + - 0.1μF Psupply = Vsupply × IRMS supply Vsupply = VS+ - VSPower delivered to a purely resistive load is: Pload = ((VLOAD)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Rloadeff in figure 3 would be calculated as: 0.1μF Rg -Vs 6.8μF RL Rf G = 1 + (Rf/Rg) Figure 1. Typical Non-Inverting Gain Circuit +Vs 6.8μF RL || (Rf + Rg) These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg R1 Input Rg + - 0.1μF Output 0.1μF 6.8μF -Vs RL Rf Figure 2. Typical Inverting Gain Circuit Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: (VLOAD)RMS = VPEAK / √2 ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. Rev 1A Power Dissipation Power dissipation should not be a factor when operating under the stated 300 ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it’s intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150°C. To calculate the junction tem- ©2004-2008 CADEKA Microcircuits LLC www.cadeka.com 12 Data Sheet 2.5 Maximum Power Dissipation (W) 2 SOIC-8 For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing. Overdrive Recovery 1.5 SOT23-6 Comlinear CLC1003 Low Distortion, Low Offset, RRIO Amplifier 1 0.5 0 -40 -20 0 20 40 60 80 Ambient Temperature (°C) Figure 3. Maximum Power Derating An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLCx003 will typically recover in less than 20ns from an overdrive condition. Figure 5 shows the CLC1003 in an overdriven condition. 3 2 VIN = .8Vpp G=5 2 2 1 Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 4. Input + Rf Rg Rs CL RL Output Voltage (V) Input Voltage (V) 1 0 Input 1 0 Output -1 -1 -1 -2 -3 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 Output -2 -2 Time (us) Figure 5. Overdrive Recovery Figure 4. Addition of RS for Driving Capacitive Loads The CLC1003 family of amplifiers is capable of driving up to 300pF directly, with no series resistance. Directly driving 500pF causes over 4dB of frequency peaking, as shown in the plot on page 6. Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in