CLC1050IST5X

Data Sheet A m p l i fy t h e H u m a n E x p e r i e n c e ® Comlinear CLC1050, CLC2050, CLC4050 FEATURES n Unity gain stable n 100dB voltage gain n 550kHz unity gain bandwidth n 0.5mA supply current n 20nA input bias current n 2mV input offset voltage n 3V to 36V single supply voltage range n ±1.5V to ±18V dual supply voltage range n Input common mode voltage range includes ground n 0V to VS-1.5V output voltage swing n CLC2050: improved replacement for industry standard LM358 n CLC4050: Improved replacement for industry standard LM324 n CLC1050: Pb-free SOT23-5 n CLC2050: Pb-free SOIC-8 n CLC4050: Pb-free SOIC-14 APPLICATIONS n Battery Charger n Active Filters n Transducer amplifiers n General purpose controllers n General purpose instruments Low Power, 3V to 36V, Single, Dual, Quad Amplifiers Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers General Description The COMLINEAR CLC1050 (single), CLC2050 (dual), and CLC4050 (quad) are voltage feedback amplifiers that are internally frequency compensated to provide unity gain stability. At unity gain (G=1), these amplifiers offer 550kHz of bandwidth. They consume only 0.5mA of supply current over the entire power supply operating range. The CLC1050, CLC2050, and CLC4050 are specifically designed to operate from single or dual supply voltages. The COMLINEAR CLC1050, CLC2050, and CLC4050 offer a common mode voltage range that includes ground and a wide output voltage swing. The combination of low-power, high supply voltage range, and low supply current make these amplifiers well suited for many general purpose applications and as alternatives to several industry standard amplifiers on the market today. Typical Application - Voltage Controlled Oscillator (VCO) 0.05µF R VCC 100k 51k R/2 50k – 1/2 CLCx050 + V+/2 51k 51k – 1/2 CLCx050 + 100k Output 1 Output 2 10k Ordering Information Part Number CLC1050IST5X CLC2050ISO8X CLC4050ISO14X Package SOT23-5 SOIC-8 SOIC-14 Pb-Free Yes Yes Yes RoHS Compliant Yes Yes Yes Operating Temperature Range -40°C to +85°C -40°C to +85°C -40°C to +85°C Packaging Method Reel Reel Reel Moisture sensitivity level for all parts is MSL-1. Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com Data Sheet CLC1050 Pin Configuration CLC1050 Pin Assignments Pin No. 1 2 3 4 5 Pin Name OUT -VS +IN -IN +VS Description Output Negative supply Positive input Negative input Positive supply OUT -V S +IN 1 2 3 + 5 +VS 4 Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers -IN CLC2050 Pin Configuration CLC2050 Pin Configuration Pin No. 1 Pin Name OUT1 -IN1 +IN1 -VS +IN2 -IN2 OUT2 +VS Description Output, channel 1 Negative input, channel 1 Positive input, channel 1 Negative supply Positive input, channel 2 Negative input, channel 2 Output, channel 2 Positive supply OUT1 -IN1 +IN1 -V S 1 2 3 4 8 7 6 5 +VS OUT2 -IN2 +IN2 2 3 4 5 6 7 8 CLC4050 Pin Configuration CLC4050 Pin Configuration Pin No. 1 2 Pin Name OUT1 -IN1 +IN1 +VS +IN2 -IN2 OUT2 OUT3 -IN3 +IN3 -VS +IN4 -IN4 OUT4 Description Output, channel 1 Negative input, channel 1 Positive input, channel 1 Positive supply Positive input, channel 2 Negative input, channel 2 Output, channel 2 Output, channel 3 Negative input, channel 3 Positive input, channel 3 Negative supply Positive input, channel 4 Negative input, channel 4 Output, channel 4 OUT1 -IN1 +IN1 +VS +IN2 -IN2 OUT2 1 2 3 4 5 6 7 14 13 12 11 10 9 8 OUT4 -IN4 +IN4 -VS +IN3 -IN3 OUT3 3 4 5 6 7 8 9 10 11 12 13 14 Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 2 Data Sheet Absolute Maximum Ratings The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots. Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers Parameter Supply Voltage Differential Input Voltage Input Voltage Power Dissipation (TA = 25°C) - SOIC-8 Power Dissipation (TA = 25°C) - SOIC-14 Min 0 -0.3 Max 40 40 40 550 800 Unit V V V mW mW Reliability Information Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance SOT23-5 SOIC-8 SOIC-14 Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air. Min -65 Typ Max 150 150 260 Unit °C °C °C °C/W °C/W °C/W 221 100 88 Recommended Operating Conditions Parameter Operating Temperature Range Supply Voltage Range Min -40 3 (±1.5) Typ Max +85 36 (±18) Unit °C V Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 3 Data Sheet Electrical Characteristics TA = 25°C (if bold, TA = -40 to +85°C), Vs = +5V, -Vs = GND, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted. Symbol Parameter Conditions G = +1, VOUT = 0.2Vpp, VS = 5V G = +1, VOUT = 0.2Vpp, VS = 30V G = +2, VOUT = 0.2Vpp, VS = 5V G = +1, VOUT = 0.2Vpp, VS = 30V G = +2, VOUT = 1Vpp, VS = 5V G = +2, VOUT = 2Vpp, VS = 30V VOUT = 1V step; (10% to 90%), VS = 5V VOUT = 2V step; (10% to 90%), VS = 30V VOUT = 0.2V step 1V step, VS = 5V 4V step, VS = 30V VOUT = 2Vpp, f = 1kHz, G = 20dB, CL = 100pF, VS = 30V > 10kHz, VS = 5V > 10kHz, VS = 30V Channel-to-channel, 1kHz to 20kHz Min Typ 330 550 300 422 107 76 4 5.6 1 200 285 Max Units Frequency Domain Response Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers UGBWSS BWSS BWLS Unity Gain Bandwidth -3dB Bandwidth Large Signal Bandwidth kHz kHz kHz kHz kHz kHz µs µs % V/ms V/ms Time Domain Response tR, tF OS SR Rise and Fall Time Overshoot Slew Rate Distortion/Noise Response THD en XTALK Total Harmonic Distortion Input Voltage Noise Crosstalk 0.015 45 40 120 2 7 VCM = 0V VCM = 0V DC, VS = 5V to 30V +VS = 15V, RL = ≥2kΩ, VOUT = 1V to 11V RL = ∞, VS = 30V RL = ∞, VS = 5V RL = ∞, VS = 30V RL = ∞, VS = 5V RL = ∞, VS = 30V RL = ∞, VS = 5V 70 60 85 80 0.65 0.45 0.7 0.5 1.0 0.7 1.5 1.0 2.0 1.2 3.0 1.2 +VS - 1.5 70 100 20 5 100 100 200 30 100 5 7 % nV/√Hz nV/√Hz dB mV mV µV/°C nA nA nA nA dB dB dB dB mA mA mA mA mA mA DC Performance VIO dVIO Ib IOS PSRR AOL Input Offset Voltage (1) Average Drift Input Bias Current (1) Input Offset Current (1) Power Supply Rejection Ratio (1) Open-Loop Gain (1) Supply Current, CLC1050 (1) IS Supply Current, CLC2050 (1) Supply Current, CLC4050 (1) VOUT = 1.4V, RS = 0Ω, VS = 5V to 30V Input Characteristics CMIR CMRR Common Mode Input Range (1,3) Common Mode Rejection Ratio (1) +VS = 30V DC, VCM = 0V to (+VS - 1.5V) 0 60 60 26 26 27 27 www.cadeka.com V dB dB V V Output Characteristics +VS = 30V, RL = 2kΩ VOH Output Voltage Swing, High (1) +VS = 30V, RL = 10kΩ 28 V V Rev 1A ©2007-2009 CADEKA Microcircuits LLC 4 Data Sheet Electrical Characteristics continued TA = 25°C (if bold, TA = -40 to +85°C), Vs = +5V, -Vs = GND, Rf = Rg =2kΩ, RL = 2kΩ to VS/2, G = 2; unless otherwise noted. Symbol VOL ISOURCE Parameter Output Voltage Swing, Low (1) Output Current, Sourcing (1) Conditions +VS = 5V, RL = 10kΩ VIN+ = 1V, VIN- = 0V, +VS = 15V, VOUT = 2V VIN+ = 0V, VIN- = 1V, +VS = 15V, VOUT = 2V VIN+ = 0V, VIN- = 1V, +VS = 15V, VOUT = 0.2V Min Typ 5 Max 20 30 Units mV mV mA mA μA Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers 20 20 10 5 12 40 15 50 40 60 ISINK ISC Notes: Output Current, Sinking (1) Short Circuit Output Current (1) +VS = 15V mA 1. 100% tested at 25°C. (Limits over the full temperature range are guaranteed by design.) 2. The input common mode voltage of either input signal voltage should be kept > 0.3V at 25°C. The upper end of the common-mode voltage range is +VS - 1.5V at 25°C, but either or both inputs can go to +36V without damages, independent of the magnitude of VS. Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 5 Data Sheet Typical Performance Characteristics TA = 25°C, +Vs = 30V, -Vs = GND, Rf = Rg =2kΩ, RL = 2kΩ, G = 2; unless otherwise noted. Non-Inverting Frequency Response 5 0 G=1 Rf = 0 Inverting Frequency Response 5 0 Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers G = -1 Normalized Gain (dB) -5 -10 -15 -20 -25 0.01 0.1 1 Normalized Gain (dB) G=2 G=5 -5 -10 -15 -20 -25 G = -2 G = -5 G = 10 G = -10 VOUT = 0.2Vpp VOUT = 0.2Vpp 10 0.01 0.1 1 10 Frequency (MHz) Frequency (MHz) Frequency Response vs. CL 5 0 CL = 1nF Rs = 0Ω CL = 100pF Rs = 0Ω Frequency Response vs. RL 5 0 Normalized Gain (dB) -5 -10 -15 -20 CL = 10nF Rs = 0Ω CL = 5nF Rs = 0Ω Normalized Gain (dB) -5 -10 -15 -20 RL = 1K RL = 2K RL = 5K RL = 10K VOUT = 0.2Vpp -25 0.01 0.1 1 10 -25 VOUT = 0.2Vpp 0.01 0.1 1 10 Frequency (MHz) Frequency (MHz) Frequency Response vs. VOUT 5 0 -5 Vout = 4Vpp -10 -15 -20 -25 0.01 0.1 1 10 -3dB Bandwidth vs. VOUT 500 -3dB Bandwidth (KHz) Normalized Gain (dB) Vout = 2Vpp 400 300 200 100 0 0.0 1.0 2.0 3.0 4.0 Frequency (MHz) VOUT (VPP) Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 6 Data Sheet Typical Performance Characteristics TA = 25°C, +Vs = 30V, -Vs = GND, Rf = Rg =2kΩ, RL = 2kΩ, G = 2; unless otherwise noted. Non-Inverting Frequency Response at VS = 5V 5 0 G=1 Rf = 0 Inverting Frequency Response at VS = 5V 5 0 Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers G = -1 G = -2 G = -5 Normalized Gain (dB) -5 -10 -15 -20 -25 0.01 0.1 1 Normalized Gain (dB) G=2 G=5 -5 -10 -15 -20 -25 G = 10 G = -10 VOUT = 0.2Vpp VOUT = 0.2Vpp 10 0.01 0.1 1 10 Frequency (MHz) Frequency (MHz) Frequency Response vs. CL at VS = 5V 5 0 CL = 1nF Rs = 0Ω CL = 100pF Rs = 0Ω Frequency Response vs. RL at VS = 5V 5 0 Normalized Gain (dB) -5 -10 -15 -20 CL = 10nF Rs = 0Ω CL = 5nF Rs = 0Ω Normalized Gain (dB) -5 -10 -15 -20 RL = 1K RL = 2K RL = 5K RL = 10K VOUT = 0.2Vpp -25 0.01 0.1 1 10 -25 VOUT = 0.2Vpp 0.01 0.1 1 10 Frequency (MHz) Frequency (MHz) Frequency Response vs. VOUT at VS = 5V 5 0 Vout = 1Vpp -5 Vout = 2Vpp -10 -15 -20 -25 0.01 0.1 1 10 -3dB Bandwidth vs. VOUT at VS = 5V 400 350 -3dB Bandwidth (KHz) Normalized Gain (dB) 300 250 200 150 100 50 0 0.0 0.5 1.0 1.5 2.0 Frequency (MHz) VOUT (VPP) Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 7 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, +Vs = 30V, -Vs = GND, Rf = Rg =2kΩ, RL = 2kΩ, G = 2; unless otherwise noted. Small Signal Pulse Response 2.65 2.60 Large Signal Pulse Response 5.00 Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers 4.00 Output Voltage (V) 2.55 2.50 2.45 2.40 2.35 0 10 20 30 40 50 Output Voltage (V) 3.00 2.00 1.00 0.00 0 10 20 30 40 50 Time (us) Time (us) Small Signal Pulse Response at VS = 5V 2.65 2.60 Large Signal Pulse Response at VS = 5V 4.00 3.50 Output Voltage (V) 2.55 2.50 2.45 2.40 2.35 0 10 20 30 40 50 Output Voltage (V) 3.00 2.50 2.00 1.50 1.00 0 10 20 30 40 50 Time (us) Time (us) Supply Current vs. Supply Voltage 1 0.9 0.8 CLC4050 Input Voltage Range vs. Power Supply 15 Supply Current (mA) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 5 10 VOUT = 0.2Vpp Input Voltage (+/-Vdc) 10 NEGATIVE POSITIVE CLC2050 CLC1050 5 15 20 25 30 35 40 0 0 5 10 15 Supply Voltage (V) Power Supply Voltage (+/-Vdc) Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 8 Data Sheet Typical Performance Characteristics - Continued TA = 25°C, +Vs = 30V, -Vs = GND, Rf = Rg =2kΩ, RL = 2kΩ, G = 2; unless otherwise noted. Voltage Gain vs. Supply Voltage 120 RL=2K 105 Input Current vs. Temperature 20 18 16 Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers Input Current (nA) 32 40 Voltage Gain (dB) 14 12 10 8 6 4 90 RL=20K 75 VOUT = 0.2Vpp 60 0 8 16 24 2 0 -50 -25 0 25 50 75 100 125 Power Supply Voltage (V) Temperature (°C) Functional Block Diagram VCC 6µA 4µA 100µA Q5 Q6 Q2 – Inputs Q1 Q3 Q4 Cc Q7 Rsc Output + Q10 Q8 Q9 Q11 Q12 50µA Q13 Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 9 Data Sheet Application Information Basic Operation Figures 1, 2, and 3 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. +Vs 6.8μF Power Dissipation Power dissipation should not be a factor when operating under the stated 2k ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it’s intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150°C. To calculate the junction temperature, the package thermal resistance value ThetaJA (ӨJA) is used along with the total die power dissipation. TJunction = TAmbient + (ӨJA × PD) Where TAmbient is the temperature of the working environment. In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. PD = Psupply - Pload Supply power is calculated by the standard power equation. Psupply = Vsupply × IRMS supply Output Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers Input + - 0.1μF Output 0.1μF RL Rf G = 1 + (Rf/Rg) Rg -Vs 6.8μF Figure 1. Typical Non-Inverting Gain Circuit +Vs 6.8μF R1 Input Rg + - 0.1μF Vsupply = VS+ - VSPower delivered to a purely resistive load is: Pload = ((VLOAD)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Rloadeff in figure 3 would be calculated as: RL || (Rf + Rg) 0.1μF 6.8μF -Vs RL Rf G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg Figure 2. Typical Inverting Gain Circuit +Vs 6.8μF Input + - 0.1μF Output RL 0.1μF 6.8μF -Vs These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: G=1 Figure 3. Unity Gain Circuit Rev 1A ©2007-2009 CADEKA Microcircuits LLC www.cadeka.com 10 Data Sheet (VLOAD)RMS = VPEAK / √2 ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. 2.5 SOIC-16 2 CL (pF) 1nF 5nF 10nF 100 RS (Ω) 0 0 0 0 -3dB BW (kHz) 485 390 260 Comlinear CLC1050, CLC2050, CLC4050 Low Power, 3V to 36V, Single, Dual, Quad Amplifiers 440 Table 1: Recommended RS vs. CL For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing. Overdrive Recovery An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLCx050 will typically recover in less than 30ns from an overdrive condition. Figure 6 shows the CLC1050 in an overdriven condition. 4 3.5 4 3.5 3 Input Maximum Power Dissipation (W) 1.5 SOT23-6 1 0.5 SOT23-5 0 -40 -20 0 20 40 60 80 Ambient Temperature (°C) Figure 4. Maximum Power Derating VIN = 1.25Vpp G=5 Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 5. Input + Rf Rg Rs CL RL Input Voltage (V) 3 2.5 2 1.5 1 0.5 0 -0.5 Output Output Voltage (V) 2.5 2 1.5 1 0.5 0 -0.5 Output 0 20 40 60 80 100 Time (us) Figure 6. Overdrive Recovery Figure 5. Addition of RS for Driving Capacitive Loads Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in