Data Sheet
A m p l i fy t h e H u m a n E x p e r i e n c e
®
Comlinear CLC1004, CLC1014, CLC3004
features n 0.1dB gain flatness to 200MHz n 0.02%/0.01˚ differential gain/phase n 750MHz -3dB bandwidth at G = 2 n 350MHz large signal bandwidth n 1,400V/μs slew rate n 4nV/√Hz input voltage noise n 100mA output current n 20ns enable time n Stable for gains of 2V/V or larger n Fully specified at 5V and ±5V supplies n CLC1004: Pb-free SOT23-6 n CLC1014: Pb-free SOT23-5 n CLC3004: Pb-free SOIC-16 applications n RGB video line drivers n High definition video driver n Video switchers and routers n ADC buffer n Active filters n Cable drivers n Imaging applications n Radar/communication receivers
Single and Triple, 750MHz Amplifiers with Disable
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
General Description
The COMLINEAR CLC1004 (single with disable), CLC1014 (single), and CLC3004 (triple with disable) are high-performance, voltage feedback amplifiers that provide 750MHz gain of 2 bandwidth, ±0.1dB gain flatness to 200MHz, and 1,400V/μs slew rate. This high performance exceeds the requirements of high-definition television (HDTV) and other multimedia applications. These COMLINEAR high-performance amplifiers also provide ample output current to drive multiple video loads. The COMLINEAR CLC1004, CLC1014, and CLC3004 are designed to operate from ±5V or +5V supplies. The CLC1004 and CLC3004 offer a fast enable/ disable feature to save power. While disabled, the outputs are in a highimpedance state to allow for multiplexing applications. The combination of high-speed, low-power, and excellent video performance make these amplifiers well suited for use in many general purpose, high-speed applications including video line driving and imaging applications.
Typical Application - Driving Multiple Video Loads
+Vs
75Ω Cable Input 75Ω Rf Rg 75Ω -Vs 75Ω
75Ω Cable Output A 75Ω
75Ω Cable Output B 75Ω
Ordering Information
Part Number CLC1004IST6X CLC1004IST6 CLC1014IST5X CLC1014IST5 CLC3004ISO16X CLC3004ISO16 Package SOT23-6 SOT23-6 SOT23-5 SOT23-5 SOIC-16 SOIC-16 Pb-Free Yes Yes Yes Yes Yes Yes RoHS Compliant Yes Yes Yes Yes Yes Yes Operating Temperature Range -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C -40°C to +85°C Packaging Method Reel Rail Reel Rail Reel Rail
Rev 1A
Moisture sensitivity level for all parts is MSL-1.
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Data Sheet
CLC1004 Pin Configuration
CLC1004 Pin Assignments
Pin No. Pin Name OUT -VS +IN -IN DIS +VS Description Output Negative supply Positive input Negative input Disable pin. Enabled if pin is grounded, left floating or pulled below VON, disabled if pin is pulled above VOFF. Positive supply 1 2 3 4 5 6
OUT -V S +IN
1 2 3 +
6
+VS DIS -IN
-
5 4
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
CLC3004 Pin Configuration
CLC3004 Pin Configuration
Pin No. 1 Pin Name -IN1 +IN1 -VS -IN2 +IN2 -VS -IN3 +IN3 -VS OUT3 +VS OUT2 +VS DIS OUT1 +VS Description Negative input, channel 1 Positive input, channel 1 Negative supply Negative input, channel 2 Positive input, channel 2 Negative supply Negative input, channel 3 Positive input, channel 3 Negative supply Output, channel 3 Positive supply Output, channel 2 Positive supply Disable pin. Enabled if pin is grounded, left floating or pulled below VON, disabled if pin is pulled above VOFF. Output, channel 1 Positive supply
-IN1 +IN1 -VS -IN2 +IN2 -VS -IN3 +IN3
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
+VS OUT1 DIS +VS OUT2 +VS OUT3 -VS
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Disable Pin Truth Table
Pin DIS
*Default Open State
High Disabled
Low* Enabled
Rev 1A
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2
Data Sheet
CLC1014 Pin Configuration
OUT -V S +IN
1 2 3 + 5
CLC1014 Pin Assignments
Pin No. Pin Name OUT -VS +IN -IN +VS Description Output Negative supply Positive input Negative input Positive supply 1 2 3 4 5
+VS
4
-IN
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Rev 1A
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3
Data Sheet
Absolute Maximum Ratings
The safety of the device is not guaranteed when it is operated above the “Absolute Maximum Ratings”. The device should not be operated at these “absolute” limits. Adhere to the “Recommended Operating Conditions” for proper device function. The information contained in the Electrical Characteristics tables and Typical Performance plots reflect the operating conditions noted on the tables and plots.
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Parameter Supply Voltage Input Voltage Range Continuous Output Current
Min 0 -Vs -0.5V
Max 14 +Vs +0.5V 100
Unit V V mA
Reliability Information
Parameter Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10s) Package Thermal Resistance 5-Lead SOT23 6-Lead SOT23 16-Lead SOIC
Notes: Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
Min -65
Typ
Max 150 150 260
Unit °C °C °C °C/W °C/W °C/W
221 177 68
ESD Protection
Product Human Body Model (HBM) Charged Device Model (CDM) SOT23-5 2kV 1kV SOT23-6 2kV 1kV SOIC-16 2kV 1kV
Recommended Operating Conditions
Parameter Operating Temperature Range Supply Voltage Range Min -40 4.5 Typ Max +85 12 Unit °C V
Rev 1A
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Data Sheet
Electrical Characteristics at +5V
TA = 25°C, Vs = +5V, Rf = Rg =150Ω, RL = 150Ω to VS/2, G = 2; unless otherwise noted.
symbol
BWSS BWLS BW0.1dBSS BW0.1dBLS tR, tF tS OS SR HD2 HD3 THD DG DP IP3 SFDR en in XTALK VIO dVIO Ib dIb PSRR AOL IS TON TOFF OFFIOS VOFF VON ISD
parameter
-3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness 0.1dB Gain Flatness Rise and Fall Time Settling Time to 0.1% Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Differential Gain Differential Phase Third Order Intercept Spurious Free Dynamic Range Input Voltage Noise Input Current Noise Crosstalk Input Offset Voltage Average Drift Input Bias Current Average Drift Power Supply Rejection Ratio Open-Loop Gain Supply Current Turn On Time Turn Off Time Off Isolation Power Down Input Voltage Enable Input Voltage Disable Supply Current
conditions
G = +2, VOUT = 0.2Vpp G = +2, VOUT = 1Vpp G = +2, VOUT = 0.2Vpp G = +2, VOUT = 1Vpp VOUT = 1V step; (10% to 90%) VOUT = 1V step VOUT = 0.2V step 1V step VOUT = 1Vpp, 5MHz VOUT = 1Vpp, 5MHz VOUT = 1Vpp, 5MHz NTSC (3.58MHz), AC-coupled, RL = 150Ω NTSC (3.58MHz), AC-coupled, RL = 150Ω VOUT = 1Vpp, 10MHz VOUT = 1Vpp, 5MHz > 1MHz > 1MHz Channel-to-channel 5MHz, VOUT = 1Vpp
Min
typ
600 400 150 120 1.2 10 2 750 -72 -85 70 0.08 0.04 38 63 4 4 70 0 4 3.2 20
Max
units
MHz
Frequency Domain Response
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
MHz MHz MHz ns ns % V/µs dBc dBc dB % ° dBm dBc nV/√Hz pA/√Hz dB mV µV/°C µA nA/°C dB dB mA ns ns dB V V mA mA MΩ pF V dB
Time Domain Response
Distortion/Noise Response
DC Performance
DC VOUT = VS / 2 per channel
56 65 11 20 40
Disable Characteristics
5MHz DIS pin, disabled if pin is pulled above VOFF = Vs - 2V DIS pin, enabled if pin is grouned, left open, or pulled below VON = Vs - 4V CLC1004; DIS pin is pulled to VS CLC3004; DIS pin is pulled to VS Non-inverting
-78 Disabled if > (Vs - 2V) Enabled if < (Vs - 4V) 0.4 0.4 4.5 1.0 1.5 to 3.5
Input Characteristics
RIN CIN CMIR CMRR Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio DC
50
Rev 1A
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Data Sheet
Electrical Characteristics at +5V continued
TA = 25°C, Vs = +5V, Rf = Rg =150Ω, RL = 150Ω to VS/2, G = 2; unless otherwise noted.
symbol
RO VOUT IOUT
notes: 1. 100% tested at 25°C
parameter
Output Resistance Output Voltage Swing Output Current
conditions
Closed Loop, DC RL = 150Ω
Min
typ
0.1 1.5 to 3.5 ±100
Max
units
Ω V mA
Output Characteristics
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Rev 1A
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6
Data Sheet
Electrical Characteristics at ±5V
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
symbol
BWSS BWLS BW0.1dBSS BW0.1dBLS tR, tF tS OS SR HD2 HD3 THD DG DP IP3 SFDR en in XTALK VIO dVIO Ib dIb PSRR AOL IS TON TOFF OFFIOS VOFF VON ISD
parameter
-3dB Bandwidth Large Signal Bandwidth 0.1dB Gain Flatness 0.1dB Gain Flatness Rise and Fall Time Settling Time to 0.1% Overshoot Slew Rate 2nd Harmonic Distortion 3rd Harmonic Distortion Total Harmonic Distortion Differential Gain Differential Phase Third Order Intercept Spurious Free Dynamic Range Input Voltage Noise Input Current Noise Crosstalk Input Offset Voltage(1) Average Drift Input Bias Current (1) Average Drift Power Supply Rejection Ratio (1) Open-Loop Gain Supply Current (1) Turn On Time Turn Off Time Off Isolation Power Down Input Voltage Enable Input Voltage Disable Supply Current (1)
conditions
G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp G = +2, VOUT = 0.2Vpp G = +2, VOUT = 2Vpp VOUT = 2V step; (10% to 90%) VOUT = 2V step VOUT = 0.2V step 2V step VOUT = 2Vpp, 5MHz VOUT = 2Vpp, 5MHz VOUT = 2Vpp, 5MHz NTSC (3.58MHz), AC-coupled, RL = 150Ω NTSC (3.58MHz), AC-coupled, RL = 150Ω VOUT = 2Vpp, 10MHz VOUT = 1Vpp, 5MHz > 1MHz > 1MHz Channel-to-channel 5MHz, VOUT = 2Vpp
Min
typ
750 350 200 120 1.3 10 1.5 1400 -71 -82 70 0.02 0.01 41 65 4 4 70
Max
units
MHz
Frequency Domain Response
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
MHz MHz MHz ns ns % V/µs dBc dBc dB % ° dBm dBc nV/√Hz pA/√Hz dB 10 20 mV µV/°C µA nA/°C dB dB 17 mA ns ns dB V V mA mA MΩ pF V dB
Time Domain Response
Distortion/Noise Response
DC Performance
-10 -20 DC VOUT = VS / 2 per channel 40 0 4 3.2 20 56 70 12 20 40 5MHz DIS pin, disabled if pin is pulled above VOFF = Vs - 1V DIS pin, enabled if pin is grouned, left open, or pulled below VON = Vs - 2V CLC1004; DIS pin is pulled to VS CLC3004; DIS pin is pulled to VS Non-inverting -78 Disabled if > (Vs - 1V) Enabled if < (Vs - 2V) 0.4 0.4 4.5 1.0 ±3.2 DC 40 60 0.8 0.9
Disable Characteristics
Input Characteristics
RIN CIN CMIR CMRR Input Resistance Input Capacitance Common Mode Input Range Common Mode Rejection Ratio (1)
Rev 1A
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Data Sheet
Electrical Characteristics at ±5V continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted.
symbol
RO VOUT IOUT
notes: 1. 100% tested at 25°C
parameter
Output Resistance Output Voltage Swing Output Current
conditions
Closed Loop, DC RL = 150Ω
(1)
Min
typ
0.1
Max
units
Ω V mA
Output Characteristics
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
±3.0
±3.8 ±220
Rev 1A
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Data Sheet
Typical Performance Characteristics
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted. Non-Inverting Frequency Response
6 0
Inverting Frequency Response
1
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Normalized Gain (dB)
3
-1
G = -1 G = -2 G = -5 G = -10
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7 VOUT = 0.2Vpp 0.1 1 10
0 G=2 -3 G=5 G = 10 VOUT = 0.2Vpp -9 0.1 1 10 100 1000
-6
100
1000
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. CL
1 0
Frequency Response vs. RL
2 1 RL = 1kΩ RL = 500Ω
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7 0.1 1 VOUT = 0.2Vpp
CL = 500pF Rs = 5Ω CL = 100pF Rs = 10Ω CL = 50pF Rs = 15Ω CL = 20pF Rs = 20Ω 10 100 1000
Normalized Gain (dB)
-1
CL = 1000pF Rs = 3.3Ω
0 -1 -2 RL = 50Ω -3 -4 -5 -6 0.1 1 10 100 1000 VOUT = 0.2Vpp RL = 25Ω
RL = 100Ω
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. VOUT
3
Frequency Response vs. Temperature
2 1
Normalized Gain (dB)
Normalized Gain (dB)
0 VOUT = 1Vpp -3 VOUT = 2Vpp VOUT = 4Vpp -6
0 -1 -2 -3 -4 -5 -6 VOUT = 0.2Vpp + 85degC + 25degC - 40degC
-9 0.1 1 10 100 1000
-7 0.1 1 10 100 1000 10000
Frequency (MHz)
Frequency (MHz)
Rev 1A
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Data Sheet
Typical Performance Characteristics
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted. Non-Inverting Frequency Response at VS = 5V
6 0
Inverting Frequency Response at VS = 5V
1
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Normalized Gain (dB)
3
-1
G = -1 G = -2 G = -5 G = -10
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7 VOUT = 0.2Vpp 0.1 1 10
0 G=2 -3 G=5 G = 10 VOUT = 0.2Vpp -9 0.1 1 10 100 1000
-6
100
1000
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. CL at VS = 5V
1 0
Frequency Response vs. RL at VS = 5V
2 1 RL = 1kΩ RL = 500Ω
Normalized Gain (dB)
-2 -3 -4 -5 -6 -7 0.1 1 VOUT = 0.2Vpp
CL = 500pF Rs = 5Ω CL = 100pF Rs = 10Ω CL = 50pF Rs = 15Ω CL = 20pF Rs = 20Ω 10 100 1000
Normalized Gain (dB)
-1
CL = 1000pF Rs = 3.3Ω
0 -1 -2 RL = 50Ω -3 -4 -5 -6 0.1 1 10 100 1000 VOUT = 0.2Vpp RL = 25Ω
RL = 100Ω
Frequency (MHz)
Frequency (MHz)
Frequency Response vs. VOUT at VS = 5V
3
Frequency Response vs. Temperature at VS = 5V
2 1
Normalized Gain (dB)
Normalized Gain (dB)
0 VOUT = 1Vpp -3 VOUT = 2Vpp VOUT = 2.5Vpp -6
0 -1 -2 -3 -4 -5 -6 VOUT = .2Vpp + 25degC - 40degC + 85degC
-9 0.1 1 10 100 1000
-7 0.1 1 10 100 1000 10000
Frequency (MHz)
Frequency (MHz)
Rev 1A
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted. Gain Flatness
1.2 1 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1 -1.2 0.1 1 10 100 VOUT = 2Vpp
Gain Flatness at VS = 5V
0.6 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 0.1 1 10 100 1000 VOUT = 2Vpp
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Normalized Gain (dB)
Frequency (MHz)
Normalized Gain (dB)
Frequency (MHz)
-3dB Bandwidth vs. VOUT
750 650 550 450 350 250 150 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
-3dB Bandwidth vs. VOUT at VS = 5V
600
-3dB Bandwidth (MHz)
-3dB Bandwidth (MHz)
500
400
300
200
100 0.0 0.5 1.0 1.5 2.0 2.5
VOUT (VPP)
VOUT (VPP)
Closed Loop Output Impedance vs. Frequency
10
VS = ±5.0V
Input Voltage Noise
30
Input Voltage Noise (nV/√Hz)
Output Resistance (Ω)
25 20 15 10 5 0 0.0001
1
0.1
0.01 10k 100k 1M 10M 100M 1G
0.001
0.01
0.1
1
10
Frequency (Hz)
Frequency (MHz)
Rev 1A
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted. 2nd Harmonic Distortion vs. RL
-40 -50 RL = 150Ω -60 -70 -80 -90 VOUT = 2Vpp -100 0 5 10 15 20 -100 0 5 10 15 20
3rd Harmonic Distortion vs. RL
-50
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
-60 RL = 150Ω
Distortion (dBc)
Distortion (dBc)
-70 RL = 499Ω -80
RL = 499Ω -90 VOUT = 2Vpp
Frequency (MHz)
Frequency (MHz)
2nd Harmonic Distortion vs. VOUT
3rd Harmonic Distortion vs. VOUT
-60 10MHz -70
-70 10MHz
Distortion (dBc)
Distortion (dBc)
-80
-80 1MHz -90 5MHz
-90 1MHz 5MHz
-100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5
-100 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5
Output Amplitude (Vpp)
Output Amplitude (Vpp)
CMRR vs. Frequency
-20 -25 -30
VS = ±5.0V
PSRR vs. Frequency
0 -10 -20
CMRR (dB)
-35 -40 -45 -50 -55 10k 100k 1M 10M 100M
PSRR (dB)
-30 -40 -50 -60 -70 0.01 0.1 1 10 100
Frequency (Hz)
Frequency (MHz)
Rev 1A
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted. Small Signal Pulse Response
0.150 0.100 0.050
Small Signal Pulse Response at VS = 5V
2.65 2.60 2.55
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Voltage (V)
0.000 -0.050 -0.100 -0.150 0 20 40 60 80 100
Voltage (V)
2.50 2.45 2.40 2.35 0 20 40 60 80 100
Time (ns)
Time (ns)
Large Signal Pulse Response
3 2 1
Large Signal Pulse Response at VS = 5V
4 3.5 3
Voltage (V)
0 -1 -2 -3 0 20 40 60 80 100
Voltage (V)
2.5 2 1.5 1 0 20 40 60 80 100
Time (ns)
Time (ns)
Differential Gain & Phase AC Coupled Output
0.03 0.02 0.01 DP 0 -0.01 -0.02 -0.03 -0.04 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 RL = 150Ω AC coupled DG
Differential Gain & Phase DC Coupled Output
0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 RL = 150Ω DC coupled DG DP
Diff Gain (%) and Diff Phase ( ) °
Input Voltage (V)
Diff Gain (%) and Diff Phase ( ) °
Input Voltage (V)
Rev 1A
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Data Sheet
Typical Performance Characteristics - Continued
TA = 25°C, Vs = ±5V, Rf = Rg =150Ω, RL = 150Ω, G = 2; unless otherwise noted. Differential Gain & Phase AC Coupled Output at VS = ±2.5V
0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4
Differential Gain & Phase DC Coupled at VS = ±2.5V
0.1 0.05 0 -0.05 -0.1 -0.15 -0.2 -0.25 -0.3 -0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 RL = 150Ω DC coupled DG DP
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Diff Gain (%) and Diff Phase ( ) °
DP
DG
RL = 150Ω AC coupled
Input Voltage (V)
Diff Gain (%) and Diff Phase ( ) °
Input Voltage (V)
Rev 1A
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Data Sheet
Application Information
Basic Operation Figures 1 and 2 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations.
+Vs 6.8μF
perature, the package thermal resistance value ThetaJA (ӨJA) is used along with the total die power dissipation. TJunction = TAmbient + (ӨJA × PD) Where TAmbient is the temperature of the working environment. In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. PD = Psupply - Pload Supply power is calculated by the standard power equation.
Output
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Input
+ -
0.1μF
Psupply = Vsupply × IRMS supply Vsupply = VS+ - VSPower delivered to a purely resistive load is: Pload = ((VLOAD)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Rloadeff in figure 3 would be calculated as:
0.1μF Rg -Vs 6.8μF
RL Rf
G = 1 + (Rf/Rg)
Figure 1. Typical Non-Inverting Gain Circuit
+Vs 6.8μF
RL || (Rf + Rg) These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from PD = PQuiescent + PDynamic - PLoad
G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg
R1 Input Rg
+ -
0.1μF Output 0.1μF 6.8μF -Vs RL Rf
Figure 2. Typical Inverting Gain Circuit
Quiescent power can be derived from the specified IS values along with known supply voltage, VSupply. Load power can be calculated as above with the desired signal amplitudes using: (VLOAD)RMS = VPEAK / √2 ( ILOAD)RMS = ( VLOAD)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDYNAMIC = (VS+ - VLOAD)RMS × ( ILOAD)RMS Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available.
Power Dissipation Power dissipation should not be a factor when operating under the stated 1000 ohm load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it’s intended operating range. Maximum power levels are set by the absolute maximum junction rating of 150°C. To calculate the junction tem-
Rev 1A
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15
Data Sheet
2.5
Maximum Power Dissipation (W)
SOIC-16 2
reducing RS will increase bandwidth at the expense of additional overshoot and ringing. Overdrive Recovery
1.5
SOT23-6
1
0.5
SOT23-5
0 -40 -20 0 20 40 60 80
Ambient Temperature (°C)
Figure 3. Maximum Power Derating
An overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. The CLCx004 will typically recover in less than 20ns from an overdrive condition. Figure 5 shows the CLC1004 in an overdriven condition.
3 3 2 Input
Comlinear CLC1004, CLC1014, CLC3004 Single and Triple, 750MHz Amplifiers with Disable
Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 4.
Input + Rf Rg Rs CL RL
Input Voltage (V)
VIN = 2.5Vpp G=5
2 1 0 Output -1 -2
Output Voltage (V)
1 0 -1 -2 -3 0 20 40 60 80 100 120 140 160 180 200
Output
-3
Time (ns)
Figure 5. Overdrive Recovery Figure 4. Addition of RS for Driving Capacitive Loads Layout Considerations General layout and supply bypassing play major roles in high frequency performance. CaDeKa has evaluation boards to use as a guide for high frequency layout and as aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: • Include 6.8µF and 0.1µF ceramic capacitors for power supply decoupling • Place the 6.8µF capacitor within 0.75 inches of the power pin • Place the 0.1µF capacitor within 0.1 inches of the power pin • Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance • Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information.
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Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in