CM1223
Industry First Low Capacitance ESD Protection Arrays w/Backdrive Protection Features
• • • • • • • • • • • 2, 4, and 8 channels of ESD protection with integrated backdrive protection on all lines Provides ESD protection to IEC61000-4-2 Level 4 - 8kV contact discharge - 15kV air discharge Low channel input capacitance of 1.0pF typical Minimal capacitance change with temperature and voltage Channel I/O to Gnd capacitance difference of 0.02pF typical is ideal for differential signalsl Mutual capacitance between signal pin and adjacent signal pin - 0.11pF typical Zener diode protects supply rail and eliminates the need for external by-pass capacitors Pin compatible with CM1213-02, -04, and -08 Each I/O pin can withstand over 1000 ESD strikes Available in SOT, and MSOP packages Lead-free version available
Product Description
The CM1223 family of diode arrays has been designed to provide ESD protection for electronic components or sub-systems requiring minimal capacitive loading. These devices are ideal for protecting systems with high data and clock rates or for circuits requiring low capacitive loading. Each ESD channel consists of a pair of diodes in series which steer the positive or negative ESD current pulse to either the positive (VP) or negative (VN) supply rail. A Zener diode is embedded between VP and VN, absorbing positive ESD strikes and also providing ESD protection for the VP rail. An additional diode is added in this device to serve as backdrive current protection. The CM1223 will protect against ESD pulses up to ±8kV per the IEC 61000-4-2 standard and using the MIL-STD-883D (Method 3015) specification for Human Body Model (HBM) ESD, all pins are protected from contact discharges of greater than ±15kV. These devices are particularly well-suited for protecting systems using high-speed ports such as USB2.0, IEEE1394 (Firewire®, iLink™), Serial ATA, DVI, HDMI and corresponding ports in removable storage, digital camcorders, DVD-RW drives and other applications where extremely low loading capacitance with ESD protection are required in a small package footprint. The CM1223 family of devices is available with optional lead-free finishing.
Applications
• • • • • • • USB2.0 ports at 480Mbps in desktop PCs, notebooks and peripherals IEEE1394 Firewire® ports at 400Mbps / 800Mbps DVI ports, HDMI ports in notebooks, set top boxes, digital TVs, LCD displays UDI and Displayport Serial ATA ports in desktop PCs and hard disk drives PCI Express ports General purpose high-speed data line ESD protection
Electrical Schematics
VP
CH4
VP
CH3
CH8
CH7
VP
CH6
CH5
CH1
CH2
VN CM1223-02ST/SO CM1223-02SS/SR
CH1
VN
CH2
CH1
CH2
VN
CH3
CH4
CM1223-04ST/SO CM1223-04MS/MR
CM1223-08MS/MR
© 2006 California Micro Devices Corp. All rights reserved. 08/02/06
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
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Tel: 408.263.3214
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Fax: 408.263.7846
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1
CM1223
PACKAGE / PINOUT DIAGRAMS
Top View
VN
1 4
Top View
VP
CH1
1 2 3 6
Top View
CH4
CH1 CH2
1 2 3 4 5
10 9 8 7 6
CH8 CH7 VN CH6 CH5
D327/ D337
CH1
2 3
D325/ D335
D326/ D336
VN
CH2 CH2
5 4
VP
CH3
CH3 CH4 VP
4-Lead SOT143-4
6-Lead SOT23-6
Top View
NC
1 2 3 5
Top View
VP
10-Lead MSOP-10
NC CH4 VN NC CH3
CH1 NC VP
1 2 3 4 5
10 9 8 7 6
D324/ D334
4
D328 / D338
VN
CH1
CH2
CH2 NC
5-Lead SOT23-5
10-Lead MSOP-10
Note: These drawings are not to scale.
Pin Descriptions
PIN DESCRIPTIONS 2-CHANNEL, 4-LEAD SOT143-4 PACKAGE PIN 1 2 3 4 NAME VN CH1 CH2 VP TYPE GND I/O I/O PWR ESD Channel ESD Channel Positive voltage supply rail PIN Negative voltage supply rail PIN 1 2 3 4 5 6 7 8 9 10 CH1 NC VP CH2 NC CH3 NC VN CH4 NC GND I/O I/O PWR I/O 4-CHANNEL, 10-LEAD MSOP-10 PACKAGE NAME TYPE I/O DESCRIPTION ESD Channel No connect Positive voltage supply rail ESD Channel No connect ESD Channel No connect Negative voltage supply rail ESD Channel No connect 8-CHANNEL, 10-LEAD MSOP-10 PACKAGE PIN 1 2 3 4 5 6 7 8 9 10 NAME CH1 CH2 CH3 CH4 VP CH5 CH6 VN CH7 CH8 TYPE I/O I/O I/O I/O PWR I/O I/O GND I/O I/O DESCRIPTION ESD Channel ESD Channel ESD Channel ESD Channel Positive voltage supply rail ESD Channel ESD Channel Negative voltage supply rail ESD Channel ESD Channel
2-CHANNEL, 5-LEAD SOT23-5 PACKAGE PIN 1 2 3 4 5 NAME NC VN CH1 CH2 VP GND I/O I/O PWR TYPE DESCRIPTION No connect Negative voltage supply rail ESD Channel ESD Channel Positive voltage supply rail
4-CHANNEL, 6-LEAD SOT23-6 PACKAGE PIN 1 2 3 4 5 6 NAME CH1 VN CH2 CH3 VP CH4 TYPE I/O GND I/O I/O PWR I/O DESCRIPTION ESD Channel Negative voltage supply rail ESD Channel ESD Channel Positive voltage supply rail ESD Channel
© 2006 California Micro Devices Corp. All rights reserved.
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490 N. McCarthy Blvd., Milpitas, CA 95035-5112
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08/02/06
CM1223
Backdrive protection
Backdrive protection is needed to block against backdrive current flowing from a high potential voltage node toward a lower potential voltage node through the interface cable. For example, consider a DVD player connected to a TV via an HDMI interface. If the DVD player is switched off and the TV is left on, there is a possibility of reverse current flow back into the main power supply rail of the DVD player. Typically, the DVD's power supply has some form of bulk supply capacitance associated with it. Because all CMOS logic exhibits a very high impedance on the power rail node when "off", if there is very little parasitic shunt resistance and as little as a few milliamps of "backdrive" current flowing back into the power rail, it is possible over time to charge that bulk supply capacitance to some intermediate level. If this level rises above the power-on-reset (POR) voltage level of some of the integrated circuits, the DVD player may not reset properly when the DVD player is turned back on. To avoid this situation, the CM1223 with integrated backdrive protection diode was designed to block backdrive current, guaranteeing no more than 5μA on any I/O pin when the I/O pin voltage is greater than the CM1223 supply voltage.
VDD_SOURCE
Discrete Backdrive Protection Diode
“Off One Channel CM1213
VDD_SOURCE
VDD_SINK
Integrated Backdrive Protection Diode
“Off One Channel CM1223
VDD_SINK
CBULK
CBULK
+
+
HOST ASIC
D1
I/O
D2
IBACKDRIVE = 0
Peripheral ASIC
HOST ASIC
D1
I/O
D2
IBACKDRIVE = 0
Peripheral ASIC
Figure 1. Backdrive Protection Diagram.
© 2006 California Micro Devices Corp. All rights reserved. 08/02/06
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CM1223
Ordering Information
PART NUMBERING INFORMATION
Standard Finish # of Channels 2 2 4 4 8 Leads 5 4 6 10 10 Package SOT23-5 SOT143-4 SOT23-6 MSOP-10 MSOP-10 Ordering Part Number1 CM1223-02ST CM1223-02SS CM1223-04ST CM1223-04MS CM1223-08MS Part Marking D324 D327 D325 D328 D326 Lead-free Finish Ordering Part Number1 CM1223-02SO CM1223-02SR CM1223-04SO CM1223-04MR CM1223-08MR Part Marking D334 D337 D335 D338 D336
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER Operating Supply Voltage (VP - VN) Operating Temperature Range Storage Temperature Range DC Voltage at any channel input RATING 6.0 -40 to +85 -65 to +150 (VN - 0.5) to (VP + 0.5) UNITS V °C °C V
STANDARD OPERATING CONDITIONS
PARAMETER Operating Temperature Range Package Power Rating SOT143-4 Package (CM1223-02SS/SR) SOT23-5 Package (CM1223-02ST/SO) SOT23-6 Package (CM1223-04ST/SO) MSOP-10 Package (CM1223-04MS/MR) MSOP-10 Package (CM1223-08MS/MR) RATING -40 to +85 225 225 225 400 400 UNITS °C mW mW mW mW mW
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CM1223
ELECTRICAL OPERATING CHARACTERISTICS(SEE NOTE 1)
SYMBOL PARAMETER VP IP VSCL Operating Supply Voltage (VP-VN) Operating Supply Current Signal Clamp Voltage Positive Transients Negative Transients Channel Leakage Current Channel Input Capacitance Channel Input Capacitance Matching Mutual Capacitance between signal pin and adjacent signal pin ESD Protection Peak Discharge Voltage at any channel input, in system a) Contact discharge per IEC 61000-4-2 standard b) Human Body Model, MIL-STD-883, Method 3015 Channel Clamp Voltage Positive Transients Negative Transients Dynamic Resistance Positive Transients Negative Transients (VP-VN)=3.3V IF = 8mA; TA=25°C 6.7 0.60 8.2 0.80 ±0.1 1.0 0.02 0.11 ±1.0 1.5 CONDITIONS MIN TYP 3.3 MAX 5.5 8.0 UNITS V μA V V μA pF pF pF
ILEAK CIN
TA=25°C; VP=5V, VN=0V At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V; Note 2 applies At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V; Note 2 applies At 1 MHz, VP=3.3V, VN=0V, VIN=1.65V; Note 2 applies
ΔCIN
CMUTUAL VESD
Notes 2, 4 & 5; TA=25°C Notes 2, 3 & 5; TA=25°C
±8 ±15
kV kV
VCL
TA=25°C, IPP = 1A, tP = 8/20uS; Notes 2 & 5 TA=25°C, IPP = 1A, tP = 8/20uS Any I/O pin to Ground; Notes 2 & 5
+8.8 -1.4 0.7 0.4
V V Ω Ω
RDYN
Note 1: Note 2: Note 3: Note 4: Note 5:
All parameters specified at TA = -40°C to +85°C unless otherwise noted. These parameters guaranteed by design and characterization. Human Body Model per MIL-STD-883, Method 3015, CDischarge = 100pF, RDischarge = 1.5KΩ, VP = 3.3V, VN grounded. Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330Ω, VP = 3.3V, VN grounded. These measurements performed with no external capacitor on VP (VP floating).
© 2006 California Micro Devices Corp. All rights reserved. 08/02/06
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Tel: 408.263.3214
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CM1223
Performance Information
Input Channel Capacitance Performance Curves
2
Input Capacitance (pF)
1.5
1
0.5
0
0
0.5
1
1.5
2
2.5
3
Input Voltage (V)
Typical Variation of CIN vs. VIN
(f=1MHz, VP = 3.3V, VN = 0V, 0.1 μF chip capacitor between VP and VN, 25°C)
1.25 1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80 0.75 -50 -25 0 25
Input Capacitance (pF)
0V DC Input Bias 1.65V DC Input Bias
50
75
100
Temperature (°C)
Typical Variation of CIN vs. Temp
(f=1MHz, VIN=30mV, VP = 3.3V, VN = 0V, 0.1 μF chip capacitor between VP and VN)
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CM1223
Performance Information (Cont’d)
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
TEST CIRCUIT P1 P2
VP (3.3v)
I/On GND
Figure 2. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V, MSOP-8 Package)
TEST CIRCUIT P1 P2
VP (3.3v)
I/On GND
Figure 3. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V, MSOP-8 Package)
© 2006 California Micro Devices Corp. All rights reserved. 08/02/06
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CM1223
Performance Information (Cont’d)
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
TEST CIRCUIT P1 P2
VP (3.3v)
I/On GND
Figure 4. Insertion Loss (S21) VS. Frequency (0V DC Bias, VP=3.3V, MSOP-10 Package)
TEST CIRCUIT P1 P2
VP (3.3v)
I/On GND
Figure 5. Insertion Loss (S21) VS. Frequency (2.5V DC Bias, VP=3.3V)
© 2006 California Micro Devices Corp. All rights reserved.
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490 N. McCarthy Blvd., Milpitas, CA 95035-5112
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CM1223
Application Information
Design Considerations
In order to realize the maximum protection against ESD pulses, care must be taken in the PCB layout to minimize parasitic series inductances on the Supply/ Ground rails as well as the signal trace segment between the signal input (typically a connector) and the ESD protection device. Refer to Figure 6, which illustrates an example of a positive 8kV ESD pulse striking an input channel. The 8kV ESD current pulse will divert along the path as indicated in Figure 4, through the D1 diode and the Zener diode back to the ground rail. An ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4 contact discharge per the IEC61000-4-2 standard results in a current pulse that rises from zero to 30 Amps in 1ns. The CM1223 has a fast response time of less than 1ns and low clamp voltage to handle this pulse. Similarly for negative ESD pulses, parasitic series inductance from the VN pin to the ground rail will lead to drastically increased negative voltage on the line being protected. The CM1223 has an integrated backdrive diode between VP and VN to prevent backdrive current flow from the powered sources. As a general rule, the ESD Protection Array should be located as close as possible to the point of entry of expected electrostatic discharges.
Additional Information
See also California Micro Devices Application Note AP209, “Design Considerations for ESD Protection”, in the Applications section at www.cmd.com.
VP
One Channel of CM1223
30A 0A
8kV ESD Pulse
POSITIVE SUPPLY
VCC
LINE BEING PROTECTED
PATH OF POSITIVE ESD CURRENT PULSE IESD
D1
I/O pin
PATH OF NEGATIVE ESD
D2
SYSTEM OR CIRCUITRY BEING
VN
GROUND RAIL
CHASSIS GROUND
Figure 6. Application of Positive ESD Pulse between Input Channel and Ground
© 2006 California Micro Devices Corp. All rights reserved. 08/02/06
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CM1223
Mechanical Details
The CM1223 is available in SOT143-4, SOT23-5, SOT23-6, and MSOP-10 packages with a lad-free finishing option. The various package drawings are presented below. SOT143 Mechanical Specifications Dimensions for CM1223-02SS/SR devices supplied in 4-pin SOT143 packages are presented below. For complete information on the SOT143, see the California Micro Devices SOT143 Package Information document.
1 2 4
Mechanical Package Diagrams
TOP VIEW e
3
E1 E
e1
PACKAGE DIMENSIONS
Package Pins Dimensions A A1 b b2 c D E E1 e e1 L L1 # per tape and reel Millimeters Min 0.80 0.05 0.30 0.76 0.08 2.80 2.10 1.20 Max 1.22 0.15 0.50 0.89 0.20 3.04 2.64 1.40 Min 0.031 0.002 0.012 0.030 0.003 0.110 0.082 0.047 SOT143 4 Inches Max 0.048 0.006 0.019 0.035 0.008 0.119 0.103 0.055 c
SIDE VIEW D A
b2
b
A1
END VIEW
1.92 BSC 0.20 BSC 0.4 0.6 0.54 REF
0.075 BSC 0.008 BSC 0.016 0.024 0.021 REF 3000 pieces
L1
L
Package Dimensions for SOT143.
Controlling dimension: millimeters
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CM1223
Mechanical Details (cont’d)
SOT23-5 Mechanical Specifications Dimensions for CM1223-02ST/SO devices packaged in 5-pin SOT23 packages are presented below. For complete information on the SOT23-5 package, see the California Micro Devices SOT23 Package Information document.
5
Mechanical Package Diagrams
TOP VIEW e1 e
4
PACKAGE DIMENSIONS
Package Pins Dimensions A A1 b c D E E1 e e1 L L1 # per tape and reel Millimeters Min -0.00 0.30 0.08 2.75 2.60 1.45 Max 1.45 0.15 0.50 0.22 3.05 3.00 1.75 Min -0.0000 0.0118 0.0031 0.1083 0.1024 0.0571 SOT23-5 (JEDEC name is MO-178) 5 Inches Max 0.0571 0.0059 0.0197 0.0087 0.1201 0.1181 0.0689 END VIEW SIDE VIEW D
1 2 3
E1 E
b
A
A1
0.95 BSC 1.90 BSC 0.30 0.60 0.60 REF
0.0374 BSC 0.0748 BSC 0.0118 0.0236 c L1 L 0.0236 REF 3000 pieces
Controlling dimension: millimeters
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CM1223
Mechanical Details (cont’d)
SOT23-6 Mechanical Specifications CM1223-04ST/SO devices are packaged in 6-pin SOT23 packages. Dimensions are presented below. For complete information on the SOT23-6 package, see the California Micro Devices SOT23 Package Information document.
6
Mechanical Package Diagrams
TOP VIEW
e1
5
e
4
PACKAGE DIMENSIONS
Package Pins Dimensions A A1 b c D E E1 e e1 L L1 # per tape and reel Millimeters Min -0.00 0.30 0.08 2.75 2.60 1.45 Max 1.45 0.15 0.50 0.22 3.05 3.00 1.75 Min -0.0000 0.0118 0.0031 0.1083 0.1024 0.0571 SOT23-6 (JEDEC name is MO-178) 6 Inches Max 0.0571 0.0059 0.0197 0.0087 0.1201 0.1181 0.0689
Pin 1 Marking
E1 E
1 2 3
b
SIDE VIEW
D A
A1
END VIEW
0.95 BSC 1.90 BSC 0.30 0.60 0.60 REF
0.0374 BSC 0.0748 BSC 0.0118 0.0236 c L1 L 0.0236 REF 3000 pieces
Controlling dimension: millimeters
Package Dimensions for SOT23-6.
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CM1223
Mechanical Details (cont’d)
MSOP-10 Mechanical Specifications CM1223-04MS/MR and CM1223-08MS/MR devices are packaged in 10-pin MSOP packages. Dimensions are presented below. For complete information on the MSOP-10 package, see the California Micro Devices MSOP Package Information document. Mechanical Package Diagrams
TOP VIEW
D
10 9 8 7 6
PACKAGE DIMENSIONS
Package Pins Dimensions A A1 B C D E e H L # per tape and reel 2.90 2.90 4.80 0.40 Millimeters Min 0.75 0.05 0.17 0.18 3.10 3.10 5.00 0.70 4000 Controlling dimension: millimeters 0.114 0.114 0.187 0.0137 Max 0.95 0.15 0.27 Min 0.028 0.002 0.007 MSOP 10 Inches Max 0.038 0.006 0.011 0.007 0.122 0.122 0.197 0.029
END VIEW 1 2 3 4 5
H
E
Pin 1 Marking
SIDE VIEW
A
SEATING PLANE
0.50 BSC
0.0196 BSC
A1 B e
C
L Package Dimensions for MSOP-10
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