CM3112-12SO

PRELIMINARY CM3112 150mA/1.2V CMOS LDO Regulator with Power Good Features • • • • • • • • • • • • LDO regulator with Power Good No capacitor required on the LDO output Power Good (PG) control signal Regulated 1.2V output 150mA output current Low quiescent operating current (90µA typical) "Zero" disable mode current Foldback current limiting protection Thermal shutdown protection SOT23-5 package Micrel MIC5258, MIC5268 compatible pinout Lead-free version available Product Description The CM3112-12 is a low quiescent current (90uA) regulator that delivers up to 150mA of load current at a fixed 1.2V output. All the necessary circuitry has been included to deliver a 50Ω power good signal (open drain) which remains for 5ms after the output has exceeded 90% (typ) of its nominal level. A dedicated control input (EN, Active High) has been included for power-up sequencing flexibility. When this input is taken low, the regulator is disabled. In this state, the supply current will drop to near zero. An internal discharge MOSFET (500Ω) resistance will force the output to ground whenever the device has been shutdown. The CM3112-12 is fully protected, offering both overload current limiting and high temperature thermal shutdown. Housed in a tiny SOT23 package, the device is ideal for space critical applications and is also available with optional lead-free finishing. Applications • • • Pentium 4 Motherboards PC Cards Peripheral Adapter Cards Typical Application Circuit Simplified Electrical Schematic IN 1.2V/150mA OUT 1kΩ EN CM3112-12 VIN EN 0.1µF* GND IN EN GND 0.1µF* OUT PG VOUT PG VREF 1.2V + - + VREF X 0.93 2.5ms PG 1X * Optional GND © 2004 California Micro Devices Corp. All rights reserved. 01/20/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com 1 PRELIMINARY CM3112 PACKAGE / PINOUT DIAGRAM Top View IN 1 5 OUT FA12/FB12 GND 2 EN 3 4 PG 5-pin SOT23 Note: This drawing is not to scale. PIN DESCRIPTIONS PIN 1 NAME IN DESCRIPTION Positive input voltage for the regulator. The internal loading on this input is typically 300µA whenever the regulator is enabled, and less than 10µA when the regulator is disabled. If the IN pin is within a few inches of the main input filter, a capacitor may not be necessary. Otherwise an input filter capacitor (CIN) of 0.1uF to 1uF will ensure adequate filtering. The negative reference for all voltages. Enable/shutdown input. When EN is asserted high (VEN ≥ 1.6V), the regulator is enabled. When EN is asserted low (VEN ≤0.4V), the regulator’s series pass transistor is forced into a high impedance mode and an internal discharge resistance (500Ω) is applied to the output to quickly reduce the output voltage to 0 volts. 4 PG Power Good output. This is an open drain output and functions as a supply voltage supervisor for the output voltage. It is asserted low when the output falls below 84% of its nominal value. This output becomes inactive when (EN > 1.5V), (2.5V < VIN < 5.5V) and (VOUT > 97% of VOUTNOM), all of which are valid for more than 1-10ms. The regulated voltage output. Although an output capacitor is not necessary for stable regulator operation, a optional 0.1uF capacitor can be used to provide an added measure of output stability. 2 3 GND EN 5 OUT Ordering Information PART NUMBERING INFORMATION Standard Finish Ordering Part Regulator CM3112-12 Pins 5 Package SOT23-5 Number1 CM3112-12ST Part Marking FA12 Lead-free Finish Ordering Part Number1 CM3112-12SO Part Marking FB12 Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. © 2004 California Micro Devices Corp. All rights reserved. 2 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com 01/20/04 PRELIMINARY CM3112 Specifications ABSOLUTE MAXIMUM RATINGS PARAMETER ESD Protection (HBM) Pin Voltages VIN VOUT VEN Storage Temperature Range Operating Temperature Range Ambient Junction Power Dissipation (See note 1) RATING +2000 [GND - 0.6] to +6.0 [GND - 0.6] to [VIN+0.6] [GND - 0.6] to [VIN+0.6] -40 to +150 0 to +70 0 to +150 Internally Limited UNITS V V V V °C °C °C W Note 1: The power rating is based on a printed circuit board heat spreading capability equivalent to 2 square inches of copper connected to the GND pins. Typical multi-layer boards using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. Please consult with factory for thermal evaluation assistance. STANDARD OPERATING CONDITIONS PARAMETER VIN Ambient Operating Temperature Range Load Current COUT VALUE 2.5 to 5.5 0 to +70 0 to 150 0 to 10 UNITS V °C mA µF © 2004 California Micro Devices Corp. All rights reserved. 01/20/04 430 N. McCarthy Blvd., Milpitas, CA 95035-5112 L Tel: 408.263.3214 L Fax: 408.263.7846 L www.calmicro.com 3 PRELIMINARY CM3112 ELECTRICAL OPERATING CHARACTERISTICS (SEE NOTE 1) SYMBOL VOUT VOUT VR LOAD VR LINE RDROP ILIM ISC RDISCH IGND PARAMETER Output Voltage Accuracy Output Voltage Load Regulation Line Regulation xx Dropout Resistance Overload Current Limit Short Circuit Current Limit Discharge Resistance Ground Current VOUT < 0.5V EN tied to GND Regulator Enabled (EN=VIN); ILOAD= 0mA Regulator Enabled (EN=VIN); ILOAD= 150mA Regulator Disabled (EN=GND); (Disable Mode) 1.6 0.4 0.01 % of VOUT (PG ON) % of VOUT (PG OFF) IL= 2mA; Fault Condition Power Good Off; VPG = 5.5V 2.5V < VIN < 5.5V (applies to DPGD only) 1 0.05 0.01 84 97 0.1 50 10 1 10 CONDITIONS ILOAD = 5mA, VIN = 3.3V 5mA < ILOAD < 150mA, 3.135V < VIN < 5.5V 5mA < ILOAD < 100mA ILOAD = 5mA; 2.5V < VIN < 5.5V VIN = 2.7V 160 400 150 500 90 100 0.01 150 200 10 MIN -2 -3 -4 -5 TYP MAX 2 3 4 5 0.5 0.7 0.1 0.15 10 UNITS % % % % % % %/V %/V Ω mA mA Ω µA µA µA V V µA % % V µA mS mS VEN VDIS IEN VPGL VPGH VOL IPG DPGD DPGA EN Input Logic High Threshold Regulator Enabled, VIN = 5.5V EN Input Logic Low Threshold Enable Input Current Power Good Low Threshold Power Good High Threshold Power Good Logic "0" Voltage Power Good Leakage Current Power Good Delay Time To de-assert PG To assert PG Regulator Disabled, VIN = 5.5V Note 1: Bold values indicate 0 °C < TJ