CMPWR101SR

CALIFORNIA MICRO DEVICES CMPWR101 250mA SmartORTM Regulator with VAUX Switch Features • Automatic detection of V CC input supply • Glitch-free output during supply transitions • Built-in hysteresis during supply selection • 250mA output maximum load current • Fully integrated VAUX switch • Overload current protection • Short circuit current protection • Operates from either VCC or V AUX • 8-pin SOIC package Applications • PCI adapter cards • Network Interface Cards (NIC’s) • Dual power systems • Systems with standby capabilities Product Description The California Micro Devices’ SmartORTM CMPWR101 is a low dropout regulator that delivers up to 250mA of load current at a fixed 3.3V output. An internal threshold level (typically 4.1V) is used to prevent the regulator from being operated below dropout voltage. The device continuously monitors the input supply and will automatically disable the regulator when VCC falls below the threshold level. When the regulator is disabled, a low impedance, fully integrated switch is enabled which allows the output to be directly powered from an auxiliary 3.3V supply. When VCC is restored to a level above the select threshold, the low impedance switch is disabled and the regulator is once again enabled. All the necessary control circuitry needed to provide a smooth and automatic transition between the supplies has been incorporated. This allows VCC to be dynamically switched without loss of output voltage. An output logic signal, DRIVE, is active LOW whenever the internal regulator is disabled. PIN DIAG RAM AND APPLI C ATI O N C IR CU I T Top View VCC VAUX VAUX GND 1 2 3 4 8 7 6 5 DRIVE VOUT VOUT NC + CMPWR101 VCC CIN 1µF + DRIVE VOUT 3.3V 250mA VCC 5V + – VAUX VOUT GND VAUX – 3.3V + COUT 4µF GND CMPWR101 8-Pin SOIC Pin Diagram Typical Application Circuit S TANDARD PART O RDERIN G I NF O RMATI ON Packa g e Pins 8 Style SOIC Orderin g Part Numbe r Tubes Tape & Reel CMPWR101S/T CMPWR101S/R Part Marking CMPWR101S © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation. C1660101 215 Topaz Street, Milpitas, California 95035  3/6/2001 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 1 CALIFORNIA MICRO DEVICES AB SO L U TE MAXIM U M RATIN GS Parameter ESD Protection (HBM) VCC, VOUT Voltages Drive Logic Voltage VAUX Input Voltage Temperature: Storage Operating Ambient Operating Junction Power Dissipation (Note 1) Rating 2000 6.0, GND – 0.5 V CC + 0 .5, GND – 0.5 4.0, GND – 0.5 – 40 to 150 0 to 70 0 to 125 0 .5 Unit V V V V ˚C ˚C ˚C W CMPWR101 O PERATIN G C O NDITI O N S Parameter VCC VAUX Temperature (Ambient) Load Current CEXT Range 5 ± 0.5 3.3 ± 0.3 0 to 70 0 to 250 4.7 ± 20% Unit V V ˚C mA µF ELE C TRI C AL O PERATIN G C HARAC TERI S TI CS (over operatin g c onditions unless specified otherwise ) S y mbol VOUT ILIM VCCSEL VCCDES VCCHYST VR LOAD VR LINE RSWITCH IRCC IRAUX IGND Pa r a m e t e r Regulator Output Voltage Regulator Current Limit Select Voltage Deselect Voltage Hysteresis Voltage (Note 2) Load Regulation Line Regulation Auxiliary Switch Resistance VCC Pin Reverse Leakage VAUX Pin Reverse Leakage Ground Current Regulator Enabled Regulator Disabled Hysteresis VCC = 5V, ILOAD = 5 to 250mA VCC = 4.5V to 5.5V, ILOAD = 5mA VCCDES > VCC, VAUX = 3.3V VAUX = 3.3V, VCC = 0V VAUX = 0V, VCC = 5V VCC < VCCDES, ILOAD = 0mA VCC > VCCSEL, ILOAD = 0mA VCC > VCCSEL, ILOAD = 250mA IAUX ROH ROL VAUX Supply Current Drive Pull-up Resistance Drive Pull-down Resistance VAUX > VCC VCC > VAUX RPULLUP to VCC, VCC > VCCSEL RPULLDOWN to GND, VCCDES > VCC 3.90 C onditions 0mA < ILOAD < 250mA MIN 3.135 275 4.30 4.10 0.20 20 2 0.25 2 2 0.2 0.6 0.7 0.2 0.02 4.0 0.1 0.4 50 50 0.4 1.0 1.2 0.4 0.1 8.0 0.4 4.45 TYP 3.30 MAX 3.465 U NI T V mA V V V mV mV Ω µA µA mA mA mA mA mA kΩ kΩ Note 1: The power rating is based on a printed circuit board heat spreading capability equivalent to 2 square inches of copper connected to the GND pins. Typical multi-layer boards using power plane construction will provide this heat spreading ability without the need for additional dedicated copper area. (Please consult with factory for thermal evaluation assistance). Note 2: The hysteresis defines the maximum level of acceptable disturbance on VCC during switching. It is recommended that the VCC source impedance be kept below 0.25Ω to ensure the switching disturbance remains below the hysteresis during select/deselect transitions. An input capacitor may be required to help minimize the switching transient. ©2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation. 2 215 Topaz Street, Milpitas, California 95035  Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3/6/2001 CALIFORNIA MICRO DEVICES Interface Signals VCC is the power source for the internal regulator and is monitored continuously by an internal controller circuit. Whenever VCC exceeds VCCSEL (4.25V typically), the internal regulator will be enabled and deliver a fixed 3.3V at VOUT. When VCC falls below VCCDES (4.10V typically), the regulator will be disabled. Internal loading on this pin is typically 0.6mA when the regulator is enabled, which reduces to 0.1mA whenever the regulator is disabled. If VCC falls below the voltage on the VAUX pin, the VCC loading will further reduce to only a few microamperes. During a VCC power-up or power-down sequence, there will be an effective step increase in VCC line current when the regulator is enabled/disabled. This line current transient will cause a voltage disturbance at the VCC pin. The magnitude of the disturbance will be directly proportional to the effective power supply source impedance being delivered to the VCC input. A built-in hysteresis voltage of 150mV has been incorporated to minimize any chatter during supply changeover. It is recommended that the power supply connected to the VCC input should have a source resistance of less than 0.25Ω to minimize the event of chatter during the enabling/disabling of the regulator. If the VCC pin is within a few inches of the main input filter, a capacitor may not be necessary. Otherwise an input filter capacitor in the range of 1µF to 10µF will help to lower the effective source impedance. CMPWR101 VAUX is the auxiliary power source. When selected, (VCC < VCCDES), the auxiliary supply is directly connected to VOUT, via the low impedance (0.3Ω typically) fully integrated switch. The internal loading on this pin is typically less than 10µA and will increase to 100µA if VCC falls below the voltage on VAUX. When VAUX = 0V, the VCCDES voltage is inhibited which prevents the regulator from being disabled. VOUT is the regulator output voltage connection used to power the load. An output capacitor of 4.7µF is used to provide the necessary phase compensation, thereby preventing oscillation. The capacitor also helps to minimize the peak output disturbance during power supply changeover. DRIVE is a CMOS output logic signal (Active Low) referenced to the VCC supply. This output is taken low whenever the internal regulator is not enabled. This output is intended only as a control signal for external circuitry. GND is the negative reference for all voltages. The current that flows in the ground connection is very low (typically 0.6mA) and has minimal variation over all load conditions. NC is an unconnected pin which is electrically isolated from the internal circuitry. PIN F U N C TI O N S Pin 1 2, 3 6, 7 8 4 5 Symbol VCC VAUX VOUT DRIVE GND NC Description Positive (5V) supply input for regulator. (VCC > VCCSEL) Auxiliary supply input is connected directly to the output via a low impedance when the regulator is disabled. Continuous output voltage (3.3V) is derived from either the internal regulator or low impedance switch connected to the auxiliary supply input. Output Control Signal which is taken LOW whenever VCC is unavailable Negative reference for all voltages Unconnected pin which is electrically isolated from internal circuitry. VCC + – DRIVE VDESELECT 4.1V 0.2Ω VAUX 3.3V GND VREF 3.3V + – ENABLE VOUT 3.3V 250mA Simplified Electrical Schematic © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation. 215 Topaz Street, Milpitas, California 95035  3/6/2001 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3 CALIFORNIA MICRO DEVICES Typical DC Characteristics (nominal conditions unless specified otherwise) CMPWR101 0.8 0.7 0.34 0.32 Resistance (Ω) VCC Supply Current (µA) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 1 2 3 4 5 6 VCC Supply Voltage (V) 0.30 0.28 0.26 0.24 0.22 0.20 2.7 3.0 3.3 3.6 Auxiliary Supply Voltage (V) Figure 1. Supply Current vs Voltage (VAUX = 3.3V) Figure 2. Switch Resistance vs Supply Voltage 0.8 0.7 3.40 3.35 Ground Current (mA) 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 100 200 Load Current (mA) 300 Regulator Output (V) 5mA Load 3.30 3.25 3.20 3.15 3.10 3.0 250mA Load 3.5 4.0 4.5 5.0 5.5 Supply Voltage (V) Figure 3. Ground Current vs Output Load Figure 4. Line Regulation (1% and 100% rated load) 3.33 3.32 3.31 VOUT (V) 1.2 1.0 0.8 VOUT (V) 0 100 200 Load Current (mA) 300 400 3.30 3.29 3.28 3.27 3.26 3.25 0.6 0.4 0.2 0.0 0 100 200 Load Current (mA) 300 400 Figure 5. Load Regulation 215 Topaz Street, Milpitas, California 95035  Figure 6. Dropout Voltage with Load Current Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3/6/2001 ©2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation. 4 CALIFORNIA MICRO DEVICES Typical Transient Characteristics (Supply source resistance set to 0.2Ω) Tek Run: 25kS/s Sample Tek Run: 25kS/s Sample CMPWR101 Drive Drive 3 VCC VOUT VOUT 3 VCC (200mA Load) (VAUX = 0V) (200mA Load) (VAUX = 0V) Ch2 M 2ms Ch1 4.66V Ch3 1V 5V Ch2 1V M 2ms Ch1 500mV Ch3 1V 5V 1V Figure 7. VCC Cold start Power Up (VAUX = 0V) Tek 2.5MS/s 1 Acqs Figure 8. VCC Complete Power Down (VAUX = 0V) Tek 2.5MS/s 1 Acqs Drive 3 3 Drive VCC (offset = 4.3V) 2 2 VCC (offset = 4.3V) VOUT (offset = 3.3V) VOUT (offset = 3.3V) Ch3 100mV 5V Ch2 100mV M 20µs Ch1 2.5V Ch3 100mV 5V Ch2 100mV M 20µs Ch3 2.5V Figure 9. VCC Power up (VAUX = 3.3V) Tek 5MS/s 3 Acqs Figure 10. VCC Power Down (VAUX = 3.3V) Tek 1MS/s VCC (offset = 5.0V) 1V Step(4.5V to 5.5V) 2 1 Acqs 25mA to 225mA Load Step 2 VCC (offset = 3.3V) VOUT (offset = 3.3V) (5mA Load) 20mV Ch2 2V M 20µs Ch2 2.08V 20mV Ch2 500mV M 100µs Ch2 5.01V Figure 11. Load Transient (10% to 90%) Step Response 215 Topaz Street, Milpitas, California 95035  3/6/2001 Figure 12. Line Transient (1Vpp) Step Response Fax: (408) 263-7846 www.calmicro.com © 2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation. Tel: (408) 263-3214 5 CALIFORNIA MICRO DEVICES Typical Thermal Characteristics Full Load Output Voltage (V) CMPWR101 3.300 3.298 3.296 3.294 3.292 3.290 3.288 3.286 3.284 20 30 40 50 60 70 The overall junction to ambient thermal resistance (θJA) for device power dissipation (PD) consists primarily of two paths in series. The first path is the junction to the case (θJC) which is defined by the package style, and the second path is case to ambient (θCA) thermal resistance which is dependent on board layout. The final operating junction temperature for any set of conditions can be estimated by the following thermal equation: TJUNC = TAMB + PD (θJC ) + PD (θCA ) = TAMB + PD (θJA) The CMPWR101 uses a standard SOIC package. When this package is mounted on a double sided printed circuit board with two square inches of copper allocated for “heat spreading”, the resulting overall θJA is 85°C/W. Based on maximum power dissipation of 0.43W (1.7V x 250mA) with an ambient of 70°C the resulting junction temperature will be: TJUNC = TAMB + PD (θJA ) = 70°C + 0.43W (80°C/W) = 70°C + 37°C = 103°C Thermal characteristics were measured using a double sided board with two square inches of copper area connected to the GND pins for “heat spreading”. Measurements showing performance up to junction temperature of 125°C were performed under light load conditions (5mA). This allows the ambient temperature to be representative of the internal junction temperature. Note: The use of multi-layer board construction with power planes will further enhance the thermal performance of the package. In the event of no copper area being dedicated for heat spreading, a multi-layer board construction, using only the minimum size pad layout, will typically provide the CMPWR101 with an overall θJA of 100°C/W, which allows up to 0.5W to be safely dissipated. Ambient Temperature (˚C) Figure 13. Regulator VOUT vs TAMB (250mA Load) 4.18 Deselect Voltage Level (V) 4.16 4.14 4.12 4.10 4.08 25 50 75 100 125 Junction Temperature (˚C) Figure 14. Deselect Threshold vs TJUNCT 0.36 0.34 0.32 Resistance (Ω) 0.30 0.28 0.26 0.24 0,22 0.20 20 30 40 50 60 70 Ambient Temperature (˚C) Figure 15. Switch Resistance vs Ambient Temperature ©2001 California Micro Devices Corp. All rights reserved. SmartOR™ is a trademark of California Micro Devices Corporation. 6 215 Topaz Street, Milpitas, California 95035  Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 3/6/2001