24WC16

CAT24WC01/02/04/08/16 1K/2K/4K/8K/16K-Bit Serial E2PROM FEATURES s 400 KHZ I C Bus Compatible* s 1.8 to 6.0Volt Operation s Low Power CMOS Technology s Write Protect Feature 2 s Self-Timed Write Cycle with Auto-Clear s 1,000,000 Program/Erase Cycles s 100 Year Data Retention s 8-pin DIP, 8-pin SOIC or 8 pin TSSOP s Commercial, Industrial and Automotive — Entire Array Protected When WP at VIH s Page Write Buffer Temperature Ranges DESCRIPTION The CAT24WC01/02/04/08/16 is a 1K/2K/4K/8K/16Kbit Serial CMOS E2PROM internally organized as 128/ 256/512/1024/2048 words of 8 bits each. Catalyst’s advanced CMOS technology substantially reduces device power requirements. The the CAT24WC01/02/04/ 08/16 feature a 16-byte page write buffer. The device operates via the I2C bus serial interface, has a special write protection feature, and is available in 8-pin DIP, 8pin SOIC or 8-pin TSSOP. PIN CONFIGURATION DIP Package (P) A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA BLOCK DIAGRAM SOIC Package (J) EXTERNAL LOAD A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA 5020 FHD F01 DOUT ACK VCC VSS WORD ADDRESS BUFFERS SENSE AMPS SHIFT REGISTERS COLUMN DECODERS TSSOP Package (U) (* Available for 24WC01 and 24WC02 only) SDA START/STOP LOGIC A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA XDEC WP CONTROL LOGIC E2PROM PIN FUNCTIONS Pin Name A0, A1, A2 SDA SCL WP VCC VSS Function Device Address Inputs Serial Data/Address Serial Clock Write Protect +1.8V to +6.0V Power Supply Ground SCL A0 A1 A2 STATE COUNTERS SLAVE ADDRESS COMPARATORS 24WCXX F03 DATA IN STORAGE HIGH VOLTAGE/ TIMING CONTROL * Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol. © 1999 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice 1 Doc. No. 25051-00 3/98 S-1 CAT24WC01/02/04/08/16 ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................. –55°C to +125°C Storage Temperature ....................... –65°C to +150°C Voltage on Any Pin with Respect to Ground(1) ........... –2.0V to +VCC + 2.0V VCC with Respect to Ground ............... –2.0V to +7.0V Package Power Dissipation Capability (Ta = 25°C) .................................. 1.0W Lead Soldering Temperature (10 secs) ............ 300°C Output Short Circuit Current(2) ........................ 100mA RELIABILITY CHARACTERISTICS Symbol NEND(3) TDR (3) *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Parameter Endurance Data Retention ESD Susceptibility Latch-up Min. 1,000,000 100 2000 100 Max. Units Cycles/Byte Years Volts mA Reference Test Method MIL-STD-883, Test Method 1033 MIL-STD-883, Test Method 1008 MIL-STD-883, Test Method 3015 JEDEC Standard 17 VZAP(3) ILTH(3)(4) D.C. OPERATING CHARACTERISTICS VCC = +1.8V to +6.0V, unless otherwise specified. Limits Symbol ICC ISB (5) Parameter Power Supply Current Standby Current (VCC = 5.0V) Input Leakage Current Output Leakage Current Input Low Voltage Input High Voltage Output Low Voltage (VCC = 3.0V) Output Low Voltage (VCC = 1.8V) Min. Typ. Max. 3 0 10 10 Units mA µA µA µA V V V V Test Conditions fSCL = 100 KHz VIN = GND or VCC VIN = GND to VCC VOUT = GND to VCC ILI ILO VIL VIH VOL1 VOL2 –1 VCC x 0.7 VCC x 0.3 VCC + 0.5 0.4 0.5 IOL = 3 mA IOL = 1.5 mA CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V Symbol CI/O(3) CIN(3) Test Input/Output Capacitance (SDA) Input Capacitance (A0, A1, A2, SCL, WP) Max. 8 6 Units pF pF Conditions VI/O = 0V VIN = 0V Note: (1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V. (5) Standby Current (ISB) = 0µA (