CA24WC128U14A-1.8TE13

Preliminary CAT24WC128 128K-Bit I2C Serial CMOS E2PROM FEATURES s 1MHz I2C Bus Compatible* s 1.8 to 6 Volt Operation s Low Power CMOS Technology s 64-Byte Page Write Buffer s Self-Timed Write Cycle with Auto-Clear s Commercial, Industrial and Automotive s Write Protect Feature – Entire Array Protected When WP at VIH s 100,000 Program/Erase Cycles s 100 Year Data Retention s 8-Pin DIP, 8-Pin SOIC or 14-pin TSSOP Temperature Ranges DESCRIPTION The CAT24WC128 is a 128K-bit Serial CMOS E2PROM internally organized as 16384 words of 8 bits each. Catalyst’s advanced CMOS technology substantially reduces device power requirements. The CAT24WC128 features a 64-byte page write buffer. The device operates via the I2C bus serial interface and is available in 8-pin DIP, 8-pin SOIC or 14-pin TSSOP packages. PIN CONFIGURATION DIP Package (P) NC NC NC VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA BLOCK DIAGRAM EXTERNAL LOAD TSSOP Package (U14) NC NC NC NC 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC WP NC NC NC SCL SDA DOUT ACK VCC VSS WORD ADDRESS BUFFERS SENSE AMPS SHIFT REGISTERS COLUMN DECODERS 512 SOIC Package (J,K) NC NC NC VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA NC NC VSS SDA START/STOP LOGIC XDEC WP CONTROL LOGIC 256 E2PROM 256X512 24WC128 F01 PIN FUNCTIONS Pin Name SDA SCL WP VCC VSS Function Serial Data/Address Serial Clock Write Protect +1.8V to +6V Power Supply SCL STATE COUNTERS HIGH VOLTAGE/ TIMING CONTROL DATA IN STORAGE Ground 24WC128 F02 * Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol. © 1999 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice 1 Doc. No. 25060-00 6/99 S-1 CAT24WC128 Preliminary ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................. –55°C to +125°C Storage Temperature ....................... –65°C to +150°C Voltage on Any Pin with Respect to Ground(1) ........... –2.0V to +VCC + 2.0V VCC with Respect to Ground ............... –2.0V to +7.0V Package Power Dissipation Capability (Ta = 25°C) ................................... 1.0W Lead Soldering Temperature (10 secs) ............ 300°C Output Short Circuit Current(2) ........................ 100mA RELIABILITY CHARACTERISTICS Symbol NEND TDR VZAP (3) (3) (3) *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Parameter Endurance Data Retention ESD Susceptibility Latch-up Min. 100,000 100 2000 100 Max. Units Cycles/Byte Years Volts mA Reference Test Method MIL-STD-883, Test Method 1033 MIL-STD-883, Test Method 1008 MIL-STD-883, Test Method 3015 JEDEC Standard 17 ILTH(3)(4) D.C. OPERATING CHARACTERISTICS VCC = +1.8V to +6.0V, unless otherwise specified. Limits Symbol ICC1 ICC2 ISB(5) ILI ILO VIL VIH VOL1 VOL2 Parameter Power Supply Current - Read Power Supply Current - Write Standby Current Input Leakage Current Output Leakage Current Input Low Voltage Input High Voltage Output Low Voltage (VCC = +3.0V) Output Low Voltage (VCC = +1.8V) –1 VCC x 0.7 Min. Typ. Max. 1 3 0 3 3 VCC x 0.3 VCC + 0.5 0.4 0.5 Units mA mA µA µA µA V V V V IOL = 3.0 mA IOL = 1.5 mA Test Conditions fSCL = 100 KHz VCC=5V fSCL = 100 KHz VCC=5V VIN = GND or VCC VCC=5V VIN = GND to VCC VOUT = GND to VCC CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V Symbol CI/O(3) CIN(3) Test Input/Output Capacitance (SDA) Input Capacitance (SCL, WP) Max. 8 6 Units pF pF Conditions VI/O = 0V VIN = 0V Note: (1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V. (5) Standby current (ISB ) = 0 µA (