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CAT24WC05J-1.8TE13

CAT24WC05J-1.8TE13

  • 厂商:

    CATALYST

  • 封装:

  • 描述:

    CAT24WC05J-1.8TE13 - 2K/4K-Bit Serial EEPROM with Partial Array Write Protection - Catalyst Semicond...

  • 详情介绍
  • 数据手册
  • 价格&库存
CAT24WC05J-1.8TE13 数据手册
CAT24WC03/05 2K/4K-Bit Serial EEPROM with Partial Array Write Protection FEATURES s 400 kHz I2C bus compatible* s 1.8 to 5.5 volt operation s Low power CMOS technology s Write protect feature s Self-timed write cycle with auto-clear s 1,000,000 Program/Erase cycles s 100 Year data retention s 8-pin DIP, 8-pin SOIC, 8-lead MSOP and 8-pin TSSOP Package temperature ranges –Top 1/2 array protected when WP at VIH s 16-Byte page write buffer s Commercial, industrial and automotive s "Green" package options available DESCRIPTION The CAT24WC03/05 is a 2K/4K-bit Serial CMOS EEPROM internally organized as 256/512 words of 8 bits each. Catalyst’s advanced CMOS technology substantially reduces device power requirements. The PIN CONFIGURATION DIP Package (P, L, GL) A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC WP SCL SDA MSOP Package (R, Z, GZ) A0 A1 A2 VSS 1 2 3 4 8 7 6 5 VCC A0 WP A1 SCL A2 SDA VSS TSSOP Package (U, Y, GY) 1 2 3 4 8 7 6 5 PIN FUNCTIONS Pin Name A0, A1, A2 SDA SCL WP VCC VSS i D c s Serial Clock Ground i t n o A0 A1 A2 VSS 1 2 3 4 8 7 6 5 SOIC Package (J, W, GW) VCC WP SCL SDA u n VCC VSS VCC WP SCL SDA SDA WP CAT24WC03/05 features a 16-byte page write buffer. The device operates via the I2C bus serial interface, has a special write protection feature, and is available in 8pin DIP or 8-pin SOIC packages. BLOCK DIAGRAM EXTERNAL LOAD DOUT ACK SENSE AMPS SHIFT REGISTERS d e a P ts r COLUMN DECODERS WORD ADDRESS BUFFERS START/STOP LOGIC XDEC CONTROL LOGIC E2PROM Function DATA IN STORAGE Device Address Inputs Serial Data/Address HIGH VOLTAGE/ TIMING CONTROL SCL A0 A1 A2 STATE COUNTERS SLAVE ADDRESS COMPARATORS Write Protect +1.8V to +5.5V Power Supply * Catalyst Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol. © 2005 by Catalyst Semiconductor, Inc. Characteristics subject to change without notice 1 Doc. No. 1005, Rev. F CAT24WC03/05 ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................. –55°C to +125°C Storage Temperature ....................... –65°C to +150°C Voltage on Any Pin with Respect to Ground(1) ........... –2.0V to +VCC + 2.0V VCC with Respect to Ground ............... –2.0V to +7.0V Package Power Dissipation Capability (Ta = 25°C) .................................. 1.0W Lead Soldering Temperature (10 secs) ............ 300°C Output Short Circuit Current(2) ........................ 100mA RELIABILITY CHARACTERISTICS Symbol NEND(3) TDR (3) (3) *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. Parameter Endurance Data Retention ESD Susceptibility Latch-up Min. 1,000,000 100 2000 100 Max. VZAP ILTH(3)(4) D.C. OPERATING CHARACTERISTICS VCC = +1.8V to +5.5V, unless otherwise specified. Symbol ICC IS(5) ILI ILO VIL VIH VOL1 VOL2 Parameter Power Supply Current Standby Current (VCC = 5.0V) Input Leakage Current Output Leakage Current Input Low Voltage Input High Voltage CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V Symbol CI/O(3) CIN(3) Test Max 8 6 Units pF pF Conditions VI/O = 0V VIN = 0V Input/Output Capacitance (SDA) Input Capacitance (A0, A1, A2, SCL, WP) Note: (1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC-Q100 and JEDEC test methods. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V. (5) Standby Current (ISB) = 0µA (
CAT24WC05J-1.8TE13
### 物料型号 - CAT24WC03/05:这是2K/4K位串行EEPROM,具有部分数组写保护功能。

### 器件简介 - CAT24WC03/05是基于CMOS技术的2K/4K位串行EEPROM,内部组织为256/512个8位字。该器件通过I²C总线串行接口工作,具有特殊的写保护功能,并提供8引脚DIP或8引脚SOIC封装。

### 引脚分配 - A0, A1, A2:设备地址输入。 - SDA:串行数据/地址。 - SCL:串行时钟。 - WP:写保护。 - Vcc:+1.8V至+5.5V电源供电。 - Vss:地。

### 参数特性 - 工作电压:1.8V至5.5V。 - 工作频率:400kHz I²C总线兼容。 - 写周期:自动清除,1,000,000次编程/擦除周期。 - 数据保持:100年。 - 温度范围:商业、工业和汽车温度范围。

### 功能详解 - 页写缓冲区:具有16字节的页写缓冲区。 - 写保护功能:WP引脚高电平时,内存数组的上半部分被写保护(只读)。 - I²C总线协议:支持I²C总线数据传输协议,作为从设备工作。

### 应用信息 - 应用领域:商业、工业和汽车电子领域。 - 封装选项:8引脚DIP、8引脚SOIC、8引脚MSOP和8引脚TSSOP封装。 - 环保选项:提供“绿色”封装选项。

### 封装信息 - DIP封装:8引脚300 mil宽塑料DIP。 - SOIC封装:8引脚150 mil宽SOIC。 - MSOP封装:8引脚MSOP。 - TSSOP封装:8引脚TSSOP。
CAT24WC05J-1.8TE13 价格&库存

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