THEVA12LVDR1020

FI-X30HL Copyright© 2011 THine Electronics Electronics, Inc Inc. SW404 SW401 JAE ↓ ･ ･ ･ ･ ･ 1/5 TxMODE1 E1 TxMODE0 E0 E2 TxMODE2 NC TxASYNC WN TxPDWN BS TxPRBS T1 TxTEST1 RES330 R442 R443 RES442 RES424 RES426 RES428 RES431 RES432 RES433 RES434 RES435 RES416 RES418 RES420 RES422 RES417 RES419 RES417 RES421 RES423 RES425 RES427 FI-X30HL SW403 TxRF RF TxRS RS RS TxRS RS TxRS TxMODE3 E3 AP TxMAP RxMAP AP RxMD2 D2 RxOE1 E1 RxRF1 F1 N/C /C N/C /C RxDK1 K1 RxDK1 K1 RxDK1 K1 RxMD1DK2 K2 RxMD0RF2 F2 RxPDWN WN 120mm RES429 RES414 RES406 RES405 RES404 RES403 RES402 RES401 RES407 RES408 RES409 RES410 RES411 RES412 RES413 THEVA12LVDR1020 Mode Setting & LVDS-Cable THine Electronics, Inc. 2011/04/14 Description t=1.6mm 120mm GND FI-X30SSL-HF +12V THC63LVD1024 RES415 THC63LVD1023B FI-X30SSL-HF ←Low ←High SW402 LVDS-Cable Type. yp JAE ↓ 200mm THEVA12LVDR1020 manual Rev 1 00 E THEVA12LVDR1020_manual_Rev.1.00_E THine Electronics, Inc. THEVA12LVDR1020 Mode Setting & LVDS-Cable 2011/04/14 SW401 Setting SW Pin# * NodeName Def. 1 H 2 L TxRF * Def. : Default Setting THC63LVD1023B IC Pin# PinName 21 R/F Description Triggering IInputt Clock Cl k T i i Edge Ed Select. S l t H : Rising edge, L : Falling edge LVDS swing mode, VREF select. 3 H 4 H 5 L TxRS 22 2 SW-Pin# 3 4 L H(open) H(open) H(open) RS LVDS Swing Small Swing Input Support H(open) VIHM 350mV N/A L H(open) VIMM 350mV RS=VREFa H(open) L VILM 200mV N/A RS a) VREF is Input Reference Voltage. TxMODE3 23 MODE3 Input port switching function enable when MODE=HL(Single-in/Dual-out Mode). H or Open: Port switch disable. L: Port switch enable. LVDS mapping table select. 6 7 8 L H TxMAP 24 6 SW-Pin# 7 8 L H(open) H(open) H(open) RS Mapping Mode H(open) VIHM Mapping MODE1 L H(open) VIMM Mapping MODE2 H(open) L VILM Mapping MODE3 MAP H SW402 Setting SW Pin# 1 2 * NodeName Def. H H TxMODE1 TxMODE0 * Def. : Default Setting THC63LVD1023B IC Pin# PinName 25 MODE1 26 Description Pixel Data Mode. MODE1 MODE0 H H Single Link(Single-in/Single-out) H L Single Link(Single-in/Dual-out) L H Dual Link(Dual-in/Single-out) L L Dual D l Link(Dual-in/Single-out) Li k(D l i /Si l t) Mode MODE0 3 L TxMODE2 27 MODE2 The use of these multi-function depends on the setting of MODE or ASYNC. ASYNC=H(MODE=Don't care.) H: Cross point switching enable. L: Cross point switching disable. ASYNC=L MODE=HH(Single-in/Single-out Mode) H: Distribution function enable. L: Distribution function disable. MODE=HL(Single-in/Dual-out MODE HL(Single in/Dual out Mode) H: DDR (Double Edge input) function enable. L: DDR (Double Edge input) function disable. 4 L TxASYNC 28 ASYNC Asynchronous function enable. H : Asynchronous mode enable.(MODE=Disable) L : Asynchronous mode disable.(MODE=Enable) 5 H TxPDWN 30 /PDWN H: Normal operation, L: Power down (all outputs are Hi-Z) 6 L TxPRBS 31 PRBS 7 L TxTEST1 32 8 H TxTEST2 33 PRBS(Pseudo-Random Binary Sequence) generator is active in order to evaluate eye patterns when MODE = LL(Dual-in/Dual-out mode) or ASYNC=H H: PRBS generator is enable. L: Normal Operation Reserved Must be tied to GND. N/C Copyright© 2011 THine Electronics Electronics, Inc Inc. Must be Open. 2/5 THEVA12LVDR1020 manual Rev 1 00 E THEVA12LVDR1020_manual_Rev.1.00_E THine Electronics, Inc. THEVA12LVDR1020 Mode Setting & LVDS-Cable 2011/04/14 SW403 Setting SW Pin# 1 * NodeName Def. * Def. : Default Setting THC63LVD1024 IC Pin# PinName Description Output Clock Delay Timing Select. tDOUT=Output Data Cycle H 1 SW-Pin# 2 3 L H(open) H(open) 6 H(open) L H(open) -6 H(open) H(open) L MODE[1:0] 2 H RxDK1 7 LL HH HL DK LH 3 Offset[nsec] tDOUT 28 tDOUT 28 0 L H(open) H(open) 7 H(open) L H(open) -7 H(open) H(open) L L tDOUT 28 tDOUT 28 0 Pixel Data Mode. 4 5 L L RxMD1DK2 RxMD0RF2 6 5 6 H RxPDWN 4 7 H RxOE2 3 8 L RxTEST 144 MODE1 MODE0 Mode H H Single Link(Single-in/Single-out) H L Single Link(Single-in/Dual-out) Link(Single in/Dual out) L H Dual Link(Dual-in/Single-out) L L Dual Link(Dual-in/Single-out) MODE1 MODE0 /PDWN Power down and Output Control. H : Normal operation L : Power down Reserved Must be tied to VCC. LGND Ground Pins for LVDS inputs. SW404 Setting SW Pin# 1 * NodeName Def. H RxMAP * Def. : Default Setting THC63LVD1024 IC Pin# PinName 11 MAP Description LVDS mapping table select. H : Mapping Mode1 L : Mapping Mode2 DDR function enable. MODE 2 L RxMD2 10 MODE2 MODE2 Mode H DDR (Double Edge Output) function enable. L DDR (Double Edge Output) function disable. L Must be tied to GND LH LL HL HH 3 H RxOE1 9 OE Output Enable. H : Output enable, L : Output disable 4 H RxRF1 8 R/F Output Clock Triggering Edge Select. H : Rising edge. L : Falling edge. 5 H N/C 6 H N/C - - 7 H N/C 8 H N/C Copyright© 2011 THine Electronics Electronics, Inc Inc. Non Connected 3/5 THEVA12LVDR1020 manual Rev 1 00 E THEVA12LVDR1020_manual_Rev.1.00_E THine Electronics, Inc. THEVA12LVDR1020 Mode Setting & LVDS-Cable 2011/04/14 Measures Type # Type Un-Mount TTL-I/O LVDS-input 1 THC63LVD1023 B THC63LVD1024 LVDS-output RES401 RES402 RES403 RES404 RES405 RES406 RES414 RES415 RES416 RES418 RES420 RES422 RES424 RES426 RES428 RES429 RES430 RES442 R442 R443 TTL-I/O LVDS-input THC63LVD1023 B THC63LVD1024 LVDS-output 2 TTL-moniter TTL-I/O LVDS-input THC63LVD1023B THC63LVD1023 B THC63LVD1024 3 TTL-output TTL-I/O THC63LVD1023 B THC63LVD1024 4 TTL-input Copyright© 2011 THine Electronics Electronics, Inc Inc. 4/5 LVDS-output RES407 RES408 RES409 RES410 RES411 RES412 RES413 RES417 RES419 RES421 0Ω-Mount RES423 RES425 RES427 RES431 RES432 RES433 RES434 RES435 R417 33Ω-Mount RES407 RES408 RES409 RES410 RES411 RES412 RES413 RES417 RES419 RES421 RES423 RES425 RES427 RES431 RES432 RES433 RES434 RES435 R417 RES401 RES402 RES403 RES404 RES405 RES406 RES414 RES415 RES416 RES418 RES420 RES422 RES424 RES426 RES428 RES429 RES430 RES442 R442 R443 RES407 RES408 RES409 RES410 RES411 RES412 RES413 RES417 RES419 RES421 RES423 RES425 RES427 RES431 RES432 RES433 RES434 RES435 R417 RES401 RES402 RES403 RES404 RES405 RES406 RES414 RES415 RES416 RES418 RES420 RES422 RES424 RES426 RES428 RES429 RES430 RES442 R442 R443 RES407 RES408 RES409 RES410 RES411 RES412 RES413 RES417 RES419 RES421 RES423 RES425 RES427 RES431 RES432 RES433 RES434 RES435 R417 RES401 RES402 RES403 RES404 RES405 RES406 RES414 RES415 RES416 RES418 RES420 RES422 RES424 RES426 RES428 RES429 RES430 RES442 R442 R443 THEVA12LVDR1020 manual Rev 1 00 E THEVA12LVDR1020_manual_Rev.1.00_E THine Electronics, Inc. THEVA12LVDR1020 Mode Setting & LVDS-Cable 2011/04/14 Notices and Requests 1． The product specifications described in this material are subject to change without prior notice. 2． The circuit diagrams described in this material are examples of the application which may not always apply to the customer’s design. We are not responsible for possible errors and omissions in this material. Please note if errors or omissions should be found in this material, we may not be able to correct them i di t l 3． This material contains our copy right, know-how or other proprietary. Copying or disclosing to third parties the contents of this material without our prior permission is prohibited. 4． Note that if infringement of any third party's industrial ownership should occur by using this product, we will be exempted from the responsibility unless it directly relates to the production process or functions of the product. 5. This product is presumed to be used for general electric equipment, not for the applications which require very hi reliability (including medical equipment directly concerning people's life, aerospace equipment, or nuclear contro equipment). Also, when using this product for the equipment concerned with the control and safety of the transportation means, the traffic signal equipment, or various Types of safety equipment, please do it after applyin appropriate measures to the product. 6． Despite our utmost efforts to improve the quality and reliability of the product, faults will occur with a certain small probability, which is inevitable to a semi-conductor product. Therefore, you are encouraged to have suffici redundant or error preventive design applied to the use of the product so as not to have our product cause any soc or public damage. damage 7． Please note that this product is not designed to be radiation-proof. 8． Customers are asked, if required, to judge by themselves if this product falls under the category of strategic good under the Foreign Exchange and Foreign Trade Control Law. THine Electronics, Inc. sales@thine.co.jp Copyright© 2011 THine Electronics Electronics, Inc Inc. 5/5 THEVA12LVDR1020 manual Rev 1 00 E THEVA12LVDR1020_manual_Rev.1.00_E