UPC1663GV

ULTRA-WIDEBAND UPC1663GV DIFFERENTIAL VIDEO AMPLIFIER FEATURES Single Ended Voltage Gain, AVS (dB) SINGLE ENDED VOLTAGE GAIN vs. FREQUENCY • BANDWIDTH AND TYPICAL GAIN: 120 MHz at AVOL = 300 170 MHz at AVOL = 100 700 MHz at AVOL = 10 • VERY SMALL PHASE DELAY • GAIN ADJUSTABLE FROM 10 TO 300 • NO FREQUENCY COMPENSATION REQUIRED 60 50 40 30 20 10 0 Gain 2 Gain 1 DESCRIPTION NEC's UPC1663GV is a video amplifier with differential input and output stages. A high frequency process (fT = 6 GHz) improves AC performance compared with industry-standard video amplifiers. This device is excellent as a sense amplifier for high-density CCDs, as a video or pulse amplifier in highresolution displays, and in communications equipment. 100 k 1M 10 M 100 M Frequency, f (Hz) ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = ±6 V, RS = 50 Ω, f = 10 MHz) SYMBOLS ICC AVd BW tR tpd RIN CIN IIO IB VN VI CMRR SVRR VO(off) PART NUMBER PACKAGE OUTLINE PARAMETERS AND CONDITIONS Power Supply Current Gain1 Gain2 Bandwidth (Gain is 3 dB down from the gain at 100 KHz) Rise Time, VOUT = 1Vp-p: Differential Voltage Gain: Propagation Delay, VOUT = 1 Vp-p: Input Impedance: UNITS mA MIN 200 8 Gain1 Gain2 Gain1 Gain2 Gain1 Gain2 Gain1 Gain2 MHz MHz ns ns ns ns kΩ kΩ pF µA µA µVr.m.s. V dB dB dB V V V Vp-p mA UPC1663GV S08 TYP 13 320 10 120 700 2.9 2.7 2 1.2 4.0 180 2 0.4 20 3 ±1.0 55 53 50 94 60 70 0.3 0.1 2.9 4.0 3.6 1.5 1.0 3.4 MAX 20 500 12 50 VO (CM) VOp-p Isink Input Capacitance Input Offset Current Input Bias Current Input Noise Voltage, 10 k to 10 MHz Input Voltage Range Common Mode Rejection Ratio, Vcm = ±1 V, f ≤100 kHz Vcm = ±1 V, f = 5 MHz Supply Voltage Rejection Ratio, ∆V = ±0.5 V Output Offset Voltage, VO(off) = |OUT1 - OUT2| Gain1 Gain2 Output Common Mode Voltage Max. Output Voltage Swing, Single-ended Output Sink Current 5.0 40 2.4 3.0 2.5 Notes: 1. Gain select pins GA and GB are connected together. 2. All gain select pins are open. 3. Insert adjustment resistor (0 to 10 kΩ) between GA and GB when variable gain is necessary. California Eastern Laboratories UPC1663GV ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C) SYMBOLS VC–VE PT VID VIN IO TOP TSTG PARAMETERS UNITS Voltage between VC and VE V Total Power Dissipation2 Differential Input Voltage Input Voltage Output Current Operating Temperature Storage Temperature mW V V mA °C °C RATINGS -0.3 to 14 200 ±5 ±6 35 -45 to +75 -55 to +150 EQUIVALENT CIRCUIT VC IN1 GA IN2 GB OUT1 OUT2 Notes: 1. Operation in excess of any one of these parameters may result in permanent damage. 2. Mounted on 50 cm x 50 cm x 1.6 mm glass epoxy PCB with copper film (TA = Max TOP). Ve TYPICAL PERFORMANCE UNDER SINGLE SUPPLY +5 V OPERATION* RECOMMENDED OPERATING CONDITIONS (TA = 25°C) SYMBOLS VC Ve IO source IO sink CHARACTERISTICS Positive Supply Voltage Negative Supply Voltage Source Current Sink Current Frequency Range UNITS MIN TYP MAX V V mA mA MHz DC +2 -2 +6 -6 +6.5 -6.5 20 2.5 200 PARAMETER Differential Gain Gain 1 Gain 2 Bandwidth Gain 1 Gain 2 Rise Time Gain 1 Propagation Delay Gain 1 Gain 2 Phase Shift Gain 1 Gain 2 Output Power RA = 240 Ω RA = 910 Ω RA = 80 Ω CONDITIONS 15 MHz 35 11 Gain is 3 dB down from the gain at 100 KHz RS = 50 Ω, VOUT = 80 mVp-p 2.2 ns 106 115 dB dB MHz MHz TYPICAL UNITS Attention: Due to high frequency characteristics, the physical circuit layout is very critical. Supply voltage line bypass, double-sided printed-circuit board, and wide-area ground line layout are necessary for stable operation. Two signal resistors connected to both inputs and two load resistors connected to both outputs should be balanced for stable operation. RS = 50 Ω, VOUT = 80 mVp-p RS = 50 Ω, VOUT = 60 mVp-p 100 MHz 2.8 1.8 -123 -93 ns ns degree degree dBm dBm dBm ZL = 50 Ω, 15 MHz 5.0 0 -11.5 TYPICAL PERFORMANCE CURVES (TA = 25°C) VIDEO LINE SINGLE ENDED OUTPUT VOLTAGE SWING vs. FREQUENCY 0.1 µ * See Application Circuit NORMALIZED VOLTAGE GAIN vs. SUPPLY VOLTAGE 1.4 75 Ω 2.0 75 Ω 75 Ω 75 Ω Output Voltage (Vp-p) 200 Ω 200 Ω OUT 75 Ω 1.2 Gain 2 Relative Gain, Avr 1.0 0.8 0.6 0.4 0.2 Gain 1 VC = 6 V, Ve = -6 V 1.0 0 100 k 1M 10 M 100 M 1G 0.1 +2 -2 +3 -3 +4 -4 +5 -5 +6 -6 V± +7 -7 +8 -8 VC VE Frequency, f (Hz) Supply Voltage, (V) UPC1663GV TYPICAL PERFORMANCE CURVES (TA = 25°C) SINGLE ENDED OUTPUT VOLTAGE SWING vs. TEMPERATURE 5.0 4.0 SINK CURRENT vs. TEMPERATURE Output Voltage, VO (Vp-p) 4.5 Output Sink Current, IOSINK (mA) -20 0 20 40 60 80 4.0 3.5 3.5 3.0 3.0 2.5 2.5 -20 0 20 40 60 80 Ambient Temperature, TA (°C) Ambient Temperature, TA (°C) INPUT BIAS CURRENT vs. TEMPERATURE 50 Vc =6 V, Ve = -6 V 1000 DIFFERENTIAL VOLTAGE GAIN vs. RESISTANCE BETWEEN GA AND GB 40 30 Differential Gain, AVD (V/V) Input Bias Current, IB (µA) 100 20 10 0 -20 0 20 40 60 80 10 10 100 1k 10 k Ambient Temperature, TA (°C) RADJ (Ω) SUPPLY CURRENT vs. TEMPERATURE 16 VC = 6 V, VE = -6 V 15 SUPPLY CURRENT vs. SUPPLY VOLTAGE 20 Supply Current, ICC (mA) Supply Current, ICC (mA) 15 14 13 10 12 5 11 10 -20 0 20 40 60 80 0 +2 -2 +4 -4 +6 -6 +8 -8 VC VE Ambient Temperature, TA (°C) Supply Voltage, V± (V) UPC1663GV TYPICAL PERFORMANCE CURVES (TA = 25°C) PHASE SHIFTvs. FREQUENCY Phase Shift (degree) 0 -45 -90 -135 Gain 1 -180 Gain 2 100 k 1M 10 M 100 M Frequency, f (Hz) TYPICAL APPLICATIONS • Photo Signal Detector Vc Vc R2 75Ω PIN PHOTO DIODE Q1 R6 1 kΩ Vc + 5 V 2.2µ R4 50Ω R5 1 kΩ 1000 pF C1 1000 pF C2 50Ω R1 R3 50Ω 2.2µ Ve - 5 V Since the input impedance of the IC falls when the gain rises, stable operation can be achieved by inserting a FET buffer when necessary as illustrated above. • Application for +5 V Single Supply +5V 2.2µ 1000 +5V 3k 2.2µ 50Ω 1000 V+ 1663 50Ω VRA 1000 RA 50Ω 1000 50Ω 3k 2.2µ 1000 UPC1663GV OUTLINE DIMENSIONS (Units in mm) UPC1663GV PACKAGE OUTLINE S08 8 7 6 5 CONNECTION DIAGRAM (TOP VIEW) UPC1663GV IN2 1 8 IN1 1663 N G1A Detail of Lead End 2 7 G1B VCC- 3 1 2 3 3.0 MAX 4 +0.10 0.15 -0.05 3 -3˚ +7˚ 6 VCC+ 4.94 ± 0.2 3.2±0.1 0.87±0.2 1.5±0.1 1.8 MAX OUT2 0.5 ± 0.2 4 5 OUT1 0.1 ± 0.1 0.65 +0.10 0.3 -0.05 0.575 MAX Notes: 1. Each lead centerline is located within 0.12 mm (0.005 inch) of its true position at maximum material condition. 2. All dimensions are typical unless otherwise specified. ORDERING INFORMATION PART NUMBER UPC1663GV-E1-A QUANTITY 1000/Reel PIN DESCRIPTION Pin No. Pin Name In single Bias (V) Pin voltage 0 5 4 6 OUT1 OUT2 VCC+ Pin voltage 0 ±2 to ±6.5 In single bias (V) Apply voltage VCC/2 Apply voltage VCC/2 -0.3 to +14 Plus voltage supply pin. This pin should be connected with bypass capacitor to minimize AC impedance. Minus voltage supply pin. This pin should be connected with bypass capacitor to minimize AC impedance. Gain adjustment pin. External resistor from 0 to 10 kW can be inserted between pin 2 and 7 to determine gain value. Internal circuit constants should be refered to application note. 3 8 7 2 1 5 4 Functions and Applications Internal Equivalent Circuit 8 1 IN1 IN2 Input pin 6 Output pin 3 VCC- GND 7 2 G1A G1B — — Life Support Applications These NEC products are not intended for use in life support devices, appliances, or systems where the malfunction of these products can reasonably be expected to result in personal injury. The customers of CEL using or selling these products for use in such applications do so at their own risk and agree to fully indemnify CEL for all damages resulting from such improper use or sale. EXCLUSIVE NORTH AMERICAN AGENT FOR RF, MICROWAVE & OPTOELECTRONIC SEMICONDUCTORS CALIFORNIA EASTERN LABORATORIES • Headquarters • 4590 Patrick Henry Drive • Santa Clara, CA 95054-1817 • (408) 988-3500 • Telex 34-6393 • FAX (408) 988-0279 24-Hour Fax-On-Demand: 800-390-3232 (U.S. and Canada only) • Internet: http://WWW.CEL.COM DATA SUBJECT TO CHANGE WITHOUT NOTICE 06/06/2000 4590 Patrick Henry Drive Santa Clara, CA 95054-1817 Telephone: (408) 919-2500 Facsimile: (408) 988-0279 Subject: Compliance with EU Directives CEL certifies, to its knowledge, that semiconductor and laser products detailed below are compliant with the requirements of European Union (EU) Directive 2002/95/EC Restriction on Use of Hazardous Substances in electrical and electronic equipment (RoHS) and the requirements of EU Directive 2003/11/EC Restriction on Penta and Octa BDE. CEL Pb-free products have the same base part number with a suffix added. The suffix –A indicates that the device is Pb-free. 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