CP207_10

PROCESS Small Signal Transistor NPN - Saturated Switch Transistor Chip CP207 PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 93,430 PRINCIPAL DEVICE TYPES 2N2369A CMPT2369 EPITAXIAL PLANAR 9.0 x 14 MILS 8.0 MILS 2.7 x 2.7 MILS 2.7 x 2.7 MILS Al - 13,000Å Au - 6,000Å BACKSIDE COLLECTOR R4 (22-March 2010) w w w. c e n t r a l s e m i . c o m PROCESS CP207 Typical Electrical Characteristics R4 (22-March 2010) w w w. c e n t r a l s e m i . c o m