CP208_10

PROCESS Power Transistor CP208 NPN - Amp/Switch Transistor Chip PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 2,630 PRINCIPAL DEVICE TYPES CJD31C MJE182 TIP31C EPITAXIAL PLANAR 66 x 66 MILS 12.5 ± 1.0 MILS 12 x 24 MILS 11 x 14 MILS Al - 50,000Å Cr/Ni/Ag - 16,000Å BACKSIDE COLLECTOR R4 (22-March 2010) w w w. c e n t r a l s e m i . c o m PROCESS CP208 Typical Electrical Characteristics R4 (22-March 2010) w w w. c e n t r a l s e m i . c o m