CP318V_10

PROCESS Small Signal Transistor CP318V NPN - High Voltage Transistor Chip PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 25,536 PRINCIPAL DEVICE TYPES MPS455 EPITAXIAL PLANAR 26 x 26 MILS 7.1 MILS ± 0.6 MILS 5.5 x 5.5 MILS 5.5 x 5.5 MILS Al-Si - 17,000Å Au - 12,000Å BACKSIDE COLLECTOR R2 (22-March 2010) w w w. c e n t r a l s e m i . c o m PROCESS CP318V Typical Electrical Characteristics R2 (22-March 2010) w w w. c e n t r a l s e m i . c o m