CP319_10

PROCESS Power Transistor CP319 NPN - Silicon Power Transistor Chip PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 1,462 PRINCIPAL DEVICE TYPES CZTA44HC TIP47 TIP48 TIP50 EPITAXIAL PLANAR 87 x 87 MILS 9.0 MILS 24 x 15 MILS 38 x 16 MILS Al - 30,000Å Ti/Ni/Ag - 11,000Å BACKSIDE COLLECTOR R3 (22-March 2010) w w w. c e n t r a l s e m i . c o m PROCESS CP319 Typical Electrical Characteristics R3 (22-March 2010) w w w. c e n t r a l s e m i . c o m