CP324_10

PROCESS Small Signal MOSFET Transistor N- Channel Enhancement-Mode Transistor Chip CP324 PROCESS DETAILS Process Die Size Die Thickness Gate Bonding Pad Area Source Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 5 INCH WAFER 33,500 PRINCIPAL DEVICE TYPES 2N7002 EPITAXIAL PLANAR 21.65 x 21.65 MILS 9.0 MILS 5.5 x 5.5 MILS 5.9 x 13.8 MILS Al - 30,000Å Au - 12,000Å BACKSIDE DRAIN R3 (22-March 2010) w w w. c e n t r a l s e m i . c o m PROCESS CP324 Typical Electrical Characteristics R3 (22-March 2010) w w w. c e n t r a l s e m i . c o m