CP337V

PROCESS CP337V Small Signal Transistors NPN - Saturated Switch Transistor Chip PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 13,192 PRINCIPAL DEVICE TYPES 2N3725A 2N4014 EPITAXIAL PLANAR 29 x 29 MILS 7.1 MILS 11.8 x 4.5 MILS 11.8 x 4.5 MILS Al 30,000Å Au-As - 13,000Å BACKSIDE COLLECTOR 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R0 (26-August 2005)