CP645

PROCESS CP645 Power Transistor PNP, 8.0A Power Transistor Chip Central TM Semiconductor Corp. PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization MULTIEPITAXIAL MESA 120 x 145 MILS 13 MILS 20 x 45 MILS 14 x 70 MILS Al - 50,000Å Cr / Ni / Ag - 10,000Å GEOMETRY GROSS DIE PER 4 INCH WAFER 640 PRINCIPAL DEVICE TYPES MJE15031 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R0 (4- April 2005)