CTLDM7120-M563

CTLDM7120-M563 SURFACE MOUNT N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET w w w. c e n t r a l s e m i . c o m TLM563 CASE • Device is Halogen Free by design DESCRIPTION: The CENTRAL SEMICONDUCTOR CTLDM7120-M563 is a high quality, enhancement-mode N-channel MOSFET packaged in a space saving 1.6 x 1.6mm TLM™ surface mount package. This device is a TLM™ equivalent of the popular CMLDM7120G, SOT-563 device, featuring enhanced thermal characteristics, a package footprint compatible with standard SOT-563 mounting pad geometries, and a height profile of only 0.4mm. MARKING CODE: CKN FEATURES: • • • • • • ESD protection up to 2kV High Current (ID=1.0A) Low rDS(ON) (0.14Ω MAX @ VGS=2.5V, ID=0.5A) Logic level compatibility High Thermal Efficiency TLM563 with a package profile of 0.4mm, compatible with SOT-563 mounting geometries SYMBOL VDS VGS ID IDM PD TJ, Tstg ΘJA 20 8.0 1.0 4.0 500 -65 to +150 250 MAX 10 10 20 0.5 0.075 0.10 0.20 2.5 45 220 120 25 140 1.2 1.1 0.10 0.14 0.25 UNITS V V A A mW °C °C/W UNITS μA μA V V V Ω Ω Ω S pF pF pF ns ns APPLICATIONS: • Load Power Switches • DC/DC Converters • Battery powered devices including Cell Phones, PDAs, Digital Cameras, MP3 Players, etc. MAXIMUM RATINGS: (TA=25°C) Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (Steady State) Maximum Pulsed Drain Current, tp=10μs Power Dissipation (Note 1) Operating and Storage Junction Temperature Thermal Resistance (Note 1) ELECTRICAL CHARACTERISTICS: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN TYP IGSSF, IGSSR VGS=8.0V, VDS=0 IDSS BVDSS VGS(th) VSD rDS(ON) rDS(ON) rDS(ON) gFS Crss Ciss Coss ton toff VDS=20V, VGS=0 VGS=0, ID=250μA VDS=10V, ID=1.0mA VGS=0, IS=1.0A VGS=4.5V, ID=500mA VGS=2.5V, VGS=1.5V, ID=500mA ID=100mA VDS=10V, ID=500mA VDS=10V, VGS=0, f=1.0MHz VDS=10V, VGS=0, f=1.0MHz VDS=10V, VGS=0, f=1.0MHz VDD=10V, VGS=5.0V, ID=500mA VDD=10V, VGS=5.0V, ID=500mA Notes: (1) Mounted on 2 inch square FR4 PCB with copper mounting pad area of 2.4mm2. R2 (17-February 2010) CTLDM7120-M563 SURFACE MOUNT N-CHANNEL ENHANCEMENT-MODE SILICON MOSFET TLM563 CASE - MECHANICAL OUTLINE SUGGESTED MOUNTING PADS (Dimensions in mm) PIN CONFIGURATION LEAD CODE: 1) Drain 2) Drain 3) Gate 4) Source 5) Drain 6) Drain MARKING CODE: CKN R2 (17-February 2010) w w w. c e n t r a l s e m i . c o m