CEB62A3

CEP62A3/CEB62A3 Feb. 2003 N-Channel Logic Level Enhancement Mode Field Effect Transistor FEATURES 30V , 60A , RDS(ON)=10mΩ @VGS=10V. RDS(ON)=15m Ω @VGS=4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220 & TO-263 package. D 4 4 D G G D S G S CEB SERIES TO-263(DD-PAK) CEP SERIES TO-220 S ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous -Pulsed Drain-Source Diode Forward Current Maximum Power Dissipation @Tc=25 C Derate above 25 C Operating and Storage Temperature Range Symbol VDS VGS ID IDM IS PD TJ, TSTG Limit 30 20 60 180 60 68 0.45 -55 to 175 Unit V V A A A W W/ C C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient R JC R JA 4-177 2.2 62.5 C/W C/W CEP62A3/CEB62A3 ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted) 4 Parameter OFF CHARACTERISTICS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate-Body Leakage Symbol BVDSS IDSS IGSS VGS(th) RDS(ON) ID(ON) gFS CISS COSS CRSS b Condition VGS = 0V, ID = 250µA VDS = 30V, VGS = 0V VGS = 20V, VDS = 0V VDS = VGS, ID = 250µA VGS = 10V, ID = 26A VGS = 4.5V, ID = 21A VGS = 10V, VDS = 5V VDS = 10V, ID = 26A Min Typ Max Unit 30 1 V µA 100 nA 1 8.5 12 60 36 1100 3 10 15 V mΩ mΩ A S PF PF PF ON CHARACTERISTICS a Gate Threshold Voltage Drain-Source On-State Resistance On-State Drain Current Forward Transconductance DYNAMIC CHARACTERISTICSb Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS =15V, VGS = 0V f =1.0MHZ 600 180 19 36 97 68 VDS =15V, ID = 30A, VGS =10V 35 6 11 4-178 SWITCHING CHARACTERISTICS Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge tD(ON) tr tD(OFF) tf Qg Qgs Qgd VDD = 15V, ID =60A, VGEN = 10V RG =24 Ω 48 72 175 135 42 ns ns ns ns nC nC nC CEP62A3/CEB62A3 ELECTRICAL CHARACTERISTICS (TC=25 C unless otherwise noted) Parameter Diode Forward Voltage Symbol VSD Condition VGS = 0V, Is =26A Min Typ Max Unit 1.3 V 4 DRAIN-SOURCE DIODE CHARACTERISTICS a Notes a.Pulse Test:Pulse Width 300 s, Duty Cycle 2%. b.Guaranteed by design, not subject to production testing. 60 VGS=10,8,6,4V 50 50 60 ID, Drain Current(A) ID, Drain Current (A) 40 30 20 10 0 0 1 2 3 4 5 40 30 -55 C 20 25 C 10 0 1 2 3 4 Tj=125 C VGS=3V VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) Figure 1. Output Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) 1800 1500 Figure 2. Transfer Characteristics 2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100 -50 0 50 100 150 200 ID=26A VGS=10V C, Capacitance (pF) 1200 900 600 300 0 0 5 10 15 20 Ciss Coss Crss 25 30 VDS, Drain-to Source Voltage (V) TJ, Junction Temperature( C) Figure 3. Capacitance Figure 4. On-Resistance Variation with Temperature 4-179 CEP62A3/CEB62A3 BVDSS, Normalized Drain-Source Breakdown Voltage Vth, Normalized Gate-Source Threshold Voltage 1.30 1.20 1.10 1.00 0.90 0.80 0.70 0.60 -50 -25 0 25 50 75 100 125 150 VDS=VGS ID=250 A 1.15 ID=250 A 1.10 1.05 1.00 0.95 0.90 0.85 -50 -25 4 0 25 50 75 100 125 150 Tj, Junction Temperature ( C) Tj, Junction Temperature ( C) Figure 5. Gate Threshold Variation with Temperature 50 Figure 6. Breakdown Voltage Variation with Temperature 50 gFS, Transconductance (S) Is, Source-drain current (A) 40 30 20 10 VDS=10V 0 0 10 20 30 40 10 1.0 0.1 0.4 0.6 0.8 1.0 1.2 1.4 IDS, Drain-Source Current (A) VSD, Body Diode Forward Voltage (V) Figure 7. Transconductance Variation with Drain Current 10 8 6 4 2 0 0 10 20 30 40 Figure 8. Body Diode Forward Voltage Variation with Source Current VGS, Gate to Source Voltage (V) VDS=15V ID=30A ID, Drain Current (A) 10 2 R (O DS N) Lim it 10 0 10 1 10 s DC 0ms 10 1m m s s 10 0 -1 10 TC=25 C Tj=175 C Single Pulse 10 0 10 1 10 2 10 -1 Qg, Total Gate Charge (nC) VDS, Drain-Source Voltage (V) Figure 9. Gate Charge 4-180 Figure 10. Maximum Safe Operating Area CEP62A3/CEB62A3 VDD t on V IN D VGS RGEN G 90% 4 toff tr 90% RL VOUT td(on) VOUT td(off) 90% 10% tf 10% INVERTED S VIN 50% 10% 50% PULSE WIDTH Figure 11. Switching Test Circuit Figure 12. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 1. R JC (t)=r (t) * R JC 2. R JC=See Datasheet 3. TJM-TC = P* R JC (t) 4. Duty Cycle, D=t1/t2 10 -2 -2 10 10 -1 10 0 10 1 10 2 10 3 10 4 Square Wave Pulse Duration (msec) Figure 13. Normalized Thermal Transient Impedance Curve 4-181