N-Channel Enhancement Mode Field Effect Transistor FEATURES
100V, 72A, RDS(ON) = 13mΩ @VGS = 10V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-220 & TO-263 package.
CEP75N10/CEB75N10
PRELIMINARY
D
D
G
G D S
S CEB SERIES TO-263(DD-PAK)
G
CEP SERIES TO-220
S
ABSOLUTE MAXIMUM RATINGS
Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous @ TC = 25 C Drain Current-Continuous @ TC = 100 C Drain Current-Pulsed a Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Single Pulsed Avalanche Energy d Single Pulsed Avalanche Current
d
Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD EAS IAS TJ,Tstg 100
Units V V A A A W W/ C mJ A C
±20
72 51 250 100 0.66 152 40 -55 to 175
Operating and Store Temperature Range
Thermal Characteristics
Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 1.5 62.5 Units C/W C/W
This is preliminary information on a new product in development now . Details are subject to change without notice . 1
Rev 1. 2010.May http://www.cetsemi.com
CEP75N10/CEB75N10
Electrical Characteristics
Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics c Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 25A VDS = 80V, ID = 70A, VGS = 10V VDD = 50V, ID = 30A, VGS = 10V, RGEN = 5.6Ω 27 12 65 17 72 13 30 72 1.3 54 24 130 34 94 ns ns ns ns nC nC nC A V gFS Ciss Coss Crss VDS = 25V, ID = 25A VDS = 25V, VGS = 0V, f = 1.0 MHz 21 3310 280 135 S pF pF pF VGS(th) RDS(on) VGS = VDS, ID = 250µA VGS = 10V, ID = 25A 2 10 4 13 V mΩ BVDSS IDSS IGSSF IGSSR VGS = 0V, ID = 250µA VDS = 100V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V 100 1 100 -100 V
µA
Tc = 25 C unless otherwise noted Symbol Test Condition Min Typ Max Units
nA nA
Drain-Source Diode Characteristics and Maximun Ratings
Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing. d.L = 190µH, IAS = 40A, VDD = 24V, RG = 25Ω, Starting TJ = 25 C
2
CEP75N10/CEB75N10
30 25 20 15 10 5 0 VGS=10,9,8,7,6V 140 25 C
ID, Drain Current (A)
ID, Drain Current (A)
VGS=5V
105
70
VGS=4V
35
TJ=125 C
-55 C
0
1
2
3
4
5
6
0
0
2
4
6
8
10
VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics
4800 4000 3200 2400 1600 800 0 Crss 0 5 10 15 Coss 20 25 2.6 2.2 1.8 1.4 1.0 0.6 0.2 -100
VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics
ID=25A VGS=10V
C, Capacitance (pF)
Ciss
RDS(ON), Normalized RDS(ON), On-Resistance(Ohms)
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance
1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS
TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature IS, Source-drain current (A)
VGS=0V
VTH, Normalized Gate-Source Threshold Voltage
ID=250µA
10
1
10
0
-25
0
25
50
75
100
125
150
10
-1
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature
VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current
3
CEP75N10/CEB75N10
VGS, Gate to Source Voltage (V)
10 8 6 4 2 0 VDS=80V ID=70A 10
3
RDS(ON)Limit
ID, Drain Current (A)
10
2
100ms 1ms
10
1
10ms DC TC=25 C TJ=175 C Single Pulse 10
-1
0
20
40
60
80
10
0
10
0
10
1
10
2
Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT
10%
VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area
toff tr
90%
td(off)
90% 10%
tf
INVERTED
90%
S
VIN
50% 10%
50%
PULSE WIDTH
Figure 9. Switching Test Circuit
Figure 10. Switching Waveforms
r(t),Normalized Effective Transient Thermal Impedance
10
0
D=0.5
0.2
10
-1
0.1 0.05 0.02 0.01 Single Pulse
PDM t1 t2
10
-2
1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2
10
-2
10
-1
10
0
10
1
10
2
10
3
10
4
Square Wave Pulse Duration (msec) Figure 11. Normalized Thermal Transient Impedance Curve
4