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CED02N7

CED02N7

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CED02N7 - N-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CED02N7 数据手册
CED02N7/CEU02N7 N-Channel Enhancement Mode Field Effect Transistor FEATURES 700V, 1.6A, RDS(ON) = 6.6Ω @VGS = 10V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-251 & TO-252 package. D D G S CEU SERIES TO-252(D-PAK) G D G S CED SERIES TO-251(I-PAK) S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD EAS IAR EAR TJ,Tstg 700 Units V V A A W W/ C mJ A mJ C ±30 1.6 6 43 0.34 125 2 5.4 -55 to 150 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Single Pulsed Avalanche Energy d Repetitive Avalanche Current a Repetitive Avalanche Energy a Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 2.9 50 Units C/W C/W 2004.October 6 - 10 http://www.cetsemi.com CED02N7/CEU02N7 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 2A VDS = 480V, ID = 2A, VGS = 10V VDD = 300V, ID = 2A, VGS = 10V, RGEN = 18Ω 19 26 34 15 14 2.5 8.6 1.6 1.5 35 50 70 40 20 ns ns ns ns nC nC nC A V c Tc = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss Test Condition VGS = 0V, ID = 250µA VDS = 700V, VGS = 0V VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 1A VDS = 50V, ID = 1A 2 5.5 0.7 220 55 30 Min 700 25 100 -100 4 6.6 Typ Max Units V µA nA nA V Ω S pF pF pF 6 VDS = 25V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing. d.L = 60mH, IAS = 2.0A, VDD = 50V, RG = 25Ω, Starting TJ = 25 C 6 - 11 CED02N7/CEU02N7 3.0 2.5 2.0 1.5 1.0 0.5 25 C 0.0 10 0 5 10 15 20 25 -1 ID, Drain Current (A) ID, Drain Current (A) TJ=150 C 10 0 -55 C 1.VDS=40V 2.Pulse Test 4 6 8 10 2 VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 300 250 200 150 100 Coss 50 0 0 5 10 15 Crss 20 25 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics C, Capacitance (pF) Ciss RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) ID=1A VGS=10V -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature VGS=0V 0 VTH, Normalized Gate-Source Threshold Voltage VDS=VGS ID=250µA IS, Source-drain current (A) 10 10 -1 10 -25 0 25 50 75 100 125 150 -2 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 6 - 12 CED02N7/CEU02N7 VGS, Gate to Source Voltage (V) 15 VDS=480V ID=2A 10 1 ID, Drain Current (A) 12 RDS(ON)Limit 10 0 100µs 1ms 10ms DC 9 6 10 -1 3 0 0 5 10 15 20 10 -2 TC=25 C TJ=150 C Single Pulse 10 0 6 10 1 10 2 10 3 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area VDD t on V IN D VGS RGEN G 90% toff tr 90% RL VOUT td(on) VOUT td(off) 90% 10% tf 10% INVERTED S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 PDM t1 t2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 10 -2 Single Pulse -5 10 10 -4 10 -3 10 -2 10 -1 10 0 10 1 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 6 - 13
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