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CEDF634_10

CEDF634_10

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CEDF634_10 - N-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CEDF634_10 数据手册
CEDF634/CEUF634 N-Channel Enhancement Mode Field Effect Transistor FEATURES 250V, 6.7A, RDS(ON) = 450mΩ @VGS = 10V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. TO-251 & TO-252 package. D D G S CEU SERIES TO-252(D-PAK) G D G S CED SERIES TO-251(I-PAK) S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Symbol Limit VDS VGS ID IDM PD TJ,Tstg 250 Units V V A A W W/ C C ±20 6.7 26 46 0.37 -55 to 150 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA Limit 2.7 50 Units C/W C/W Details are subject to change without notice . 1 Rev 2. 2010.June http://www.cetsemi.com CEDF634/CEUF634 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = 6.7A 0.9 VDS = 200V, ID =5.6A, VGS = 10V VDD = 125V, ID = 5.6A, VGS = 10V, RGEN = 12Ω 16 3.5 38 4 18 3 5 6.7 1.5 32 7 76 8 23 ns ns ns ns nC nC nC A V c Tc = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss Test Condition VGS = 0V, ID = 250µA VDS = 250V, VGS = 0V VGS = 20V, VDS = 0V VGS = -20V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 3.5A VDS = 50V, ID = 5.1A 4.4 925 95 20 2 Min 250 25 100 -100 4 450 Typ Max Units V µA nA nA V mΩ S pF pF pF VDS = 25V, VGS = 0V, f = 1.0 MHz Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. c.Guaranteed by design, not subject to production testing. d.UIS condition Vdd=25V L=2mH Rg=25ohm Ias=6.7A. 2 CEDF634/CEUF634 12 10 8 6 4 2 0 VGS=10,9,8,7V 10 1 ID, Drain Current (A) VGS=6V ID, Drain Current (A) 10 0 TJ=150 C -55 C VGS=5V VGS=4V 0 1 2 3 4 5 6 10 -1 25 C 2 4 6 1.VDS=40V 2.Pulse Test 8 10 VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 1200 1000 800 600 400 200 0 Coss Crss 0 10 20 30 40 50 Ciss 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=5.1A VGS=10V RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature VGS=0V 1 VTH, Normalized Gate-Source Threshold Voltage IS, Source-drain current (A) ID=250µA 10 10 0 -25 0 25 50 75 100 125 150 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEDF634/CEUF634 VGS, Gate to Source Voltage (V) 10 8 6 4 2 0 VDS=200V ID=5.6A 10 2 RDS(ON)Limit ID, Drain Current (A) 10 1 100ms 1ms 10ms 10 0 DC 0 3 6 9 12 15 18 21 10 -1 TC=25 C TJ=150 C Single Pulse 10 0 10 1 10 2 10 3 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT 10% VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms r(t),Normalized Effective Transient Thermal Impedance 10 0 D=0.5 0.2 10 -1 0.1 0.05 0.02 0.01 Single Pulse PDM t1 t2 10 -2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC = P* RθJC (t) 4. Duty Cycle, D=t1/t2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4
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