CEF09N7A

CEP09N7A/CEB09N7A CEF09N7A N-Channel Enhancement Mode Field Effect Transistor FEATURES Type CEP09N7A CEB09N7A CEF09N7A VDSS 700V 700V 700V RDS(ON) 1.2Ω 1.2Ω 1.2Ω ID 8A 8A 8A e @VGS 10V 10V 10V D Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. D G S CEB SERIES TO-263(DD-PAK) G G D S CEP SERIES TO-220 G D S CEF SERIES TO-220F S ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a Tc = 25 C unless otherwise noted Limit Symbol TO-220/263 VDS VGS ID IDM PD TJ,Tstg f TO-220F Units V V 700 ±30 8 30 167 1.33 -55 to 150 8 e e A A W W/ C C 30 50 0.4 Maximum Power Dissipation @ TC = 25 C - Derate above 25 C Operating and Store Temperature Range Thermal Characteristics Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Symbol RθJC RθJA 0.75 62.5 Limit 2.5 65 Units C/W C/W Details are subject to change without notice . 1 Rev 1. 2006.Oct http://www.cetsemi.com CEP09N7A/CEB09N7A CEF09N7A Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics b Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics c Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics c Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage b Tc = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) Test Condition VGS = 0V, ID = 250µA VDS = 700V, VGS = 0V VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VGS = VDS, ID = 250µA VGS = 10V, ID = 5A 2 Min 700 50 100 -100 4 1.2 Typ Max Units V µA 4 nA nA V Ω gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS g VSD VDS = 5V, ID = 8A VDS = 25V, VGS = 0V, f = 1.0 MHz 8 1800 160 17 20 40 14 76 14 42.5 S pF pF pF ns ns ns ns nC nC nC 8 A V VDD = 300V, ID = 8A, VGS = 10V, RGEN = 10Ω 7 38 7 32 10 9 VDS = 480V, ID = 8A, VGS = 10V Drain-Source Diode Characteristics and Maximun Ratings VGS = 0V, IS = 8A 1.6 Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature . b.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2% . c.Guaranteed by design, not subject to production testing. e.Limited only by maximum temperature allowed . f .Pulse width limited by safe operating area . g.Full package IS(max) = 4.3A . 2 CEP09N7A/CEB09N7A CEF09N7A 12 10 VGS=10,9,8,7V 8 VGS=6V 6 4 2 0 0 3 6 9 12 12 10 8 6 4 25 C 2 0 1 2 3 4 5 6 TJ=125C -55 C ID, Drain Current (A) VGS=5V ID, Drain Current (A) VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 2400 2000 Ciss 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -100 VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics 1600 1200 800 400 0 0 5 10 Coss Crss 15 20 25 RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) ID=8A VGS=10V C, Capacitance (pF) -50 0 50 100 150 200 VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature VGS=0V 1 VTH, Normalized Gate-Source Threshold Voltage VDS=VGS ID=250µA IS, Source-drain current (A) 25 50 75 100 125 150 10 10 0 -25 0 10-1 0.4 0.7 1.0 1.3 1.7 2.0 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEP09N7A/CEB09N7A CEF09N7A VGS, Gate to Source Voltage (V) 10 VDS=480V ID=8A ID, Drain Current (A) 8 RDS(ON)Limit 10 1 4 100µs 1ms 10ms DC 6 4 10 0 2 0 0 8 16 24 32 10 -1 TC=25 C TJ=150 C Single Pulse 10 0 10 1 10 2 10 3 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area VDD t on V IN D VGS RGEN G 90% toff tr 90% RL VOUT td(on) VOUT td(off) 90% 10% tf 10% INVERTED S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms 10 0 r(t),Normalized Effective Transient Thermal Impedance D=0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 1. RθJC (t)=r (t) * RθJC 2. RθJC=See Datasheet 3. TJM-TC= P* RθJC (t) 4. Duty Cycle, D=t1/t2 -5 10 -1 10 -2 Single Pulse 10 -3 10 10 -4 10 -3 10 -2 10 -1 10 0 10 1 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4