CEG9926

CEG9926 Nov. 2002 Dual N-Channel Enhancement Mode Field Effect Transistor FEATURES 20V , 4.5A , RDS(ON)=30mΩ @VGS=4.5V. RDS(ON)=40m Ω @VGS=2.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. TSSOP-8 for Surface Mount Package. G2 S2 S2 D2 D1 1 S1 2 S1 3 G1 4 8 D2 7 S2 6 S2 5 G2 G1 S1 S1 D1 9 TSSOP-8 ABSOLUTE MAXIMUM RATINGS (TA=25 C unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous a b -Pulsed Drain-Source Diode Forward Current a Maximum Power Dissipation a Operating Junction and Storage Temperature Range Symbol VDS VGS ID IDM IS PD TJ, TSTG -55 to 150 Limit 20 8 4.5 25 1.7 Unit V V A A A W C THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient a R JA 125 C/W 9-17 CEG9926 ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise noted) Parameter OFF CHARACTERISTICS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate-Body Leakage BVDSS IDSS IGSS VGS(th) RDS(ON) ID(ON) gFS C Symbol Condition VGS= 0V, ID=250µA VDS=20V, VGS=0V VGS= 8V, VDS=0V VDS=VGS, ID=250µA VGS=4.5V, ID=4.5A VGS=4.0V, ID=5A VGS=2.5V, ID=3.5A Min Typ C Max Unit 20 1 V µA nA 0.5 24 23 32 ON CHARACTERISTICS b Gate Threshold Voltage 1.0 30 40 V mΩ mΩ mΩ 9 Drain-Source On-State Resistance On-State Drain Current Forward Transconductance VDS=5V, VGS=4.5V VDS=10V, ID=4.5A 10 10 500 300 140 A S PF PF PF DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS C VDS = 8V, VGS = 0V f =1.0MHZ SWITCHING CHARACTERISTICS Turn-On Delay Time Rise Time Turn-Off Delay Time Fall time Total Gate Charge Gate-Source Charge Gate-Drain Charge tD(ON) tr tD(OFF) tf Qg Qgs Qgd VDD = 10V, ID =1A, VGEN = 4.5V, RGEN = 6 Ω 20 18 60 28 10 40 40 108 56 15 ns ns ns ns nC nC nC VDS =10V, ID =4.5A, VGS =4.5V 9-18 2.3 2.9 CEG9926 ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise noted) Parameter Diode Forward Voltage Symbol VSD Condition VGS = 0V, Is =1.7A Min Typ Max Unit 0.8 1.2 V C DRAIN-SOURCE DIODE CHARACTERISTICS b Notes a.Surface Mounted on FR4 Board, t 10sec. b.Pulse Test:Pulse Width 300 s, Duty Cycle 2%. c.Guaranteed by design, not subject to production testing. 10 25 VGS=4.5,3.5,2.5V VGS=2.0V 8 20 ID, Drain Current(A) ID, Drain Current (A) 6 15 9 4 10 2 5 Tj=125 C 0 0.0 0.5 1 1.5 25 C -55 C 2 2.5 3 VGS=1.5V 0 0 0.5 1.0 1.5 2.0 2.5 3.0 VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) Figure 1. Output Characteristics RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) 600 500 Ciss Figure 2. Transfer Characteristics 1.80 1.60 1.40 1.20 1.00 0.80 0.60 -50 -25 0 25 50 75 100 125 150 ID=4.5A VGS=4.5V C, Capacitance (pF) 400 Coss 300 200 100 0 Crss 0 2 4 6 8 10 12 VDS, Drain-to Source Voltage (V) TJ, Junction Temperature( C) Figure 3. Capacitance Figure 4. On-Resistance Variation with Temperature 9-19 CEG9926 1.40 1.20 1.00 0.80 0.60 0.40 -50 -25 0 25 50 75 100 125 150 VDS=VGS ID=250 A BVDSS, Normalized Drain-Source Breakdown Voltage Vth, Normalized Gate-Source Threshold Voltage 1.60 1.15 1.10 1.05 1.00 0.95 0.90 0.85 -50 -25 0 25 50 75 100 125 150 ID=250 A Tj, Junction Temperature ( C) Tj, Junction Temperature ( C) Figure 5. Gate Threshold Variation with Temperature 30 Figure 6. Breakdown Voltage Variation with Temperature 20 10 gFS, Transconductance (S) 20 15 10 VDS=10V 5 0 0 3 6 9 12 15 Is, Source-drain current (A) 9 25 1 0.1 0.4 0.6 0.8 1.0 1.2 1.4 IDS, Drain-Source Current (A) VSD, Body Diode Forward Voltage (V) Figure 7. Transconductance Variation with Drain Current 5 ID, Drain Current (A) Figure 8. Body Diode Forward Voltage Variation with Source Current 10 2 VGS, Gate to Source Voltage (V) 4 3 2 1 0 0 VDS=10V ID=4.5A 10 1 10 RD S( ON ) i Lim t 1m 10 m s s 0m s 1s D C 10 0 10 -1 10 -2 TA=25 C Tj=150 C Single Pulse 10 -1 10 0 10 1 2 4 6 8 10 12 14 16 10 -2 10 2 Qg, Total Gate Charge (nC) VDS, Drain-Source Voltage (V) Figure 9. Gate Charge 9-20 Figure 10. Maximum Safe Operating Area CEG9926 4 V IN D VGS RGEN G 90% VDD t on RL VOUT VOUT 10% toff tr 90% td(on) td(off) 90% 10% tf INVERTED S VIN 50% 10% 50% PULSE WIDTH Figure 11. Switching Test Circuit Figure 12. Switching Waveforms 10 0 9 D=0.5 0.2 r(t),Normalized Effective Transient Thermal Impedance 10 -1 0.1 0.05 0.02 PDM t1 t2 1. R JA (t)=r (t) * R JA 2. R JA=See Datasheet 3. TJM-TA = P* R JA (t) 4. Duty Cycle, D=t1/t2 10 -3 10 -2 0.01 Single Pulse 10 -3 10 -4 10 -2 10 -1 10 0 10 1 10 2 Square Wave Pulse Duration (sec) Figure 13. Normalized Thermal Transient Impedance Curve 9-21