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CEM3053

CEM3053

  • 厂商:

    CET(华瑞)

  • 封装:

  • 描述:

    CEM3053 - P-Channel Enhancement Mode Field Effect Transistor - Chino-Excel Technology

  • 数据手册
  • 价格&库存
CEM3053 数据手册
P-Channel Enhancement Mode Field Effect Transistor FEATURES -30V, -15A, RDS(ON) = 7mΩ @VGS = -10V. RDS(ON) = 15mΩ @VGS = -4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handing capability. Lead free product is acquired. Surface mount Package. ESD Protected: 4000 V D 8 CEM3053 PRELIMINARY D 7 D 6 D 5 SO-8 1 1 S 2 S 3 S 4 G ABSOLUTE MAXIMUM RATINGS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current-Continuous Drain Current-Pulsed a TA = 25 C unless otherwise noted Symbol VDS VGS ID IDM PD TJ,Tstg Limit -30 Units V V A A W C ±20 -15 -60 2.5 -55 to 150 Maximum Power Dissipation Operating and Store Temperature Range Parameter Thermal Resistance, Junction-to-Ambient b Symbol RθJA Limit 50 Units C/W This is preliminary information on a new product in development now . Details are subject to change without notice . 1 Rev 2. 2006.Nov http://www.cetsemi.com CEM3053 Electrical Characteristics Parameter Off Characteristics Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate Body Leakage Current, Forward Gate Body Leakage Current, Reverse On Characteristics c Gate Threshold Voltage Static Drain-Source On-Resistance Dynamic Characteristics Input Capacitance Output Capacitance Reverse Transfer Capacitance Switching Characteristics d Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Drain-Source Diode Forward Current b Drain-Source Diode Forward Voltage c td(on) tr td(off) tf Qg Qgs Qgd IS VSD VGS = 0V, IS = -1A VDS = -24V, ID = -13A, VGS = -10V VDD = -15V, ID = -6.5A, VGS = -10V, RGEN = 4.7Ω 16.8 12.8 316 131.3 148 13.9 28.5 -1 -1.2 33.6 25.6 632 262.6 192.4 ns ns ns ns nC nC nC A V d TA = 25 C unless otherwise noted Symbol BVDSS IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss Test Condition VGS = 0V, ID = -250µA VDS = -30V, VGS = 0V VGS = 16V, VDS = 0V VGS = -16V, VDS = 0V VGS = VDS , ID = -250µA VGS = -10V, ID = -6.5A VGS = -4.5V, ID = -6.5A VDS = -5V, ID = -6A VDS = -10V, VGS = 0V, f = 1MHz -0.8 5.5 10 10 9770 1010 770 Min -30 -10 10 -10 -2.0 7.0 15 Typ Max Units V µA µA µA 5 V mΩ mΩ S pF pF pF Forward Transconductance Drain-Source Diode Characteristics and Maximun Ratings Notes : a.Repetitive Rating : Pulse width limited by maximum junction temperature. b.Surface Mounted on FR4 Board, t < 10 sec. c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%. d.Guaranteed by design, not subject to production testing. 2 CEM3053 20 25 -VGS=10,8,6,4V -ID, Drain Current (A) -VGS=2.4V 12 8 -ID, Drain Current (A) 16 20 15 10 25 C 5 0 TJ=125 C -55 C 1.6 2.0 2.4 2.8 -VGS=2V 4 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.4 0.8 1.2 -VDS, Drain-to-Source Voltage (V) Figure 1. Output Characteristics 18000 15000 12000 9000 6000 3000 0 Coss 5 10 15 20 25 30 Ciss 2.2 1.9 1.6 1.3 1.0 0.7 0.4 -100 -VGS, Gate-to-Source Voltage (V) Figure 2. Transfer Characteristics ID=-6.5A VGS=-10V Crss 0 RDS(ON), Normalized RDS(ON), On-Resistance(Ohms) C, Capacitance (pF) -50 0 50 100 150 200 -VDS, Drain-to-Source Voltage (V) Figure 3. Capacitance 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -50 VDS=VGS 10 2 TJ, Junction Temperature( C) Figure 4. On-Resistance Variation with Temperature -IS, Source-drain current (A) VGS=0V VTH, Normalized Gate-Source Threshold Voltage ID=-250µA 10 1 10 0 -25 0 25 50 75 100 125 150 10 -1 0.4 0.6 0.8 1.0 1.2 1.4 TJ, Junction Temperature( C) Figure 5. Gate Threshold Variation with Temperature -VSD, Body Diode Forward Voltage (V) Figure 6. Body Diode Forward Voltage Variation with Source Current 3 CEM3053 -VGS, Gate to Source Voltage (V) 10 8 6 4 2 0 VDS=-24V ID=-13A 10 2 RDS(ON)Limit -ID, Drain Current (A) 10 1 10ms 10 0 100ms 1s 5 10 -1 DC TA=25 C TJ=150 C Single Pulse 10 -2 0 30 60 90 120 150 10 -2 10 -1 10 0 10 1 10 2 Qg, Total Gate Charge (nC) Figure 7. Gate Charge VDD t on V IN VGS RGEN G RL D VOUT td(on) VOUT -VDS, Drain-Source Voltage (V) Figure 8. Maximum Safe Operating Area toff tr 90% td(off) 90% 10% tf 10% INVERTED 90% S VIN 50% 10% 50% PULSE WIDTH Figure 9. Switching Test Circuit Figure 10. Switching Waveforms 10 0 r(t),Normalized Effective Transient Thermal Impedance D=0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 10 -1 10 -2 Single Pulse 10 -3 1. RθJA (t)=r (t) * RθJA 2. RθJA=See Datasheet 3. TJM-TA = P* RθJA (t) 4. Duty Cycle, D=t1/t2 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 Square Wave Pulse Duration (sec) Figure 11. Normalized Thermal Transient Impedance Curve 4
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